GB1403786A - Semiconductor devices - Google Patents

Semiconductor devices

Info

Publication number
GB1403786A
GB1403786A GB4690372A GB4690372A GB1403786A GB 1403786 A GB1403786 A GB 1403786A GB 4690372 A GB4690372 A GB 4690372A GB 4690372 A GB4690372 A GB 4690372A GB 1403786 A GB1403786 A GB 1403786A
Authority
GB
United Kingdom
Prior art keywords
chip
foil
conductors
conductor
housing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB4690372A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Philips Electronics UK Ltd
Original Assignee
Philips Electronic and Associated Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Electronic and Associated Industries Ltd filed Critical Philips Electronic and Associated Industries Ltd
Publication of GB1403786A publication Critical patent/GB1403786A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/315—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the encapsulation having a cavity
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334—Auxiliary members in encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49572—Lead-frames or other flat leads consisting of thin flexible metallic tape with or without a film carrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3405—Edge mounted components, e.g. terminals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H01L2924/12033—Gunn diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/189—Printed circuits structurally associated with non-printed electric components characterised by the use of a flexible or folded printed circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10386—Clip leads; Terminals gripping the edge of a substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
  • Die Bonding (AREA)
  • Cooling Or The Like Of Electrical Apparatus (AREA)

Abstract

1403786 Semi-conductor devices PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd 11 Oct 1972 [14 Oct 1971] 46903/72 Heading H1K Contact points 4 on a semi-conductor chip 3, e.g. an I.C. are bonded to the inner ends of conductor tracks 2 located on an insulating foil 1, e.g. of polyimide, the outer ends of the tracks being attached to holding elements on the ends of the flat strip conductors 5 the outer ends of which project from opposite sides of an encapsulation or housing for the chip. The width of the foil exceeds the spacing between opposed pairs of holding elements, causing the foil to bow enabling the uncontacted face of the chip to bear against and if desired, be soldered to a cooling plate embedded in the encapsulation or incorporated in the housing wall. In the embodyment shown in Fig. 2, the holding element consist of claws 7 ,8 formed from the ends of the flat teeth of comb-like conductor structures cut from standard strips of indefinite length. The conductors are held between the engaging rims of thermoplastic housing parts 13, 16 which are welded together, the chip being pressed against a cooling plate 14 moulded or held by a snapfastener in the wall of part 13 by an internal projection 15 from the resilient wall of part 16. The housing may be filled with synthetic resin and the conductive teeth finally severed from the combs and bent up if required for mounting to a printed circuit board. In an alternative embodiment synthetic resin is moulded around the assembly to chip, foil, conductors and cooling plate to form a solid block from which the conductors protrude.
GB4690372A 1971-10-14 1972-10-11 Semiconductor devices Expired GB1403786A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7114112A NL7114112A (en) 1971-10-14 1971-10-14

Publications (1)

Publication Number Publication Date
GB1403786A true GB1403786A (en) 1975-08-28

Family

ID=19814253

Family Applications (1)

Application Number Title Priority Date Filing Date
GB4690372A Expired GB1403786A (en) 1971-10-14 1972-10-11 Semiconductor devices

Country Status (10)

Country Link
JP (1) JPS5329273B2 (en)
AU (1) AU474165B2 (en)
CA (1) CA964382A (en)
CH (1) CH545006A (en)
DE (1) DE2249730C3 (en)
FR (1) FR2156343B1 (en)
GB (1) GB1403786A (en)
IT (1) IT968868B (en)
NL (1) NL7114112A (en)
SE (1) SE378706B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005027222A2 (en) * 2003-09-12 2005-03-24 Siemens Aktiengesellschaft Assembly of an electrical component comprising an electrical insulation film on a substrate and method for producing said assembly

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL189379C (en) * 1977-05-05 1993-03-16 Richardus Henricus Johannes Fi METHOD FOR ENCAPSULATION OF MICRO-ELECTRONIC ELEMENTS.
US4377316A (en) * 1981-02-27 1983-03-22 International Business Machines Corporation High density interconnection means for chip carriers
DE3530827A1 (en) * 1985-08-29 1987-03-05 Vdo Schindling Contact device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1534329A (en) * 1966-08-16 1968-07-26 Signetics Corp Integrated circuit assembly process
US3544857A (en) * 1966-08-16 1970-12-01 Signetics Corp Integrated circuit assembly with lead structure and method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005027222A2 (en) * 2003-09-12 2005-03-24 Siemens Aktiengesellschaft Assembly of an electrical component comprising an electrical insulation film on a substrate and method for producing said assembly
WO2005027222A3 (en) * 2003-09-12 2005-12-15 Siemens Ag Assembly of an electrical component comprising an electrical insulation film on a substrate and method for producing said assembly

Also Published As

Publication number Publication date
NL7114112A (en) 1973-04-17
AU4752572A (en) 1974-04-26
DE2249730B2 (en) 1980-01-24
SE378706B (en) 1975-09-08
DE2249730A1 (en) 1973-04-19
JPS5329273B2 (en) 1978-08-19
JPS4847275A (en) 1973-07-05
FR2156343A1 (en) 1973-05-25
FR2156343B1 (en) 1977-12-23
AU474165B2 (en) 1976-07-15
IT968868B (en) 1974-03-20
CA964382A (en) 1975-03-11
DE2249730C3 (en) 1980-11-13
CH545006A (en) 1973-11-30

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee