DE2154120A1 - Verfahren zur Herstellung von Halbleiter-Anordnungen - Google Patents
Verfahren zur Herstellung von Halbleiter-AnordnungenInfo
- Publication number
- DE2154120A1 DE2154120A1 DE19712154120 DE2154120A DE2154120A1 DE 2154120 A1 DE2154120 A1 DE 2154120A1 DE 19712154120 DE19712154120 DE 19712154120 DE 2154120 A DE2154120 A DE 2154120A DE 2154120 A1 DE2154120 A1 DE 2154120A1
- Authority
- DE
- Germany
- Prior art keywords
- substrate
- insulation layer
- diffusion
- exposed
- mask
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/60—Lateral BJTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/043—Dual dielectric
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/114—Nitrides of silicon
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Inorganic Chemistry (AREA)
- Bipolar Transistors (AREA)
- Weting (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP45095083A JPS4929785B1 (enExample) | 1970-10-30 | 1970-10-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE2154120A1 true DE2154120A1 (de) | 1972-06-29 |
Family
ID=14128035
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE19712154120 Pending DE2154120A1 (de) | 1970-10-30 | 1971-10-29 | Verfahren zur Herstellung von Halbleiter-Anordnungen |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US3850708A (enExample) |
| JP (1) | JPS4929785B1 (enExample) |
| DE (1) | DE2154120A1 (enExample) |
| NL (1) | NL7114918A (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0060761A1 (fr) * | 1981-03-13 | 1982-09-22 | Societe Pour L'etude Et La Fabrication De Circuits Integres Speciaux - E.F.C.I.S. | Transistor bipolaire latéral sur isolant et son procédé de fabrication |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3912558A (en) * | 1974-05-03 | 1975-10-14 | Fairchild Camera Instr Co | Method of MOS circuit fabrication |
| US3967988A (en) * | 1974-08-05 | 1976-07-06 | Motorola, Inc. | Diffusion guarded metal-oxide-silicon field effect transistors |
| GB2158639B (en) * | 1984-05-12 | 1988-02-10 | Ferranti Plc | Fabricating semiconductor devices |
| US4589002A (en) * | 1984-07-18 | 1986-05-13 | Rca Corporation | Diode structure |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3326729A (en) * | 1963-08-20 | 1967-06-20 | Hughes Aircraft Co | Epitaxial method for the production of microcircuit components |
| US3342650A (en) * | 1964-02-10 | 1967-09-19 | Hitachi Ltd | Method of making semiconductor devices by double masking |
| GB1150834A (en) * | 1966-10-05 | 1969-05-07 | Rca Corp | Method of fabricating semiconductor devices |
| US3544399A (en) * | 1966-10-26 | 1970-12-01 | Hughes Aircraft Co | Insulated gate field-effect transistor (igfet) with semiconductor gate electrode |
| US3537921A (en) * | 1967-02-28 | 1970-11-03 | Motorola Inc | Selective hydrofluoric acid etching and subsequent processing |
| US3475234A (en) * | 1967-03-27 | 1969-10-28 | Bell Telephone Labor Inc | Method for making mis structures |
| US3576478A (en) * | 1969-07-22 | 1971-04-27 | Philco Ford Corp | Igfet comprising n-type silicon substrate, silicon oxide gate insulator and p-type polycrystalline silicon gate electrode |
-
1970
- 1970-10-30 JP JP45095083A patent/JPS4929785B1/ja active Pending
-
1971
- 1971-10-29 NL NL7114918A patent/NL7114918A/xx unknown
- 1971-10-29 US US00193854A patent/US3850708A/en not_active Expired - Lifetime
- 1971-10-29 DE DE19712154120 patent/DE2154120A1/de active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0060761A1 (fr) * | 1981-03-13 | 1982-09-22 | Societe Pour L'etude Et La Fabrication De Circuits Integres Speciaux - E.F.C.I.S. | Transistor bipolaire latéral sur isolant et son procédé de fabrication |
Also Published As
| Publication number | Publication date |
|---|---|
| NL7114918A (enExample) | 1972-05-03 |
| JPS4929785B1 (enExample) | 1974-08-07 |
| US3850708A (en) | 1974-11-26 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| OHN | Withdrawal |