DE19705342A1 - Verbessertes Selbstjustierendes Silicid-Herstellungsverfahren - Google Patents

Verbessertes Selbstjustierendes Silicid-Herstellungsverfahren

Info

Publication number
DE19705342A1
DE19705342A1 DE19705342A DE19705342A DE19705342A1 DE 19705342 A1 DE19705342 A1 DE 19705342A1 DE 19705342 A DE19705342 A DE 19705342A DE 19705342 A DE19705342 A DE 19705342A DE 19705342 A1 DE19705342 A1 DE 19705342A1
Authority
DE
Germany
Prior art keywords
heat
resistant metal
metal layer
gate
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE19705342A
Other languages
German (de)
English (en)
Inventor
Jason Jenq
Tung-Po Chen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
United Microelectronics Corp
Original Assignee
United Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from TW085109703A external-priority patent/TW328153B/zh
Application filed by United Microelectronics Corp filed Critical United Microelectronics Corp
Publication of DE19705342A1 publication Critical patent/DE19705342A1/de
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28518Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
DE19705342A 1996-08-09 1997-02-12 Verbessertes Selbstjustierendes Silicid-Herstellungsverfahren Ceased DE19705342A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
TW085109703A TW328153B (en) 1996-08-09 1996-08-09 The manufacturing method for improving property of salicide
GB9625173A GB2320130B (en) 1996-08-09 1996-12-04 Improved self-ligned silicide manufacturing method

Publications (1)

Publication Number Publication Date
DE19705342A1 true DE19705342A1 (de) 1998-02-12

Family

ID=26310543

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19705342A Ceased DE19705342A1 (de) 1996-08-09 1997-02-12 Verbessertes Selbstjustierendes Silicid-Herstellungsverfahren

Country Status (4)

Country Link
JP (1) JP3258934B2 (ja)
DE (1) DE19705342A1 (ja)
FR (1) FR2752331B1 (ja)
GB (1) GB2320130B (ja)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3295931B2 (ja) * 1999-04-28 2002-06-24 日本電気株式会社 半導体装置の製造方法
GB0024648D0 (en) 2000-10-07 2000-11-22 Bae Systems Plc A method and apparatus for assembling an aircraft wheel or brake component on an axle of an undercarriage

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3497407A (en) * 1966-12-28 1970-02-24 Ibm Etching of semiconductor coatings of sio2
US4545116A (en) * 1983-05-06 1985-10-08 Texas Instruments Incorporated Method of forming a titanium disilicide
US4983544A (en) * 1986-10-20 1991-01-08 International Business Machines Corporation Silicide bridge contact process
GB2214708A (en) * 1988-01-20 1989-09-06 Philips Nv A method of manufacturing a semiconductor device
JPH0260126A (ja) * 1988-08-26 1990-02-28 Toshiba Corp 半導体装置及びその製造方法
JPH02297939A (ja) * 1989-05-12 1990-12-10 Matsushita Electron Corp 半導体集積回路装置の製造方法
JPH04107920A (ja) * 1990-08-29 1992-04-09 Fujitsu Ltd 半導体装置の製造方法
JP3285934B2 (ja) * 1991-07-16 2002-05-27 株式会社東芝 半導体装置の製造方法
US5344793A (en) * 1993-03-05 1994-09-06 Siemens Aktiengesellschaft Formation of silicided junctions in deep sub-micron MOSFETs by defect enhanced CoSi2 formation
JP2611726B2 (ja) * 1993-10-07 1997-05-21 日本電気株式会社 半導体装置の製造方法
JP3046208B2 (ja) * 1994-08-05 2000-05-29 新日本製鐵株式会社 シリコンウェハおよびシリコン酸化物の洗浄液
JP3329128B2 (ja) * 1995-03-28 2002-09-30 ソニー株式会社 半導体装置の製造方法

Also Published As

Publication number Publication date
GB2320130A (en) 1998-06-10
FR2752331B1 (fr) 1998-11-06
GB9625173D0 (en) 1997-01-22
JP3258934B2 (ja) 2002-02-18
FR2752331A1 (fr) 1998-02-13
GB2320130B (en) 2001-11-07
JPH1079508A (ja) 1998-03-24

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8131 Rejection