DE1296180B - Schaltungsanordnung zum Ansteuern einzelner Schaltungselemente innerhalb einer Mehrzahl von Schaltungselementen mittels codierter Steuersignale - Google Patents

Schaltungsanordnung zum Ansteuern einzelner Schaltungselemente innerhalb einer Mehrzahl von Schaltungselementen mittels codierter Steuersignale

Info

Publication number
DE1296180B
DE1296180B DEA53181A DEA0053181A DE1296180B DE 1296180 B DE1296180 B DE 1296180B DE A53181 A DEA53181 A DE A53181A DE A0053181 A DEA0053181 A DE A0053181A DE 1296180 B DE1296180 B DE 1296180B
Authority
DE
Germany
Prior art keywords
gate
circuit
output
gates
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DEA53181A
Other languages
German (de)
English (en)
Inventor
Ladd Jun Frederick Foster
Marsh Jun Lynn Wadsworth
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mohawk Data Sciences Corp
Original Assignee
Mohawk Data Sciences Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mohawk Data Sciences Corp filed Critical Mohawk Data Sciences Corp
Publication of DE1296180B publication Critical patent/DE1296180B/de
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/084Diode-transistor logic
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/15013Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
    • H03K5/1506Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with parallel driven output stages; with synchronously driven series connected output stages
    • H03K5/15093Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with parallel driven output stages; with synchronously driven series connected output stages using devices arranged in a shift register

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Nonlinear Science (AREA)
  • Electronic Switches (AREA)
  • Manipulation Of Pulses (AREA)
  • Dot-Matrix Printers And Others (AREA)
DEA53181A 1965-08-11 1966-08-05 Schaltungsanordnung zum Ansteuern einzelner Schaltungselemente innerhalb einer Mehrzahl von Schaltungselementen mittels codierter Steuersignale Pending DE1296180B (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US47892965A 1965-08-11 1965-08-11

Publications (1)

Publication Number Publication Date
DE1296180B true DE1296180B (de) 1969-05-29

Family

ID=23901964

Family Applications (1)

Application Number Title Priority Date Filing Date
DEA53181A Pending DE1296180B (de) 1965-08-11 1966-08-05 Schaltungsanordnung zum Ansteuern einzelner Schaltungselemente innerhalb einer Mehrzahl von Schaltungselementen mittels codierter Steuersignale

Country Status (5)

Country Link
US (1) US3422359A (enExample)
JP (1) JPS4419352B1 (enExample)
DE (1) DE1296180B (enExample)
FR (1) FR1485061A (enExample)
GB (1) GB1150304A (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3969632A (en) * 1971-07-06 1976-07-13 Thomson-Csf Logic circuits-employing junction-type field-effect transistors
US3921079A (en) * 1974-05-13 1975-11-18 Gte Automatic Electric Lab Inc Multi-phase clock distribution system
US4119916A (en) * 1977-05-19 1978-10-10 The United States Of America As Represented By The Secretary Of The Navy Programmable charge coupled device timing system
GB9003535D0 (en) * 1990-02-16 1990-04-11 Hitachi Europ Ltd Logic circuit device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3048716A (en) * 1960-08-31 1962-08-07 Bell Telephone Labor Inc Logic system including high fan-out stage having variable clamping means

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
None *

Also Published As

Publication number Publication date
JPS4419352B1 (enExample) 1969-08-21
GB1150304A (en) 1969-04-30
FR1485061A (fr) 1967-06-16
US3422359A (en) 1969-01-14

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