DE1289191B - - Google Patents
Info
- Publication number
- DE1289191B DE1289191B DE1965R0041587 DER0041587A DE1289191B DE 1289191 B DE1289191 B DE 1289191B DE 1965R0041587 DE1965R0041587 DE 1965R0041587 DE R0041587 A DER0041587 A DE R0041587A DE 1289191 B DE1289191 B DE 1289191B
- Authority
- DE
- Germany
- Prior art keywords
- plate
- base plate
- layer
- auxiliary plate
- trenches
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000010410 layer Substances 0.000 claims description 58
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 29
- 239000004065 semiconductor Substances 0.000 claims description 26
- 238000000034 method Methods 0.000 claims description 25
- 239000000463 material Substances 0.000 claims description 22
- 239000000377 silicon dioxide Substances 0.000 claims description 14
- 235000012239 silicon dioxide Nutrition 0.000 claims description 13
- 239000013078 crystal Substances 0.000 claims description 11
- 239000011521 glass Substances 0.000 claims description 11
- 239000011810 insulating material Substances 0.000 claims description 10
- 238000004519 manufacturing process Methods 0.000 claims description 9
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 8
- 235000012431 wafers Nutrition 0.000 claims description 8
- 239000011241 protective layer Substances 0.000 claims description 6
- 239000012777 electrically insulating material Substances 0.000 claims description 3
- 238000000227 grinding Methods 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 description 13
- 239000010703 silicon Substances 0.000 description 13
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 12
- 238000005530 etching Methods 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 4
- 229910052732 germanium Inorganic materials 0.000 description 3
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 3
- 229910003902 SiCl 4 Inorganic materials 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000003486 chemical etching Methods 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 239000012808 vapor phase Substances 0.000 description 2
- VXEGSRKPIUDPQT-UHFFFAOYSA-N 4-[4-(4-methoxyphenyl)piperazin-1-yl]aniline Chemical compound C1=CC(OC)=CC=C1N1CCN(C=2C=CC(N)=CC=2)CC1 VXEGSRKPIUDPQT-UHFFFAOYSA-N 0.000 description 1
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 1
- BPQQTUXANYXVAA-UHFFFAOYSA-N Orthosilicate Chemical compound [O-][Si]([O-])([O-])[O-] BPQQTUXANYXVAA-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 230000001464 adherent effect Effects 0.000 description 1
- 239000011230 binding agent Substances 0.000 description 1
- 239000007795 chemical reaction product Substances 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 229910000041 hydrogen chloride Inorganic materials 0.000 description 1
- IXCSERBJSXMMFS-UHFFFAOYSA-N hydrogen chloride Substances Cl.Cl IXCSERBJSXMMFS-UHFFFAOYSA-N 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 239000012774 insulation material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 239000005360 phosphosilicate glass Substances 0.000 description 1
- 108090000623 proteins and genes Proteins 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000005049 silicon tetrachloride Substances 0.000 description 1
- 238000013517 stratification Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76297—Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76275—Vertical isolation by bonding techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76283—Lateral isolation by refilling of trenches with dielectric material
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/928—Front and rear surface processing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/4981—Utilizing transitory attached element or associated separate material
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US399476A US3332137A (en) | 1964-09-28 | 1964-09-28 | Method of isolating chips of a wafer of semiconductor material |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE1289191B true DE1289191B (en, 2012) | 1975-02-06 |
| DE1289191C2 DE1289191C2 (de) | 1975-02-06 |
Family
ID=23579659
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE1965R0041587 Expired DE1289191C2 (de) | 1964-09-28 | 1965-09-22 | Verfahren zum herstellen eines bauteils fuer eine integrierte halbleiterschaltung |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US3332137A (en, 2012) |
| DE (1) | DE1289191C2 (en, 2012) |
| FR (1) | FR1454585A (en, 2012) |
| GB (1) | GB1119064A (en, 2012) |
Families Citing this family (53)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1030670A (en) * | 1964-12-02 | 1966-05-25 | Standard Telephones Cables Ltd | Semiconductor devices |
| DE1230915B (de) * | 1965-03-26 | 1966-12-22 | Siemens Ag | Verfahren zum Herstellen von integrierten Halbleiterbauelementen |
| US3423255A (en) * | 1965-03-31 | 1969-01-21 | Westinghouse Electric Corp | Semiconductor integrated circuits and method of making the same |
| US3457123A (en) * | 1965-06-28 | 1969-07-22 | Motorola Inc | Methods for making semiconductor structures having glass insulated islands |
| DE1514488A1 (de) * | 1965-06-29 | 1969-04-24 | Siemens Ag | Verfahren zum Herstellen einer Verbundhalbleiteranordnung |
| US3390022A (en) * | 1965-06-30 | 1968-06-25 | North American Rockwell | Semiconductor device and process for producing same |
| FR1486855A (en, 2012) * | 1965-07-17 | 1967-10-05 | ||
| US3412296A (en) * | 1965-10-19 | 1968-11-19 | Sprague Electric Co | Monolithic structure with threeregion or field effect complementary transistors |
| US3412295A (en) * | 1965-10-19 | 1968-11-19 | Sprague Electric Co | Monolithic structure with three-region complementary transistors |
| US3488834A (en) * | 1965-10-20 | 1970-01-13 | Texas Instruments Inc | Microelectronic circuit formed in an insulating substrate and method of making same |
| US3433686A (en) * | 1966-01-06 | 1969-03-18 | Ibm | Process of bonding chips in a substrate recess by epitaxial growth of the bonding material |
| US3416224A (en) * | 1966-03-08 | 1968-12-17 | Ibm | Integrated semiconductor devices and fabrication methods therefor |
| US3577044A (en) * | 1966-03-08 | 1971-05-04 | Ibm | Integrated semiconductor devices and fabrication methods therefor |
| US3471922A (en) * | 1966-06-02 | 1969-10-14 | Raytheon Co | Monolithic integrated circuitry with dielectric isolated functional regions |
| US3484311A (en) * | 1966-06-21 | 1969-12-16 | Union Carbide Corp | Silicon deposition process |
| US3489961A (en) * | 1966-09-29 | 1970-01-13 | Fairchild Camera Instr Co | Mesa etching for isolation of functional elements in integrated circuits |
| US3620833A (en) * | 1966-12-23 | 1971-11-16 | Texas Instruments Inc | Integrated circuit fabrication |
| US3439414A (en) * | 1967-01-03 | 1969-04-22 | Motorola Inc | Method for making semiconductor structure with layers of preselected resistivity and conductivity type |
| US3445925A (en) * | 1967-04-25 | 1969-05-27 | Motorola Inc | Method for making thin semiconductor dice |
| US3508980A (en) * | 1967-07-26 | 1970-04-28 | Motorola Inc | Method of fabricating an integrated circuit structure with dielectric isolation |
| US3571919A (en) * | 1968-09-25 | 1971-03-23 | Texas Instruments Inc | Semiconductor device fabrication |
| US3838441A (en) * | 1968-12-04 | 1974-09-24 | Texas Instruments Inc | Semiconductor device isolation using silicon carbide |
| US3748546A (en) * | 1969-05-12 | 1973-07-24 | Signetics Corp | Photosensitive device and array |
| US3624463A (en) * | 1969-10-17 | 1971-11-30 | Motorola Inc | Method of and apparatus for indicating semiconductor island thickness and for increasing isolation and decreasing capacity between islands |
| US3731366A (en) * | 1971-03-15 | 1973-05-08 | Montblanc Simplo Gmbh | Method of making fountain pen |
| US3760242A (en) * | 1972-03-06 | 1973-09-18 | Ibm | Coated semiconductor structures and methods of forming protective coverings on such structures |
| US3786560A (en) * | 1972-03-20 | 1974-01-22 | J Cunningham | Electrical isolation of circuit components of integrated circuits |
| JPS5328266A (en) * | 1976-08-13 | 1978-03-16 | Fujitsu Ltd | Method of producing multilayer ceramic substrate |
| US4169000A (en) * | 1976-09-02 | 1979-09-25 | International Business Machines Corporation | Method of forming an integrated circuit structure with fully-enclosed air isolation |
| US4106050A (en) * | 1976-09-02 | 1978-08-08 | International Business Machines Corporation | Integrated circuit structure with fully enclosed air isolation |
| US4196508A (en) * | 1977-09-01 | 1980-04-08 | Honeywell Inc. | Durable insulating protective layer for hybrid CCD/mosaic IR detector array |
| GB1602498A (en) * | 1978-05-31 | 1981-11-11 | Secr Defence | Fet devices and their fabrication |
| US4261781A (en) * | 1979-01-31 | 1981-04-14 | International Business Machines Corporation | Process for forming compound semiconductor bodies |
| US4335501A (en) * | 1979-10-31 | 1982-06-22 | The General Electric Company Limited | Manufacture of monolithic LED arrays for electroluminescent display devices |
| EP0161740B1 (en) * | 1984-05-09 | 1991-06-12 | Kabushiki Kaisha Toshiba | Method of manufacturing semiconductor substrate |
| US4649627A (en) * | 1984-06-28 | 1987-03-17 | International Business Machines Corporation | Method of fabricating silicon-on-insulator transistors with a shared element |
| WO1987006060A1 (en) * | 1986-03-28 | 1987-10-08 | Fairchild Semiconductor Corporation | Method for joining two or more wafers and the resulting structure |
| US4859629A (en) * | 1986-04-18 | 1989-08-22 | M/A-Com, Inc. | Method of fabricating a semiconductor beam lead device |
| US4774196A (en) * | 1987-08-25 | 1988-09-27 | Siliconix Incorporated | Method of bonding semiconductor wafers |
| US4782028A (en) * | 1987-08-27 | 1988-11-01 | Santa Barbara Research Center | Process methodology for two-sided fabrication of devices on thinned silicon |
| JP2566175B2 (ja) * | 1990-04-27 | 1996-12-25 | セイコー電子工業株式会社 | 半導体装置及びその製造方法 |
| US5591678A (en) * | 1993-01-19 | 1997-01-07 | He Holdings, Inc. | Process of manufacturing a microelectric device using a removable support substrate and etch-stop |
| US5399231A (en) * | 1993-10-18 | 1995-03-21 | Regents Of The University Of California | Method of forming crystalline silicon devices on glass |
| US5488012A (en) * | 1993-10-18 | 1996-01-30 | The Regents Of The University Of California | Silicon on insulator with active buried regions |
| US5414276A (en) * | 1993-10-18 | 1995-05-09 | The Regents Of The University Of California | Transistors using crystalline silicon devices on glass |
| US5395481A (en) * | 1993-10-18 | 1995-03-07 | Regents Of The University Of California | Method for forming silicon on a glass substrate |
| US5589083A (en) * | 1993-12-11 | 1996-12-31 | Electronics And Telecommunications Research Institute | Method of manufacturing microstructure by the anisotropic etching and bonding of substrates |
| US5654226A (en) * | 1994-09-07 | 1997-08-05 | Harris Corporation | Wafer bonding for power devices |
| US5674758A (en) * | 1995-06-06 | 1997-10-07 | Regents Of The University Of California | Silicon on insulator achieved using electrochemical etching |
| US5710057A (en) * | 1996-07-12 | 1998-01-20 | Kenney; Donald M. | SOI fabrication method |
| JP4883852B2 (ja) * | 2001-07-30 | 2012-02-22 | 日東電工株式会社 | 加熱剥離型粘着シートからのチップ切断片の加熱剥離方法 |
| US6870225B2 (en) * | 2001-11-02 | 2005-03-22 | International Business Machines Corporation | Transistor structure with thick recessed source/drain structures and fabrication process of same |
| FR2903809B1 (fr) * | 2006-07-13 | 2008-10-17 | Soitec Silicon On Insulator | Traitement thermique de stabilisation d'interface e collage. |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| BE500302A (en, 2012) * | 1949-11-30 | |||
| FR1269547A (fr) * | 1960-02-09 | 1961-08-11 | Intermetall | Nouveau procédé pour la fabrication d'éléments semi-conducteurs stratifiés et éléments conformes à ceux ainsi obtenus |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3152939A (en) * | 1960-08-12 | 1964-10-13 | Westinghouse Electric Corp | Process for preparing semiconductor members |
| US3290753A (en) * | 1963-08-19 | 1966-12-13 | Bell Telephone Labor Inc | Method of making semiconductor integrated circuit elements |
-
1964
- 1964-09-28 US US399476A patent/US3332137A/en not_active Expired - Lifetime
-
1965
- 1965-09-01 GB GB37384/65A patent/GB1119064A/en not_active Expired
- 1965-09-22 DE DE1965R0041587 patent/DE1289191C2/de not_active Expired
- 1965-09-28 FR FR32913A patent/FR1454585A/fr not_active Expired
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| BE500302A (en, 2012) * | 1949-11-30 | |||
| FR1269547A (fr) * | 1960-02-09 | 1961-08-11 | Intermetall | Nouveau procédé pour la fabrication d'éléments semi-conducteurs stratifiés et éléments conformes à ceux ainsi obtenus |
Also Published As
| Publication number | Publication date |
|---|---|
| FR1454585A (fr) | 1966-02-11 |
| GB1119064A (en) | 1968-07-03 |
| US3332137A (en) | 1967-07-25 |
| DE1289191C2 (de) | 1975-02-06 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| E77 | Valid patent as to the heymanns-index 1977 | ||
| EHJ | Ceased/non-payment of the annual fee |