DE112021000055T5 - Halbleitervorrichtung - Google Patents

Halbleitervorrichtung Download PDF

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Publication number
DE112021000055T5
DE112021000055T5 DE112021000055.1T DE112021000055T DE112021000055T5 DE 112021000055 T5 DE112021000055 T5 DE 112021000055T5 DE 112021000055 T DE112021000055 T DE 112021000055T DE 112021000055 T5 DE112021000055 T5 DE 112021000055T5
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Germany
Prior art keywords
region
concentration
semiconductor substrate
peak
oxygen
Prior art date
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Pending
Application number
DE112021000055.1T
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German (de)
English (en)
Inventor
Motoyoshi KUBOUCHI
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
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Fuji Electric Co Ltd
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Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Publication of DE112021000055T5 publication Critical patent/DE112021000055T5/de
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411—Insulated-gate bipolar transistors [IGBT]
    • H10D12/441—Vertical IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01—Manufacture or treatment
    • H10D12/031—Manufacture or treatment of IGBTs
    • H10D12/032—Manufacture or treatment of IGBTs of vertical IGBTs
    • H10D12/038—Manufacture or treatment of IGBTs of vertical IGBTs having a recessed gate, e.g. trench-gate IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411—Insulated-gate bipolar transistors [IGBT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411—Insulated-gate bipolar transistors [IGBT]
    • H10D12/441—Vertical IGBTs
    • H10D12/461—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
    • H10D12/481—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/393—Body regions of DMOS transistors or IGBTs 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/50—Physical imperfections
    • H10D62/53—Physical imperfections the imperfections being within the semiconductor body 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/60—Impurity distributions or concentrations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/111—Field plates
    • H10D64/117—Recessed field plates, e.g. trench field plates or buried field plates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00—Diodes
    • H10D8/422—PN diodes having the PN junctions in mesas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/208—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P34/00—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices
    • H10P34/40—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/40—Treatments of semiconductor bodies to modify their internal properties, e.g. to produce internal imperfections
    • H10P95/402—Treatments of semiconductor bodies to modify their internal properties, e.g. to produce internal imperfections of silicon bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering

Landscapes

  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Recrystallisation Techniques (AREA)
DE112021000055.1T 2020-02-18 2021-02-17 Halbleitervorrichtung Pending DE112021000055T5 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2020-025326 2020-02-18
JP2020025326 2020-02-18
PCT/JP2021/006016 WO2021166980A1 (ja) 2020-02-18 2021-02-17 半導体装置

Publications (1)

Publication Number Publication Date
DE112021000055T5 true DE112021000055T5 (de) 2022-06-30

Family

ID=77392157

Family Applications (1)

Application Number Title Priority Date Filing Date
DE112021000055.1T Pending DE112021000055T5 (de) 2020-02-18 2021-02-17 Halbleitervorrichtung

Country Status (5)

Country Link
US (1) US12087827B2 (https=)
JP (1) JP7279846B2 (https=)
CN (1) CN114175270A (https=)
DE (1) DE112021000055T5 (https=)
WO (1) WO2021166980A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE112022002851T5 (de) * 2022-02-17 2024-03-14 Fuji Electric Co., Ltd. Halbleitervorrichtung und verfahren für dessen herstellung
WO2024122541A1 (ja) * 2022-12-08 2024-06-13 富士電機株式会社 半導体装置および半導体装置の製造方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013153183A (ja) 2006-01-20 2013-08-08 Infineon Technologies Austria Ag 酸素含有半導体ウェハの処理方法、および半導体素子

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4096722B2 (ja) 2002-12-06 2008-06-04 富士電機デバイステクノロジー株式会社 半導体装置の製造方法
JP5104314B2 (ja) 2005-11-14 2012-12-19 富士電機株式会社 半導体装置およびその製造方法
JP5261927B2 (ja) * 2006-12-11 2013-08-14 パナソニック株式会社 半導体装置
JP2008177296A (ja) * 2007-01-17 2008-07-31 Toyota Central R&D Labs Inc 半導体装置、ｐｎダイオード、ｉｇｂｔ、及びそれらの製造方法
JP5523901B2 (ja) 2010-04-02 2014-06-18 株式会社豊田中央研究所 Ｐｉｎダイオード
DE102011113549B4 (de) 2011-09-15 2019-10-17 Infineon Technologies Ag Ein Halbleiterbauelement mit einer Feldstoppzone in einem Halbleiterkörper und ein Verfahren zur Herstellung einer Feldstoppzone in einem Halbleiterkörper
DE102013216195B4 (de) 2013-08-14 2015-10-29 Infineon Technologies Ag Verfahren zur Nachdotierung einer Halbleiterscheibe
JP6268948B2 (ja) 2013-11-07 2018-01-31 富士電機株式会社 Ｍｏｓ型半導体装置の製造方法
US9312135B2 (en) 2014-03-19 2016-04-12 Infineon Technologies Ag Method of manufacturing semiconductor devices including generating and annealing radiation-induced crystal defects
DE102014114683B4 (de) 2014-10-09 2016-08-04 Infineon Technologies Ag Verfahren zur herstellung eines halbleiter-wafers mit einer niedrigen konzentration von interstitiellem sauerstoff
DE102014116666B4 (de) 2014-11-14 2022-04-21 Infineon Technologies Ag Ein Verfahren zum Bilden eines Halbleiterbauelements
JP6268117B2 (ja) 2015-03-27 2018-01-24 株式会社日立製作所 半導体装置およびその製造方法、並びに電力変換システム
WO2016204227A1 (ja) 2015-06-17 2016-12-22 富士電機株式会社 半導体装置および半導体装置の製造方法
JP6428945B2 (ja) 2015-09-16 2018-11-28 富士電機株式会社 半導体装置および半導体装置の製造方法
DE102016112139B3 (de) 2016-07-01 2018-01-04 Infineon Technologies Ag Verfahren zum Reduzieren einer Verunreinigungskonzentration in einem Halbleiterkörper
US10923562B2 (en) 2016-08-19 2021-02-16 Rohm Co., Ltd. Semiconductor device, and method for manufacturing semicondcutor device
DE102016118012A1 (de) 2016-09-23 2018-03-29 Infineon Technologies Ag Halbleiterbauelement und Verfahren zum Bilden eines Halbleiterbauelements
JP6678549B2 (ja) 2016-09-27 2020-04-08 株式会社 日立パワーデバイス 半導体装置およびその製造方法、並びに電力変換システム
DE102016120771B3 (de) 2016-10-31 2018-03-08 Infineon Technologies Ag Verfahren zum Herstellen von Halbleitervorrichtungen und Halbleitervorrichtung, die wasserstoff-korrelierte Donatoren enthält
DE102017117753A1 (de) * 2017-08-04 2019-02-07 Infineon Technologies Austria Ag Verfahren zur herstellung von halbleitervorrichtungen mitsuperjunction-strukturen
WO2019117248A1 (ja) * 2017-12-14 2019-06-20 富士電機株式会社 半導体装置
DE112019000094T5 (de) 2018-03-19 2020-09-24 Fuji Electric Co., Ltd. Halbleitervorrichtung und verfahren zum herstellen einerhalbleitervorrichtung
DE112019008041B4 (de) 2018-10-18 2026-02-05 Fuji Electric Co., Ltd. Halbleitervorrichtung und herstellungsverfahren davon

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013153183A (ja) 2006-01-20 2013-08-08 Infineon Technologies Austria Ag 酸素含有半導体ウェハの処理方法、および半導体素子

Also Published As

Publication number Publication date
JP7279846B2 (ja) 2023-05-23
WO2021166980A1 (ja) 2021-08-26
US12087827B2 (en) 2024-09-10
US20220149159A1 (en) 2022-05-12
JPWO2021166980A1 (https=) 2021-08-26
CN114175270A (zh) 2022-03-11

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