DE112020004962T5 - Leiterplatte und verfahren zur herstellung einer leiterplatte - Google Patents

Leiterplatte und verfahren zur herstellung einer leiterplatte Download PDF

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Publication number
DE112020004962T5
DE112020004962T5 DE112020004962.0T DE112020004962T DE112020004962T5 DE 112020004962 T5 DE112020004962 T5 DE 112020004962T5 DE 112020004962 T DE112020004962 T DE 112020004962T DE 112020004962 T5 DE112020004962 T5 DE 112020004962T5
Authority
DE
Germany
Prior art keywords
circuit board
low
insulating layer
ceramic
temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE112020004962.0T
Other languages
German (de)
English (en)
Inventor
Tomoki Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Publication of DE112020004962T5 publication Critical patent/DE112020004962T5/de
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
    • H05K1/0206—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/22—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
    • H10W40/226—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections characterised by projecting parts, e.g. fins to increase surface area
    • H10W40/228—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections characterised by projecting parts, e.g. fins to increase surface area the projecting parts being wire-shaped or pin-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69—Insulating materials thereof
    • H10W70/692—Ceramics or glasses
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/096—Vertically aligned vias, holes or stacked vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09827—Tapered, e.g. tapered hole, via or groove
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1126—Firing, i.e. heating a powder or paste above the melting temperature of at least one of its constituents
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
DE112020004962.0T 2019-11-14 2020-10-06 Leiterplatte und verfahren zur herstellung einer leiterplatte Pending DE112020004962T5 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2019206202 2019-11-14
JP2019-206202 2019-11-14
PCT/JP2020/037876 WO2021095401A1 (ja) 2019-11-14 2020-10-06 回路基板及び回路基板の製造方法

Publications (1)

Publication Number Publication Date
DE112020004962T5 true DE112020004962T5 (de) 2022-06-30

Family

ID=75912649

Family Applications (1)

Application Number Title Priority Date Filing Date
DE112020004962.0T Pending DE112020004962T5 (de) 2019-11-14 2020-10-06 Leiterplatte und verfahren zur herstellung einer leiterplatte

Country Status (5)

Country Link
US (1) US12133328B2 (https=)
JP (1) JP7243856B2 (https=)
CN (1) CN114747301B (https=)
DE (1) DE112020004962T5 (https=)
WO (1) WO2021095401A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20240072459A1 (en) * 2022-08-31 2024-02-29 Innolux Corporation Electrical connection structure and electronic device
WO2025173541A1 (ja) * 2024-02-13 2025-08-21 株式会社村田製作所 回路基板

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006041230A (ja) 2004-07-28 2006-02-09 Kyocera Corp 発光素子用配線基板ならびに発光装置

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6196548U (https=) * 1984-11-30 1986-06-21
JPH0714421A (ja) * 1993-06-23 1995-01-17 Murata Mfg Co Ltd バイアホール用導電性ペーストおよびそれを用いた多層セラミック基板
US5386339A (en) 1993-07-29 1995-01-31 Hughes Aircraft Company Monolithic microelectronic circuit package including low-temperature-cofired-ceramic (LTCC) tape dielectric structure and in-situ heat sink
US6187418B1 (en) * 1999-07-19 2001-02-13 International Business Machines Corporation Multilayer ceramic substrate with anchored pad
JP2002234781A (ja) 2001-02-06 2002-08-23 Murata Mfg Co Ltd 銅メタライズ組成物ならびにそれを用いたセラミック配線基板およびその製造方法
JP2005026368A (ja) * 2003-06-30 2005-01-27 Tdk Corp 放熱用ビアホールを備えた積層基板および該基板を用いたパワーアンプモジュール
US20070040245A1 (en) * 2003-11-17 2007-02-22 Jsr Corporation Anisotropic conductive sheet, manufacturing method thereof, and product using the same
JP4493399B2 (ja) 2004-05-19 2010-06-30 京セラ株式会社 複合シート及び積層部品の製造方法
JP4748161B2 (ja) 2005-07-12 2011-08-17 株式会社村田製作所 多層配線基板及びその製造方法
TW200733143A (en) * 2006-01-23 2007-09-01 Hitachi Metals Ltd Conductor paste, multilayer ceramic substrate and fabrication method of multilayer ceramic substrate
JP2007208193A (ja) 2006-02-06 2007-08-16 Alps Electric Co Ltd セラミック基板
JP2008186919A (ja) 2007-01-29 2008-08-14 Alps Electric Co Ltd 積層セラミック配線板
JP4573185B2 (ja) * 2007-10-18 2010-11-04 日立金属株式会社 セラミック積層基板ならびにセラミック積層電子部品の製造方法
JP2010171157A (ja) * 2009-01-22 2010-08-05 Sanyo Electric Co Ltd 電子素子用パッケージ及び電子部品
JP5024348B2 (ja) * 2009-03-23 2012-09-12 株式会社デンソー 基板の表面に樹脂絶縁膜のパターンを形成する方法及び半導体装置
US8563873B2 (en) * 2009-03-31 2013-10-22 Ibiden Co., Ltd. Substrate with metal film and method for manufacturing the same
CN104053302B (zh) * 2009-06-11 2017-08-29 罗杰斯公司 介电材料、由其形成子组件的方法以及由此形成的子组件
KR20110036149A (ko) * 2009-10-01 2011-04-07 삼성전기주식회사 다층 세라믹 기판 및 그 제조 방법
JP2012009609A (ja) * 2010-06-24 2012-01-12 Jtekt Corp 多層回路基板
JP2015038910A (ja) * 2012-07-13 2015-02-26 イビデン株式会社 配線板及びその製造方法
JP2015038909A (ja) * 2012-07-13 2015-02-26 イビデン株式会社 配線板及びその製造方法
JP6252000B2 (ja) * 2013-07-09 2017-12-27 三菱電機株式会社 基板
JP5999063B2 (ja) * 2013-10-08 2016-09-28 株式会社村田製作所 セラミック多層基板
WO2017047647A1 (ja) 2015-09-18 2017-03-23 株式会社村田製作所 セラミック多層基板
CN208597204U (zh) * 2016-01-07 2019-03-12 株式会社村田制作所 多层基板以及电子设备

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006041230A (ja) 2004-07-28 2006-02-09 Kyocera Corp 発光素子用配線基板ならびに発光装置

Also Published As

Publication number Publication date
JP7243856B2 (ja) 2023-03-22
US12133328B2 (en) 2024-10-29
CN114747301B (zh) 2024-06-04
CN114747301A (zh) 2022-07-12
JPWO2021095401A1 (https=) 2021-05-20
US20220272837A1 (en) 2022-08-25
WO2021095401A1 (ja) 2021-05-20

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