DE112016005916T5 - Mehrschichtsubstrat und Herstellungsverfahren desselben - Google Patents

Mehrschichtsubstrat und Herstellungsverfahren desselben Download PDF

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Publication number
DE112016005916T5
DE112016005916T5 DE112016005916.7T DE112016005916T DE112016005916T5 DE 112016005916 T5 DE112016005916 T5 DE 112016005916T5 DE 112016005916 T DE112016005916 T DE 112016005916T DE 112016005916 T5 DE112016005916 T5 DE 112016005916T5
Authority
DE
Germany
Prior art keywords
layer
connection surface
transmission line
ground
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE112016005916.7T
Other languages
German (de)
English (en)
Inventor
Kiyokazu Akiyama
Yasunari Yanagiba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Denso Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Corp filed Critical Denso Corp
Publication of DE112016005916T5 publication Critical patent/DE112016005916T5/de
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
    • H05K1/0251—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance related to vias or transitions between vias and transmission lines
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/024—Dielectric details, e.g. changing the dielectric material around a transmission line
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298—Multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W44/00—Electrical arrangements for controlling or matching impedance
    • H10W44/20—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/096—Vertically aligned vias, holes or stacked vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09618—Via fence, i.e. one-dimensional array of vias

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)
DE112016005916.7T 2015-12-22 2016-11-30 Mehrschichtsubstrat und Herstellungsverfahren desselben Pending DE112016005916T5 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2015-250184 2015-12-22
JP2015250184A JP6424811B2 (ja) 2015-12-22 2015-12-22 多層基板およびその多層基板の製造方法
PCT/JP2016/085488 WO2017110389A1 (ja) 2015-12-22 2016-11-30 多層基板およびその多層基板の製造方法

Publications (1)

Publication Number Publication Date
DE112016005916T5 true DE112016005916T5 (de) 2018-09-20

Family

ID=59089369

Family Applications (1)

Application Number Title Priority Date Filing Date
DE112016005916.7T Pending DE112016005916T5 (de) 2015-12-22 2016-11-30 Mehrschichtsubstrat und Herstellungsverfahren desselben

Country Status (6)

Country Link
US (1) US10356897B2 (https=)
JP (1) JP6424811B2 (https=)
KR (1) KR20180086228A (https=)
CN (1) CN108476592B (https=)
DE (1) DE112016005916T5 (https=)
WO (1) WO2017110389A1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020095092A1 (en) * 2018-11-06 2020-05-14 Aesa Sa Electromagnetic waveguide and microwave-frequency circuit

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11176308B1 (en) * 2020-06-19 2021-11-16 International Business Machines Corporation Extracting parasitic capacitance from circuit designs
US11314916B2 (en) 2020-07-31 2022-04-26 International Business Machines Corporation Capacitance extraction
CN219981140U (zh) * 2021-06-25 2023-11-07 株式会社村田制作所 多层基板、多层基板模块以及电子设备
KR102553362B1 (ko) 2022-01-26 2023-07-07 이지안 조적균열방지용 보강구 및 그 시공방법
US12372565B2 (en) * 2022-07-12 2025-07-29 Texas Instruments Incorporated Methods and apparatus for determining parasitic capacitances

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05160605A (ja) * 1991-12-09 1993-06-25 Murata Mfg Co Ltd 高周波回路部品
JP2664589B2 (ja) * 1992-05-18 1997-10-15 三洋電機株式会社 多層配線基板
JP4204150B2 (ja) * 1998-10-16 2009-01-07 パナソニック株式会社 多層回路基板
JP2002100901A (ja) * 2000-09-25 2002-04-05 Mitsubishi Electric Corp 多層平面型導波路
JP2004259959A (ja) * 2003-02-26 2004-09-16 Kyocera Corp 配線基板
DE102004060962A1 (de) * 2004-12-17 2006-07-13 Advanced Micro Devices, Inc., Sunnyvale Mehrlagige gedruckte Schaltung mit einer Durchkontaktierung für Hochfrequenzanwendungen
CN101662882B (zh) * 2005-01-25 2011-05-25 财团法人工业技术研究院 高频宽带阻抗匹配的传输孔
JP2009224638A (ja) * 2008-03-18 2009-10-01 Nec Corp 実装基板の伝送線路構造
JP2012129350A (ja) 2010-12-15 2012-07-05 Hitachi Ltd 多層プリント基板
JP6379453B2 (ja) * 2013-07-01 2018-08-29 富士通株式会社 配線基板及び電子装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020095092A1 (en) * 2018-11-06 2020-05-14 Aesa Sa Electromagnetic waveguide and microwave-frequency circuit

Also Published As

Publication number Publication date
KR20180086228A (ko) 2018-07-30
US20190008042A1 (en) 2019-01-03
JP6424811B2 (ja) 2018-11-21
US10356897B2 (en) 2019-07-16
CN108476592A (zh) 2018-08-31
WO2017110389A1 (ja) 2017-06-29
JP2017117890A (ja) 2017-06-29
CN108476592B (zh) 2021-04-13

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R012 Request for examination validly filed
R081 Change of applicant/patentee

Owner name: MURATA MANUFACTURING CO., LTD., NAGAOKAKYO-SHI, JP

Free format text: FORMER OWNER: DENSO CORPORATION, KARIYA-CITY, AICHI, JP

R082 Change of representative

Representative=s name: KUHNEN & WACKER PATENT- UND RECHTSANWALTSBUERO, DE

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Owner name: MURATA MANUFACTURING CO., LTD., NAGAOKAKYO-SHI, JP

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R016 Response to examination communication