DE112015005588T8 - Halbleitervorrichtung und herstellungsverfahren derselben - Google Patents
Halbleitervorrichtung und herstellungsverfahren derselben Download PDFInfo
- Publication number
- DE112015005588T8 DE112015005588T8 DE112015005588.6T DE112015005588T DE112015005588T8 DE 112015005588 T8 DE112015005588 T8 DE 112015005588T8 DE 112015005588 T DE112015005588 T DE 112015005588T DE 112015005588 T8 DE112015005588 T8 DE 112015005588T8
- Authority
- DE
- Germany
- Prior art keywords
- manufacturing
- semiconductor device
- method therefor
- therefor
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
- H01L29/0653—Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0692—Surface layout
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66666—Vertical transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7827—Vertical transistors
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014249818A JP6267102B2 (ja) | 2014-12-10 | 2014-12-10 | 半導体装置および半導体装置の製造方法 |
JP2014-249818 | 2014-12-10 | ||
PCT/JP2015/070890 WO2016092895A1 (ja) | 2014-12-10 | 2015-07-22 | 半導体装置および半導体装置の製造方法 |
Publications (3)
Publication Number | Publication Date |
---|---|
DE112015005588T5 DE112015005588T5 (de) | 2017-09-28 |
DE112015005588T8 true DE112015005588T8 (de) | 2018-01-18 |
DE112015005588B4 DE112015005588B4 (de) | 2018-07-12 |
Family
ID=56107095
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE112015005588.6T Expired - Fee Related DE112015005588B4 (de) | 2014-12-10 | 2015-07-22 | Halbleitervorrichtung und herstellungsverfahren derselben |
Country Status (5)
Country | Link |
---|---|
US (1) | US20170309716A1 (de) |
JP (1) | JP6267102B2 (de) |
CN (1) | CN107004715A (de) |
DE (1) | DE112015005588B4 (de) |
WO (1) | WO2016092895A1 (de) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107680934B (zh) * | 2017-11-01 | 2018-12-04 | 长鑫存储技术有限公司 | 薄膜层的形成方法 |
JP7168544B2 (ja) | 2019-12-06 | 2022-11-09 | ローム株式会社 | SiC半導体装置 |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5072266A (en) * | 1988-12-27 | 1991-12-10 | Siliconix Incorporated | Trench DMOS power transistor with field-shaping body profile and three-dimensional geometry |
KR950006483B1 (ko) * | 1990-06-13 | 1995-06-15 | 가부시끼가이샤 도시바 | 종형 mos트랜지스터와 그 제조방법 |
KR0159075B1 (ko) * | 1995-11-11 | 1998-12-01 | 김광호 | 트렌치 dmos장치 및 그의 제조방법 |
US6737716B1 (en) * | 1999-01-29 | 2004-05-18 | Kabushiki Kaisha Toshiba | Semiconductor device and method of manufacturing the same |
KR100399583B1 (ko) * | 1999-11-29 | 2003-09-26 | 한국전자통신연구원 | 자기 정렬 기술을 이용한 트렌치 게이트 전력 소자 제조방법 |
US6309929B1 (en) * | 2000-09-22 | 2001-10-30 | Industrial Technology Research Institute And Genetal Semiconductor Of Taiwan, Ltd. | Method of forming trench MOS device and termination structure |
JP4011848B2 (ja) * | 2000-12-12 | 2007-11-21 | 関西電力株式会社 | 高耐電圧半導体装置 |
US7638841B2 (en) * | 2003-05-20 | 2009-12-29 | Fairchild Semiconductor Corporation | Power semiconductor devices and methods of manufacture |
JP4232645B2 (ja) * | 2004-01-29 | 2009-03-04 | 富士電機デバイステクノロジー株式会社 | トレンチ横型半導体装置およびその製造方法 |
US8105903B2 (en) * | 2009-09-21 | 2012-01-31 | Force Mos Technology Co., Ltd. | Method for making a trench MOSFET with shallow trench structures |
JP5691259B2 (ja) | 2010-06-22 | 2015-04-01 | 株式会社デンソー | 半導体装置 |
US8722503B2 (en) * | 2010-07-16 | 2014-05-13 | Texas Instruments Incorporated | Capacitors and methods of forming |
CN102130150A (zh) * | 2010-12-13 | 2011-07-20 | 成都方舟微电子有限公司 | 半导体器件结终端结构 |
WO2012099079A1 (ja) * | 2011-01-17 | 2012-07-26 | 富士電機株式会社 | 半導体装置およびその製造方法 |
JP2013138137A (ja) * | 2011-12-28 | 2013-07-11 | Hitachi Ltd | 半導体装置及びその製造方法並びにそれを用いた電力変換装置 |
TWI480951B (zh) * | 2012-03-21 | 2015-04-11 | Pfc Device Corp | 用於半導體元件之寬溝渠終端結構 |
JP5811973B2 (ja) * | 2012-09-12 | 2015-11-11 | 住友電気工業株式会社 | 炭化珪素半導体装置の製造方法 |
-
2014
- 2014-12-10 JP JP2014249818A patent/JP6267102B2/ja active Active
-
2015
- 2015-07-22 DE DE112015005588.6T patent/DE112015005588B4/de not_active Expired - Fee Related
- 2015-07-22 CN CN201580066372.7A patent/CN107004715A/zh active Pending
- 2015-07-22 WO PCT/JP2015/070890 patent/WO2016092895A1/ja active Application Filing
- 2015-07-22 US US15/517,231 patent/US20170309716A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
CN107004715A (zh) | 2017-08-01 |
JP2016111287A (ja) | 2016-06-20 |
WO2016092895A1 (ja) | 2016-06-16 |
US20170309716A1 (en) | 2017-10-26 |
DE112015005588B4 (de) | 2018-07-12 |
DE112015005588T5 (de) | 2017-09-28 |
JP6267102B2 (ja) | 2018-01-24 |
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Legal Events
Date | Code | Title | Description |
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R012 | Request for examination validly filed | ||
R079 | Amendment of ipc main class |
Free format text: PREVIOUS MAIN CLASS: H01L0029780000 Ipc: H01L0029060000 |
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R081 | Change of applicant/patentee |
Owner name: TOYOTA JIDOSHA KABUSHIKI KAISHA, TOYOTA-SHI, JP Free format text: FORMER OWNER: TOYOTA JIDOSHA KABUSHIKI KAISHA, TOYOTA-SHI, AICHI, JP |
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R082 | Change of representative |
Representative=s name: WINTER, BRANDL - PARTNERSCHAFT MBB, PATENTANWA, DE Representative=s name: WINTER, BRANDL, FUERNISS, HUEBNER, ROESS, KAIS, DE |
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R016 | Response to examination communication | ||
R018 | Grant decision by examination section/examining division | ||
R084 | Declaration of willingness to licence | ||
R020 | Patent grant now final | ||
R119 | Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee |