DE112015000728B4 - Verfahren zum Herstellen eines epitaktischen Wafers und Substrat auf Siliziumbasis zum epitaktischen Wachstum - Google Patents

Verfahren zum Herstellen eines epitaktischen Wafers und Substrat auf Siliziumbasis zum epitaktischen Wachstum

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Publication number
DE112015000728B4
DE112015000728B4 DE112015000728.8T DE112015000728T DE112015000728B4 DE 112015000728 B4 DE112015000728 B4 DE 112015000728B4 DE 112015000728 T DE112015000728 T DE 112015000728T DE 112015000728 B4 DE112015000728 B4 DE 112015000728B4
Authority
DE
Germany
Prior art keywords
silicon
epitaxial
based substrate
terrace
section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE112015000728.8T
Other languages
German (de)
English (en)
Other versions
DE112015000728T5 (de
Inventor
Kazunori Hagimoto
Masaru Shinomiya
Keitaro Tsuchiya
Hirokazu Goto
Ken Sato
Hiroshi Shikauchi
Shoichi Kobayashi
Hirotaka Kurimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shin Etsu Handotai Co Ltd
Original Assignee
Shin Etsu Handotai Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Etsu Handotai Co Ltd filed Critical Shin Etsu Handotai Co Ltd
Publication of DE112015000728T5 publication Critical patent/DE112015000728T5/de
Application granted granted Critical
Publication of DE112015000728B4 publication Critical patent/DE112015000728B4/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/18—Epitaxial-layer growth characterised by the substrate
    • C30B25/183—Epitaxial-layer growth characterised by the substrate being provided with a buffer layer, e.g. a lattice matching layer
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/40—AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C30B29/403—AIII-nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02378—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/02428—Structure
    • H01L21/0243—Surface structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02458—Nitrides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Vapour Deposition (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
DE112015000728.8T 2014-03-04 2015-02-10 Verfahren zum Herstellen eines epitaktischen Wafers und Substrat auf Siliziumbasis zum epitaktischen Wachstum Active DE112015000728B4 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2014-041976 2014-03-04
JP2014041976A JP6157381B2 (ja) 2014-03-04 2014-03-04 エピタキシャルウェーハの製造方法及びエピタキシャルウェーハ
PCT/JP2015/000595 WO2015133063A1 (ja) 2014-03-04 2015-02-10 エピタキシャルウェーハの製造方法及びエピタキシャル成長用シリコン系基板

Publications (2)

Publication Number Publication Date
DE112015000728T5 DE112015000728T5 (de) 2017-05-11
DE112015000728B4 true DE112015000728B4 (de) 2025-12-24

Family

ID=54054884

Family Applications (1)

Application Number Title Priority Date Filing Date
DE112015000728.8T Active DE112015000728B4 (de) 2014-03-04 2015-02-10 Verfahren zum Herstellen eines epitaktischen Wafers und Substrat auf Siliziumbasis zum epitaktischen Wachstum

Country Status (7)

Country Link
US (1) US10319587B2 (enExample)
JP (1) JP6157381B2 (enExample)
KR (1) KR102262063B1 (enExample)
CN (1) CN106068547B (enExample)
DE (1) DE112015000728B4 (enExample)
TW (1) TWI647326B (enExample)
WO (1) WO2015133063A1 (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10388518B2 (en) 2017-03-31 2019-08-20 Globalwafers Co., Ltd. Epitaxial substrate and method of manufacturing the same
JP6879223B2 (ja) * 2018-01-18 2021-06-02 株式会社Sumco 貼り合わせウェーハの製造方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5882401A (en) 1996-08-27 1999-03-16 Shin-Etsu Handotai Co., Ltd. Method for manufacturing silicon single crystal substrate for use of epitaxial layer growth
US20130140567A1 (en) 2011-12-05 2013-06-06 Samsung Electronics Co., Ltd. Silicon substrate, epitaxial structure including the same, and method of manufacturing the silicon substrate

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59227117A (ja) 1983-06-08 1984-12-20 Nec Corp 半導体装置
JPS6230336A (ja) * 1985-07-31 1987-02-09 Fujitsu Ltd プラズマ酸化法
JP2007246289A (ja) 2004-03-11 2007-09-27 Nec Corp 窒化ガリウム系半導体基板の作製方法
JP2007204286A (ja) 2006-01-31 2007-08-16 Sumco Corp エピタキシャルウェーハの製造方法
JP5029234B2 (ja) * 2006-09-06 2012-09-19 株式会社Ｓｕｍｃｏ エピタキシャルウェーハの製造方法
KR100925359B1 (ko) * 2006-09-06 2009-11-09 가부시키가이샤 섬코 에피택셜 웨이퍼 및 그 제조 방법
JP5245180B2 (ja) * 2009-12-01 2013-07-24 三菱電機株式会社 半導体装置の製造方法
JP2011161975A (ja) 2010-02-05 2011-08-25 Toyota Motor Corp 車両のパワートレーン
JP5417211B2 (ja) 2010-02-10 2014-02-12 Ｄｏｗａエレクトロニクス株式会社 エピタキシャル成長基板及び半導体装置、エピタキシャル成長方法
JPWO2011161975A1 (ja) 2010-06-25 2013-08-19 Ｄｏｗａエレクトロニクス株式会社 エピタキシャル成長基板及び半導体装置、エピタキシャル成長方法
JP6026188B2 (ja) 2011-09-12 2016-11-16 住友化学株式会社 窒化物半導体結晶の製造方法
JP6130995B2 (ja) 2012-02-20 2017-05-17 サンケン電気株式会社 エピタキシャル基板及び半導体装置
EP3101160B1 (en) * 2014-01-28 2019-06-12 Sumitomo Chemical Company, Limited Semiconductor substrate manufacturing method
JP6261388B2 (ja) * 2014-03-05 2018-01-17 信越半導体株式会社 半導体エピタキシャルウェーハの製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5882401A (en) 1996-08-27 1999-03-16 Shin-Etsu Handotai Co., Ltd. Method for manufacturing silicon single crystal substrate for use of epitaxial layer growth
US20130140567A1 (en) 2011-12-05 2013-06-06 Samsung Electronics Co., Ltd. Silicon substrate, epitaxial structure including the same, and method of manufacturing the silicon substrate

Also Published As

Publication number Publication date
CN106068547B (zh) 2019-06-04
US10319587B2 (en) 2019-06-11
TW201600621A (zh) 2016-01-01
DE112015000728T5 (de) 2017-05-11
TWI647326B (zh) 2019-01-11
WO2015133063A1 (ja) 2015-09-11
JP6157381B2 (ja) 2017-07-05
CN106068547A (zh) 2016-11-02
KR20160127748A (ko) 2016-11-04
JP2015170616A (ja) 2015-09-28
US20160365239A1 (en) 2016-12-15
KR102262063B1 (ko) 2021-06-09

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