DE112007001240T5 - Integriertes Transistormodul mit doppelseitiger Kühlung und Verfahren zur Herstellung - Google Patents

Integriertes Transistormodul mit doppelseitiger Kühlung und Verfahren zur Herstellung Download PDF

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Publication number
DE112007001240T5
DE112007001240T5 DE112007001240T DE112007001240T DE112007001240T5 DE 112007001240 T5 DE112007001240 T5 DE 112007001240T5 DE 112007001240 T DE112007001240 T DE 112007001240T DE 112007001240 T DE112007001240 T DE 112007001240T DE 112007001240 T5 DE112007001240 T5 DE 112007001240T5
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Germany
Prior art keywords
transistor
module
drain
drain lines
pad
Prior art date
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Withdrawn
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DE112007001240T
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German (de)
English (en)
Inventor
Jonathan A. Noquil
Ruben P. Madrid
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fairchild Semiconductor Corp
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Fairchild Semiconductor Corp
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Filing date
Publication date
Priority claimed from US11/740,475 external-priority patent/US7777315B2/en
Application filed by Fairchild Semiconductor Corp filed Critical Fairchild Semiconductor Corp
Publication of DE112007001240T5 publication Critical patent/DE112007001240T5/de
Withdrawn legal-status Critical Current

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    • H01L23/495Lead-frames or other flat leads
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Geometry (AREA)
  • Manufacturing & Machinery (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Dc-Dc Converters (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
DE112007001240T 2006-05-19 2007-05-21 Integriertes Transistormodul mit doppelseitiger Kühlung und Verfahren zur Herstellung Withdrawn DE112007001240T5 (de)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US80218106P 2006-05-19 2006-05-19
US60/802,181 2006-05-19
US11/740,475 2007-04-26
US11/740,475 US7777315B2 (en) 2006-05-19 2007-04-26 Dual side cooling integrated power device module and methods of manufacture
US91699407P 2007-05-09 2007-05-09
US60/916,994 2007-05-09
PCT/US2007/069362 WO2007137221A2 (en) 2006-05-19 2007-05-21 Dual side cooling integrated transistor module and methods of manufacture

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DE112007001240T5 true DE112007001240T5 (de) 2009-04-23

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DE112007001240T Withdrawn DE112007001240T5 (de) 2006-05-19 2007-05-21 Integriertes Transistormodul mit doppelseitiger Kühlung und Verfahren zur Herstellung

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JP (1) JP2009545862A (ja)
KR (1) KR101157305B1 (ja)
CN (1) CN101473423B (ja)
DE (1) DE112007001240T5 (ja)
TW (1) TWI452662B (ja)
WO (1) WO2007137221A2 (ja)

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JP5822468B2 (ja) * 2011-01-11 2015-11-24 ローム株式会社 半導体装置
CN102832190B (zh) * 2011-06-14 2015-02-04 万国半导体股份有限公司 一种倒装芯片的半导体器件及制造方法
WO2013157172A1 (ja) * 2012-04-20 2013-10-24 パナソニック株式会社 半導体パッケージ及びその製造方法、半導体モジュール、並びに半導体装置
US9355942B2 (en) * 2014-05-15 2016-05-31 Texas Instruments Incorporated Gang clips having distributed-function tie bars
US10438900B1 (en) * 2018-03-29 2019-10-08 Alpha And Omega Semiconductor (Cayman) Ltd. HV converter with reduced EMI
US20210082790A1 (en) * 2019-09-18 2021-03-18 Alpha And Omega Semiconductor (Cayman) Ltd. Power semiconductor package having integrated inductor and method of making the same
US11309233B2 (en) * 2019-09-18 2022-04-19 Alpha And Omega Semiconductor (Cayman), Ltd. Power semiconductor package having integrated inductor, resistor and capacitor
CN113410185B (zh) * 2021-06-04 2021-12-14 深圳真茂佳半导体有限公司 功率半导体器件封装结构及其制造方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5877555A (en) * 1996-12-20 1999-03-02 Ericsson, Inc. Direct contact die attach
JP4173751B2 (ja) * 2003-02-28 2008-10-29 株式会社ルネサステクノロジ 半導体装置
TWI265611B (en) * 2003-03-11 2006-11-01 Siliconware Precision Industries Co Ltd Semiconductor package with heatsink
JP2005217072A (ja) * 2004-01-28 2005-08-11 Renesas Technology Corp 半導体装置
WO2005122249A2 (en) * 2004-06-03 2005-12-22 International Rectifier Corporation Semiconductor device module with flip chip devices on a common lead frame
JP2006073655A (ja) * 2004-08-31 2006-03-16 Toshiba Corp 半導体モジュール
US7476976B2 (en) * 2005-02-23 2009-01-13 Texas Instruments Incorporated Flip chip package with advanced electrical and thermal properties for high current designs
US7504733B2 (en) * 2005-08-17 2009-03-17 Ciclon Semiconductor Device Corp. Semiconductor die package
TW200739758A (en) 2005-12-09 2007-10-16 Fairchild Semiconductor Corporaton Device and method for assembling a top and bottom exposed packaged semiconductor

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