DE102012111654A1 - Elektronisches Bauelement und ein Verfahren zur Herstellung eines elektronischen Bauelements - Google Patents
Elektronisches Bauelement und ein Verfahren zur Herstellung eines elektronischen Bauelements Download PDFInfo
- Publication number
- DE102012111654A1 DE102012111654A1 DE102012111654A DE102012111654A DE102012111654A1 DE 102012111654 A1 DE102012111654 A1 DE 102012111654A1 DE 102012111654 A DE102012111654 A DE 102012111654A DE 102012111654 A DE102012111654 A DE 102012111654A DE 102012111654 A1 DE102012111654 A1 DE 102012111654A1
- Authority
- DE
- Germany
- Prior art keywords
- layer
- electronic component
- component according
- carrier
- solder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 10
- 239000010410 layer Substances 0.000 claims abstract description 128
- 239000004065 semiconductor Substances 0.000 claims abstract description 43
- 229910000679 solder Inorganic materials 0.000 claims abstract description 39
- 239000000758 substrate Substances 0.000 claims abstract description 28
- 239000012790 adhesive layer Substances 0.000 claims abstract description 27
- 239000002346 layers by function Substances 0.000 claims abstract description 21
- 239000000463 material Substances 0.000 claims description 20
- 239000002184 metal Substances 0.000 claims description 19
- 229910052751 metal Inorganic materials 0.000 claims description 19
- 238000000034 method Methods 0.000 claims description 19
- 229910052709 silver Inorganic materials 0.000 claims description 16
- 229910045601 alloy Inorganic materials 0.000 claims description 15
- 239000000956 alloy Substances 0.000 claims description 15
- 229910052802 copper Inorganic materials 0.000 claims description 14
- 238000000151 deposition Methods 0.000 claims description 13
- 239000011241 protective layer Substances 0.000 claims description 10
- 229910052737 gold Inorganic materials 0.000 claims description 7
- 229910052719 titanium Inorganic materials 0.000 claims description 7
- 229910052782 aluminium Inorganic materials 0.000 claims description 6
- 229910052697 platinum Inorganic materials 0.000 claims description 5
- 229910052759 nickel Inorganic materials 0.000 claims description 4
- 229910052718 tin Inorganic materials 0.000 claims description 4
- 229910052738 indium Inorganic materials 0.000 claims description 3
- 229910052763 palladium Inorganic materials 0.000 claims description 3
- 238000005240 physical vapour deposition Methods 0.000 claims description 3
- 229910052725 zinc Inorganic materials 0.000 claims description 3
- 229910006164 NiV Inorganic materials 0.000 claims description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 2
- 230000004888 barrier function Effects 0.000 claims description 2
- 229910052793 cadmium Inorganic materials 0.000 claims description 2
- 229910052804 chromium Inorganic materials 0.000 claims description 2
- 229910052742 iron Inorganic materials 0.000 claims description 2
- 229910052710 silicon Inorganic materials 0.000 claims description 2
- 239000010703 silicon Substances 0.000 claims description 2
- 229910016347 CuSn Inorganic materials 0.000 claims 1
- 229910007637 SnAg Inorganic materials 0.000 claims 1
- 230000008021 deposition Effects 0.000 description 5
- 230000008569 process Effects 0.000 description 5
- 238000005476 soldering Methods 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- 229910002056 binary alloy Inorganic materials 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 229910015363 Au—Sn Inorganic materials 0.000 description 1
- 229910000905 alloy phase Inorganic materials 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000001351 cycling effect Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000004070 electrodeposition Methods 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 239000012467 final product Substances 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000010587 phase diagram Methods 0.000 description 1
- 239000010970 precious metal Substances 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
- 230000008023 solidification Effects 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 235000012431 wafers Nutrition 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/4827—Materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
- H01L23/49513—Lead-frames or other flat leads characterised by the die pad having bonding material between chip and die pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
- H01L23/49582—Metallic layers on lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/07—Structure, shape, material or disposition of the bonding areas after the connecting process
- H01L24/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/034—Manufacturing methods by blanket deposition of the material of the bonding area
- H01L2224/0343—Manufacturing methods by blanket deposition of the material of the bonding area in solid form
- H01L2224/03436—Lamination of a preform, e.g. foil, sheet or layer
- H01L2224/03438—Lamination of a preform, e.g. foil, sheet or layer the preform being at least partly pre-patterned
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/034—Manufacturing methods by blanket deposition of the material of the bonding area
- H01L2224/03444—Manufacturing methods by blanket deposition of the material of the bonding area in gaseous form
- H01L2224/0345—Physical vapour deposition [PVD], e.g. evaporation, or sputtering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04026—Bonding areas specifically adapted for layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05075—Plural internal layers
- H01L2224/0508—Plural internal layers being stacked
- H01L2224/05083—Three-layer arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05124—Aluminium [Al] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05139—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05166—Titanium [Ti] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05171—Chromium [Cr] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05184—Tungsten [W] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05639—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05644—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05647—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05655—Nickel [Ni] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05663—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05669—Platinum [Pt] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/07—Structure, shape, material or disposition of the bonding areas after the connecting process
- H01L2224/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
- H01L2224/085—Material
- H01L2224/08501—Material at the bonding interface
- H01L2224/08503—Material at the bonding interface comprising an intermetallic compound
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
- H01L2224/27444—Manufacturing methods by blanket deposition of the material of the layer connector in gaseous form
- H01L2224/2745—Physical vapour deposition [PVD], e.g. evaporation, or sputtering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29075—Plural core members
- H01L2224/2908—Plural core members being stacked
- H01L2224/29082—Two-layer arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29075—Plural core members
- H01L2224/2908—Plural core members being stacked
- H01L2224/29084—Four-layer arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/29105—Gallium [Ga] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/29109—Indium [In] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/29111—Tin [Sn] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/29113—Bismuth [Bi] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/29118—Zinc [Zn] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/29124—Aluminium [Al] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29139—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29144—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29147—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29155—Nickel [Ni] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/29166—Titanium [Ti] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/29169—Platinum [Pt] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/29171—Chromium [Cr] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/29184—Tungsten [W] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/325—Material
- H01L2224/32501—Material at the bonding interface
- H01L2224/32503—Material at the bonding interface comprising an intermetallic compound
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/325—Material
- H01L2224/32505—Material outside the bonding interface, e.g. in the bulk of the layer connector
- H01L2224/32507—Material outside the bonding interface, e.g. in the bulk of the layer connector comprising an intermetallic compound
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83399—Material
- H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/83438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/83439—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83399—Material
- H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/83438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/83444—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83399—Material
- H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/83438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/83447—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83399—Material
- H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/83438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/83455—Nickel [Ni] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83399—Material
- H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/83438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/8346—Iron [Fe] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83399—Material
- H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/83463—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/83464—Palladium [Pd] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83399—Material
- H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/83463—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/83469—Platinum [Pt] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83801—Soldering or alloying
- H01L2224/83815—Reflow soldering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01028—Nickel [Ni]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01048—Cadmium [Cd]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01327—Intermediate phases, i.e. intermetallics compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/146—Mixed devices
- H01L2924/1461—MEMS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/171—Frame
- H01L2924/176—Material
- H01L2924/177—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2924/17738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/171—Frame
- H01L2924/176—Material
- H01L2924/177—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2924/17738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
- H01L2924/17747—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/171—Frame
- H01L2924/176—Material
- H01L2924/177—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2924/17738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
- H01L2924/1776—Iron [Fe] as principal constituent
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Die Bonding (AREA)
Abstract
Das elektronische Bauelement enthält einen Träger, ein an dem Träger angebrachtes Halbleiter-Substrat und ein zwischen dem Halbleiter-Substrat und dem Träger angeordnetes Schichtsystem. Das Schichtsystem enthält eine auf dem Halbleiter-Substrat angeordnete elektrische Kontaktschicht. Eine Funktionsschicht ist auf der elektrischen Kontaktschicht angeordnet. Eine Klebeschicht ist auf der Funktionsschicht angeordnet. Eine Lötschicht ist zwischen der Klebeschicht und dem Träger angeordnet.
Description
- TECHNISCHES GEBIET
- Die vorliegende Erfindung betrifft ein elektronisches Bauelement und ein Verfahren zur Herstellung eines elektronischen Bauelements.
- HINTERGRUND
- Zur Herstellung von elektronischen Bauelementen werden sehr oft Halbleiterchips, Halbleiter-Dies, Halbleiter-Substrate oder Halbleiter-Wafer auf Trägern wie z. B. Leadframes aufgebracht. Das einzige erhältliche hochleitfähige Die-Befestigungsmaterial für Leistungshalbleiterchips mit hoher Temperaturwechsellast und hoher Heißlagerungssicherheit ist derzeit die AuSn-Diffusionslöt-Die-Befestigung. Hier handelt es sich bei dem Die-Befestigungsmaterial um eine AuSn-Legierung mit einem Au-Anteil von ungefähr 80%. Damit ist die Au-Sn-Lösung aufgrund der hohen Kosten auf eine geringe Lötschichtdicke beschränkt, was gewöhnlich zu einem mit Schwierigkeiten behafteten Die-Befestigungsprozess führt.
- KURZE BESCHREIBUNG DER ZEICHNUNGEN
- Die begleitenden Zeichnungen liegen bei, um ein eingehenderes Verständnis von Ausführungsformen zu bieten, und sind in diese Patentschrift miteinbezogen und bilden einen Teil davon. Die Zeichnungen veranschaulichen Ausführungsformen und dienen gemeinsam mit der Beschreibung der Erklärung der Ausführungsprinzipien. Andere Ausführungsformen und viele der vorgesehenen Vorteile der Ausführungsformen gewinnen ohne weiteres an Wert, wenn sie anhand der folgenden ausführlichen Beschreibung besser verstanden werden. Die Elemente der Zeichnungen sind nicht unbedingt zueinander maßstabsgetreu. Gleiche Bezugszahlen bezeichnen entsprechende ähnliche Teile.
-
1 zeigt eine schematische Querschnittseitenansichtsdarstellung eines erfindungsgemäßen elektronischen Bauelements; -
2a und2b zeigen schematische Querschnittseitenansichtsdarstellungen zur Veranschaulichung wesentlicher Mechanismen des Bondprozesses; -
3 zeigt ein Flussdiagramm zur Veranschaulichung eines Verfahrens zur Herstellung eines erfindungsgemäßen elektronischen Bauelements; und -
4 zeigt eine schematische Querschnittseitenansichtsdarstellung eines Trägers und eines Halbleiter-Substrats zusammen mit einem Schichtstapel zur Veranschaulichung eines Verfahrens zur Herstellung eines erfindungsgemäßen elektronischen Bauelements. - AUSFÜHRLICHE BESCHREIBUNG VERANSCHAULICHENDER AUSFÜHRUNGSFORMEN
- Die Aspekte und Ausführungsformen werden nun anhand der Zeichnungen beschrieben, in denen stets gleiche Bezugszahlen allgemein zum Bezug auf gleiche Elemente verwendet werden. In der folgenden Beschreibung werden aus Erklärungsgründen zahlreiche spezifische Einzelheiten der Reihenfolge nach aufgezählt, um ein gründliches Verständnis eines Aspekts oder mehrerer Aspekte der Ausführungsformen zu geben. Einem Fachmann kann es jedoch offensichtlich sein, dass ein Aspekt oder mehrere Aspekte der Ausführungsformen auch mit einem geringeren Ausmaß an spezifischen Einzelheiten ausgeführt werden kann/können. In anderen Fällen sind bekannte Strukturen und Elemente in schematischer Form gezeigt, um die Beschreibung eines Aspekts oder mehrerer Aspekte der Ausführungsformen zu erleichtern. Es versteht sich, dass andere Ausführungsformen verwendet werden und bauliche oder logische Änderungen stattfinden können, ohne vom Schutzbereich der vorliegenden Erfindung abzuweichen. Man beachte weiterhin, dass die Zeichnungen nicht oder nicht unbedingt maßstabsgetreu sind.
- Auch wenn möglicherweise ein jeweiliges Merkmal oder ein jeweiliger Aspekt einer Ausführungsform nur mit Bezug auf eine von mehreren Implementierungen offenbart ist, kann ein solches Merkmal oder ein solcher Aspekt zusätzlich mit einem oder mehreren anderen Merkmalen oder Aspekten der anderen Implementierungen kombiniert werden, wenn dies bei einer bestimmten oder jeweiligen Anwendung erwünscht und vorteilhaft sein kann. Wenn in der ausführlichen Beschreibung oder den Ansprüchen die Begriffe „enthalten”, „aufweisen”, „mit” oder andere Variationen davon verwendet werden, sollen solche Begriffe ferner ähnlich dem Begriff „umfassen” als einschließend betrachtet werden. Auch werden möglicherweise die Begriffe „gekoppelt” und „verbunden” zusammen mit Ableitungen verwendet. Es versteht sich, dass diese Begriffe verwendet werden können, um anzuzeigen, dass zwei Elemente miteinander kooperieren oder zusammenwirken, ob sie sich in direktem physischem oder elektrischem Kontakt miteinander befinden oder sich nicht in direktem Kontakt miteinander befinden. Der Begriff „beispielhaft” ist lediglich als Beispiel zu verstehen, und nicht als der beste oder optimale Fall. Somit soll die folgende ausführliche Beschreibung nicht im einschränkenden Sinn aufgefasst werden, und der Schutzumfang der vorliegenden Erfindung wird durch die angehängten Ansprüche definiert.
- Bei den Ausführungsformen eines elektronischen Bauelements und eines Verfahrens zur Herstellung eines elektronischen Bauelements können verschiedene Arten von Halbleiterchips oder von in den Halbleiterchips integrierten Schaltungen Verwendung finden, darunter logische integrierte Schaltungen, analoge integrierte Schaltungen, integrierte Mischsignalschaltungen, MEMS (mikroelektromechanische Systeme), integrierte Leistungsschaltungen, Chips mit integrierten Passiva usw. Bei den Ausführungsformen können außerdem Halbleiterchips, die MOS-Transistorstrukturen oder Vertikaltransistorstrukturen wie zum Beispiel IGBT-Strukturen (IGBT-Bipolartransistor mit isolierter Gate-Elektrode) oder allgemein Transistorstrukturen, bei denen mindestens ein elektrischer Kontaktanschluss auf einer ersten Hauptfläche des Halbleiterchips liegt und mindestens ein anderer elektrischer Kontaktanschluss auf einer der ersten Hauptfläche des Halbleiterchips gegenüberliegenden zweiten Hauptfläche des Halbleiterchips liegt, verwendet werden.
- Bei mehreren Ausführungsformen werden Schichten oder Schichtstapel aufeinander aufgebracht oder Materialien werden auf Schichten aufgebracht oder darauf abgeschieden. Es versteht sich, dass alle derartigen Begriffe wie „aufgebracht” oder „abgeschieden” buchstäblich alle Arten und Techniken zum Aufeinanderaufbringen von Schichten einschließen sollen. Insbesondere sollen sie Techniken einschließen, bei denen Schichten als Ganzes in einem Zug aufgebracht werden, wie zum Beispiel Laminierungstechniken sowie Techniken, bei denen Schichten sequenziell abgeschieden werden, wie zum Beispiel Sputtern, galvanischer Überzug, Verkapselung, Gasphasenabscheidung (CVD) usw.
-
1 zeigt eine schematische Querschnittseitenansichtsdarstellung eines erfindungsgemäßen elektronischen Bauelements. Das elektronische Bauelement10 von1 umfasst einen Träger1 mit einer metallischen Oberfläche, ein Halbleiter-Substrat2 und ein zwischen dem Halbleiter-Substrat2 und dem Träger1 angeordnetes Schichtsystem3 . Das Schichtsystem3 umfasst eine auf dem Halbleiter-Substrat2 angeordnete elektrische Kontaktschicht3.1 , eine auf der elektrischen Kontaktschicht3.1 angeordnete Funktionsschicht3.2 , eine auf der Funktionsschicht3.2 angeordnete Klebeschicht3.3 , und eine zwischen der Klebeschicht3.3 und dem Träger1 angeordnete Lötschicht3.4 . - Gemäß einer Ausführungsform des elektronischen Bauelements
10 besteht das Halbleiter-Substrat2 aus einem siliziumbasierten Halbleitermaterial, z. B. ein Substrat aus Si, SiC oder einem anderen siliziumbasierten Material oder einem Verbindungshalbleitermaterial wie z. B. einem III-V-Material wie z. B. GaN. Das Halbleiter-Substrat kann an seiner unteren Oberfläche einen elektrischen Kontaktanschluss, der durch einen hochdotierten n+- oder p+-Bereich ausgebildet ist, umfassen. - Gemäß einer Ausführungsform des elektronischen Bauelements
10 umfasst die elektrische Kontaktschicht3.1 eine Einzelelementschicht aus Al, Ti, Ag oder Cr, oder eine Legierung, die eines oder mehrere dieser Elemente und möglicherweise weitere Elemente enthält. - Gemäß einer Ausführungsform des elektronischen Bauelements
10 besteht die Funktionsschicht3.2 aus einer Sperrschicht. Insbesondere besteht die Funktionsschicht aus einem Material wie Ti, TiW oder W, oder aus Legierungen, die eines oder mehrere dieser Materialien enthalten. - Gemäß einer Ausführungsform des elektronischen Bauelements
10 umfasst die Klebeschicht3.3 eine Einzelelementschicht aus Cu, Au, Ag, Pt oder Ni, oder eine Legierung, die eines oder mehrere dieser Elemente und möglicherweise weitere Elemente enthält. - Gemäß einer Ausführungsform des elektronischen Bauelements
10 umfasst die Lötschicht3.4 eine Einzelelementschicht aus Sn, Zn, In, Ga, Bi oder Cd, oder eine Legierung, die eines oder mehrere dieser Elemente und möglicherweise weitere Elemente enthält. - Gemäß einer Ausführungsform des elektronischen Bauelements
10 umfasst die Lötschicht3.4 ein Einzelelementlötmaterial, das nicht zur Phasenbildung während der Abscheidung neigt. Zusätzlich kann das Lötmaterial selbst frei von Edelmetall, und daher deutlich billiger, sein. Aufgrund der geringeren Kosten kann es viel dicker als AuSn aufgetragen werden, wodurch sich der Die-Befestigungsprozess erleichtert. Abhängig vom Lötmaterial kann die Löttemperatur auch deutlich verringert werden, was zu höherer Beständigkeit führt, da durch die isotherme Erstarrung des Lötmaterials weniger Belastung auf die Lötstelle ausgeübt wird. - Gemäß einer Ausführungsform des elektronischen Bauelements
10 weist der Träger1 einen Metallträger auf, welcher insbesondere Cu, Ni oder Fe oder eine Legierung aufweist, die eines oder mehrere dieser Elemente und möglicherweise weitere Elemente enthält. - Gemäß einer Ausführungsform des elektronischen Bauelements
10 ist der Träger1 mit einer oder mehreren Metallschichten beschichtet. In diesem Fall kann der Träger1 selbst aus einem nichtmetallischen Träger wie zum Beispiel einem Träger aus einem Keramikmaterial wie Aluminiumoxid bestehen. Insbesondere besteht die oberste Metallschicht aus Au, Ag, Cu, Pd oder Pt, oder aus einer Legierung aus einem oder mehreren dieser Elemente. - Gemäß einer Ausführungsform des elektronischen Bauelements
10 werden zwischen dem Träger1 und der Lötschicht3.4 oder zwischen einer auf dem Träger1 angeordneten Metallschicht und der Lötschicht3.4 intermetallische Phasen gebildet. - Gemäß einer Ausführungsform des elektronischen Bauelements
10 werden zwischen der Klebeschicht3.3 und der Lötschicht3.4 intermetallische Phasen gebildet. - Gemäß einer Ausführungsform des elektronischen Bauelements
10 sind die Klebeschicht3.3 und die Oberfläche des Trägers1 oder die Oberfläche einer Metallschicht, mit der die Trägeroberfläche beschichtet ist, aus dem gleichen Grundmaterial gebildet. Insbesondere besteht das Grundmaterial aus Cu, Ag, NiV, Ni oder NiNiP. - Gemäß einer Ausführungsform des elektronischen Bauelements
10 weist der Träger1 ein Leadframe auf. - Gemäß einer Ausführungsform des elektronischen Bauelements
10 ist das Schichtsystem3 frei von Au. - Gemäß einer Ausführungsform des elektronischen Bauelements
10 weist das Halbleiter-Substrat2 eine Dicke im Bereich von 5 μm bis 500 μm auf. - Gemäß einer Ausführungsform des elektronischen Bauelements
10 weist die elektrische Kontaktschicht3.1 eine Dicke im Bereich von 100 nm bis 1 μm auf. - Gemäß einer Ausführungsform des elektronischen Bauelements
10 weist die Funktionsschicht3.2 eine Dicke im Bereich von 50 nm bis 200 nm auf. - Gemäß einer Ausführungsform des elektronischen Bauelements
10 weist die Klebeschicht3.3 eine Dicke im Bereich von 200 nm bis 2 μm auf. - Gemäß einer Ausführungsform des elektronischen Bauelements
10 weist die Lötschicht3.4 eine Dicke im Bereich von 1 μm bis 5 μm auf. - Man beachte, dass die obenerwähnten Dickenbereiche auch alle Inkrementalwerte einschließen.
- Es wurde festgestellt, dass man gute Resultate erzielen kann, wenn die Klebeschicht
3.3 und die Oberfläche des Trägers1 , d. h. das Grundmaterial des Trägers1 oder eine oberste Metallschicht, mit der der Träger1 beschichtet ist, aus dem gleichen Grundmaterial, z. B. Cu/Cu, Ag/Ag, NiV/Ni oder NiV/NiNiP, bestehen, was ein binäres oder quasi-binäres Legierungssystem erzeugt, das in der Lötstelle eine charakteristische Schichtstruktur ausbildet. Die Schichtstruktur stellt im Prinzip die Phasenanteile dar, die in einem Phasendiagramm einer binären Legierung angezeigt werden, wobei die Struktur mit einem zweiseitigen Diffusionspaar von, in diesem Fall, Cu/Sn vergleichbar ist. -
2a und2b zeigen schematische Querschnittseitenansichtsdarstellungen zur Veranschaulichung einer Schichtstruktur gemäß einer Ausführung zur Veranschaulichung des Bondmechanismus.2a zeigt den Träger1 und aus dem Schichtstapel3 sind nur die Klebeschicht3.3 und die Lötschicht3.4 vor dem Bondprozess gezeigt.2b zeigt die Schichtstruktur nach dem Bondprozess. Es ist ersichtlich, dass sich auf beiden Seiten der Lötschicht3.4 intermetallische Phasenschichten gebildet haben. In2b ist eine erste intermetallische Phasenschicht3.5 zwischen der Klebeschicht3.3 und der Lötschicht3.4 ausgebildet und eine zweite intermetallische Phasenschicht3.6 ist zwischen der Lötschicht3.4 und dem Träger1 ausgebildet. Die erste intermetallische Phasenschicht3.5 ist reich an dem Metall der Klebeschicht3.3 und die zweite intermetallische Phasenschicht3.6 ist reich an dem Metall der Oberfläche des Trägers1 . Die restliche Zwischenlötschicht3.4 ist noch immer reich an dem Metall der anfänglichen Lötschicht3.4 . Wenn die Materialien des Trägers1 und der Klebeschicht3.3 identisch sind, und abhängig von der Schichtdicke, bildet sich möglicherweise nur eine homogene Schicht einer Legierungsphase statt der Lötschicht3.4 , der ersten intermetallischen Phasenschicht3.5 und der zweiten intermetallischen Phasenschicht3.6 . Je nach der verwendeten Materialkombination können sich auch mehr als zwei unterschiedliche Schichten an der Verbindungsstelle bilden. -
3 zeigt ein Flussdiagramm zur Veranschaulichung eines Verfahrens zur Herstellung eines erfindungsgemäßen elektronischen Bauelements. Das Verfahren30 umfasst die Bereitstellung eines Halbleiter-Substrats (31 ), das Abscheiden einer elektrischen Kontaktschicht auf dem Halbleiter-Substrat (32 ), das Abscheiden einer Funktionsschicht auf der elektrischen Kontaktschicht (33 ), das Abscheiden einer Klebeschicht auf der Funktionsschicht (34 ), das Abscheiden einer Lötschicht auf der Klebeschicht (35 ), das Abscheiden einer Schutzschicht auf der Lötschicht (36 ) und das Anbringen des Halbleiter-Substrats auf einem Träger (37 ). - Gemäß einer Ausführungsform des Verfahrens
30 umfasst das Verfahren weiterhin das Abscheiden einer oder mehrerer der folgenden Schichten: der elektrischen Kontaktschicht, der Funktionsschicht, der Klebeschicht, der Lötschicht und der Schutzschicht mittels physikalischer Dampfabscheidung oder Sputtern, insbesondere innerhalb derselben Verarbeitungsvorrichtung. - Gemäß einer Ausführungsform des Verfahrens
30 besteht die elektrische Kontaktschicht aus einer Al- oder Ti-Schicht, die Funktionsschicht aus einer Ti-, TiW- oder W-Schicht, die Klebeschicht aus einer Cu- oder Ag-Schicht, die Lötschicht aus einer Sn-Schicht und die Schutzschicht aus einer Ag- oder Au-Schicht. - Weitere Ausführungsformen des Verfahrens
30 können durch Einbeziehung eines Merkmals, das oben in Verbindung mit den Ausführungsformen von1 und2 beschrieben wurde, in3 gebildet werden. -
4 zeigt eine schematische Querschnittseitenansichtsdarstellung eines Trägers und eines Halbleiter-Substrats zusammen mit einem Schichtstapel zur Veranschaulichung eines Verfahrens zur Herstellung eines erfindungsgemäßen elektronischen Bauelements.4 zeigt im Wesentlichen einen Träger41 , insbesondere einen Leadframe, und ein Halbleiter-Substrat42 , das mit dem Träger41 gebondet werden soll. Zu diesem Zweck wird daraufhin ein Schichtstapel43 auf die untere Oberfläche des Halbleiter-Substrats42 abgeschieden. In einem ersten Schritt wird eine elektrische Kontaktschicht43.1 auf der unteren Oberfläche des Halbleiter-Substrats42 abgeschieden. In einem zweiten Schritt wird eine Funktionsschicht43.2 auf der elektrischen Kontaktschicht43.1 abgeschieden. In einem dritten Schritt wird eine Klebeschicht43.3 auf der Funktionsschicht43.2 abgeschieden. In einem vierten Schritt wird eine Lötschicht43.4 auf der Klebeschicht43.3 abgeschieden. In einem fünften Schritt wird eine Schutzschicht43.5 auf der Lötschicht43.4 abgeschieden. Die Abscheidungsprozesse können mittels physikalischer Dampfabscheidung oder Sputtern stattfinden. - Gemäß einer Ausführungsform hat die Schutzschicht
43.5 eine Dicke in einem Bereich von 50 nm bis 300 nm. Somit kann die Schutzschicht43.5 so dünn hergestellt werden, dass sie im Endprodukt wie dem in1 gezeigten praktisch verschwindet. Die Schutzschicht43.5 verhindert eine Oxidierung der Lötschicht43.4 . - In der Ausführungsform von
4 werden eine oder mehr Metallschichten41.1 auf dem Träger41 abgeschieden. Die Metallschicht41.1 bzw. die oberste Metallschicht, wenn zwei oder mehr Metallschichten vorhanden sind, besteht aus Au, Ag, Cu, Pd oder Pt, oder aus einer Legierung eines oder mehrerer dieser Elemente. - Schließlich wird nach der Herstellung des Schichtstapels
43 das Halbleiter-Substrat42 zusammen mit dem Schichtstapel43 auf der oberen Oberfläche des Trägers41 bzw. der oberen Oberfläche der obersten Metallschicht41.1 gebondet. - Zusätzlich sollte bemerkt werden, dass das aus dem Halbleiter-Substrat
42 und dem Schichtstapel43 bestehende System bei einer Die-Befestigungstemperatur von 300°C gelötet werden kann, was zu einer geringeren Die-Befestigungsbelastung verglichen mit den 350°C, mit der die AuSn-Lötschicht derzeit befestigt wird, führt. - Obwohl die Erfindung mit Bezug auf eine oder mehrere Implementierungen dargestellt und beschrieben wurde, können Änderungen und/oder Modifikationen an den veranschaulichten Beispielen vorgenommen werden, ohne von dem Gedanken und Schutzumfang der angehängten Ansprüche abzuweichen. In besonderem Hinblick auf die verschiedenen durch die oben beschriebenen Komponenten oder Strukturen (Baugruppen, Bauelemente, Schaltungen, Systeme usw.) ausgeführten Funktionen sollen die zur Beschreibung solcher Komponenten verwendeten Begriffe (einschließlich eines Verweises auf ein ”Mittel”), sofern nicht anders angegeben, eine beliebige Komponente oder Struktur bezeichnen, die die spezifizierte Funktion der beschriebenen Komponente ausführt (z. B. die funktional äquivalent ist), auch wenn sie strukturell nicht mit der offenbarten Struktur, die die Funktion in den hier dargestellten beispielhaften Implementierungen der Erfindung ausführt, äquivalent ist.
Claims (24)
- Elektronisches Bauelement, umfassend: einen Träger mit einer metallischen Oberfläche; ein an dem Träger angebrachtes Halbleiter-Substrat; und ein zwischen dem Halbleiter-Substrat und dem Träger angeordnetes Schichtsystem; umfassend: eine auf dem Halbleiter-Substrat angeordnete elektrische Kontaktschicht; eine auf der elektrischen Kontaktschicht angeordnete Funktionsschicht; eine auf der Funktionsschicht angeordnete Klebeschicht; und eine zwischen der Klebeschicht und dem Träger angeordnete Lötschicht.
- Elektronisches Bauelement nach Anspruch 1, wobei das Halbleiter-Substrat ein siliziumbasiertes Halbleitermaterial umfasst.
- Elektronisches Bauelement nach Anspruch 1 oder 2, wobei die elektrische Kontaktschicht eine Einzelelementschicht aus Al, Ti, Ag oder Cr, oder eine Legierung aus einem oder mehrerer dieser Elemente umfasst.
- Elektronisches Bauelement nach einem der vorherigen Ansprüche, wobei die Funktionsschicht eine Sperrschicht umfasst.
- Elektronisches Bauelement nach einem der vorherigen Ansprüche, wobei die Funktionsschicht Ti, TiW oder W, oder Legierungen, die diese Materialien enthalten, umfasst.
- Elektronisches Bauelement nach einem der vorherigen Ansprüche, wobei die Klebeschicht eine Einzelelementschicht aus Cu, Au, Ag, Pt oder Ni, oder eine Legierung, die eines oder mehrere dieser Elemente enthält, umfasst.
- Elektronisches Bauelement nach einem oder mehreren der vorherigen Ansprüche, wobei die Lötschicht eine Einzelelementschicht aus Sn, Zn, In, Ga, Bi oder Cd, oder eine Legierung, die eines oder mehrere dieser Elemente enthält, umfasst.
- Elektronisches Bauelement nach Anspruch 7, wobei die Lötschicht eine Legierung aus Sn, Zn, In, Ga, Bi und/oder Cd umfasst und auch AuSn, SnAg, CuSn oder CuSnAg umfasst.
- Elektronisches Bauelement nach einem oder mehreren der vorherigen Ansprüche, wobei der Träger Cu, Ni oder Fe oder eine Legierung, die eines oder mehrere dieser Elemente enthält, umfasst.
- Elektronisches Bauelement nach einem oder mehreren der vorherigen Ansprüche, wobei die Oberfläche des Trägers mit einer oder mehreren Metallschichten beschichtet ist.
- Elektronisches Bauelement nach einem oder mehreren der vorherigen Ansprüche, wobei die oberste Metallschicht Au, Ag, Cu, Pd oder Pt oder eine Legierung aus einem oder mehreren dieser Elemente umfasst.
- Elektronisches Bauelement nach einem oder mehreren der vorherigen Ansprüche, wobei zwischen der Klebeschicht und der Lötschicht intermetallische Phasen gebildet werden.
- Elektronisches Bauelement nach einem oder mehreren der vorherigen Ansprüche, wobei zwischen dem Träger und der Lötschicht oder zwischen einer auf dem Träger angeordneten Metallschicht und der Lötschicht intermetallische Phasen gebildet sind.
- Elektronisches Bauelement nach einem oder mehreren der vorherigen Ansprüche, wobei die Klebeschicht und eine Trägeroberfläche oder eine Oberfläche einer Metallschicht, mit der die Trägeroberfläche beschichtet ist, aus dem gleichen Grundmaterial gebildet sind.
- Elektronisches Bauelement nach Anspruch 14, wobei das Grundmaterial Cu, Ag, NiV, Ni oder NiNiP umfasst.
- Elektronisches Bauelement nach einem der vorherigen Ansprüche, wobei der Träger einen Leadframe umfasst.
- Elektronisches Bauelement nach einem der vorherigen Ansprüche, wobei das Schichtsystem frei von Au ist.
- Elektronisches Bauelement, umfassend: einen Leadframe; ein über dem Leadframe angebrachter Halbleiterchip; und ein zwischen dem Halbleiterchip und dem Leadframe angeordnetes Schichtsystem, umfassend: eine auf dem Halbleiterchip angeordnete Al- oder Ti-Schicht; eine auf der Al- oder Ti-Schicht angeordnete Ti-, TiW- oder W-Schicht; eine auf der Ti-, TiW- oder W-Schicht angeordnete Cu- oder Ag-Schicht; eine zwischen der Cu- oder Ag-Schicht und dem Leadframe angeordnete Sn-Schicht.
- Elektronisches Bauelement nach Anspruch 18, wobei der Leadframe Cu umfasst.
- Elektronisches Bauelement nach Anspruch 18 oder 19, wobei das Schichtsystem frei von Au ist.
- Elektronisches Bauelement nach einem der Ansprüche 18 bis 20, wobei eine Oberfläche des Leadframes mit einer oder mehreren Metallschichten beschichtet ist.
- Verfahren zur Herstellung eines elektronischen Bauelements, wobei das Verfahren Folgendes umfasst: Bereitstellung eines Halbleiter-Substrats; Abscheiden einer elektrischen Kontaktschicht auf dem Halbleiter-Substrat; Abscheiden einer Funktionsschicht auf der elektrischen Kontaktschicht; Abscheiden einer Klebeschicht auf der Funktionsschicht; Abscheiden einer Lötschicht auf der Klebeschicht; Abscheiden einer Schutzschicht auf der Lötschicht; und Anbringen des Halbleiter-Substrats auf einem Träger.
- Verfahren nach Anspruch 22, wobei das Abscheiden der elektrischen Kontaktschicht, der Funktionsschicht, der Klebeschicht, der Lötschicht und/oder der Schutzschicht das Abscheiden mittels physikalischer Dampfabscheidung umfasst.
- Verfahren nach Anspruch 22 oder 23, wobei die elektrische Kontaktschicht eine Al- oder Ti-Schicht umfasst, die Funktionsschicht eine Ti-, TiW- oder W-Schicht umfasst, die Klebeschicht eine Cu- oder Ag-Schicht umfasst, die Lötschicht eine Sn-Schicht umfasst, und die Schutzschicht eine Ag- oder Au-Schicht umfasst.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/309,163 | 2011-12-01 | ||
US13/309,163 US9490193B2 (en) | 2011-12-01 | 2011-12-01 | Electronic device with multi-layer contact |
Publications (2)
Publication Number | Publication Date |
---|---|
DE102012111654A1 true DE102012111654A1 (de) | 2013-06-06 |
DE102012111654B4 DE102012111654B4 (de) | 2020-02-06 |
Family
ID=48431498
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE102012111654.7A Active DE102012111654B4 (de) | 2011-12-01 | 2012-11-30 | Verfahren zur Herstellung eines elektronischen Bauelements |
Country Status (3)
Country | Link |
---|---|
US (5) | US9490193B2 (de) |
CN (1) | CN103137591A (de) |
DE (1) | DE102012111654B4 (de) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9490193B2 (en) * | 2011-12-01 | 2016-11-08 | Infineon Technologies Ag | Electronic device with multi-layer contact |
TWI466253B (zh) * | 2012-10-08 | 2014-12-21 | Ind Tech Res Inst | 雙相介金屬接點結構及其製作方法 |
US10192849B2 (en) | 2014-02-10 | 2019-01-29 | Infineon Technologies Ag | Semiconductor modules with semiconductor dies bonded to a metal foil |
DE102014114982B4 (de) | 2014-10-15 | 2023-01-26 | Infineon Technologies Ag | Verfahren zum Bilden einer Chip-Baugruppe |
DE102015102759A1 (de) * | 2015-02-26 | 2016-09-01 | Heraeus Deutschland GmbH & Co. KG | Leistungselektronik-Modul und Verfahren zur Herstellung eines Leistungselektronik-Moduls |
JP6852626B2 (ja) * | 2016-09-12 | 2021-03-31 | 株式会社デンソー | 半導体装置 |
DE102016117826B4 (de) | 2016-09-21 | 2023-10-19 | Infineon Technologies Ag | Elektronikmodul und herstellungsverfahren dafür |
US10483178B2 (en) * | 2017-01-03 | 2019-11-19 | Infineon Technologies Ag | Semiconductor device including an encapsulation material defining notches |
US11495548B2 (en) * | 2017-12-20 | 2022-11-08 | Alpha And Omega Semiconductor International Lp | Semiconductor package having thin substrate and method of making the same |
DE102020102876B4 (de) * | 2020-02-05 | 2023-08-10 | Infineon Technologies Ag | Elektronisches Bauelement, Herstellungsverfahren dafür und Verfahren zur Herstellung eines elektronischen Moduls dieses aufweisend mittels eines Sinterverfahrens mit einer Opferschicht auf der Rückseitenmetallisierung eines Halbleiterdies |
Family Cites Families (35)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19532250A1 (de) * | 1995-09-01 | 1997-03-06 | Daimler Benz Ag | Anordnung und Verfahren zum Diffusionslöten eines mehrschichtigen Aufbaus |
DE19603654C1 (de) | 1996-02-01 | 1997-07-03 | Siemens Ag | Verfahren zum Löten eines Halbleiterkörpers auf eine Trägerplatte und Halbleiterkörper zur Durchführung des Verfahrens |
US6286206B1 (en) * | 1997-02-25 | 2001-09-11 | Chou H. Li | Heat-resistant electronic systems and circuit boards |
JP3654485B2 (ja) * | 1997-12-26 | 2005-06-02 | 富士通株式会社 | 半導体装置の製造方法 |
US6273969B1 (en) * | 1998-01-07 | 2001-08-14 | Rensselaer Polytechnic Institute | Alloys and methods for their preparation |
US7771547B2 (en) * | 1998-07-13 | 2010-08-10 | Board Of Trustees Operating Michigan State University | Methods for producing lead-free in-situ composite solder alloys |
US6436300B2 (en) * | 1998-07-30 | 2002-08-20 | Motorola, Inc. | Method of manufacturing electronic components |
DE10036290A1 (de) * | 2000-07-26 | 2002-02-07 | Bosch Gmbh Robert | Vorrichtung zur Bestimmung zumindest eines Parameters eines strömenden Mediums |
EP1320889A1 (de) * | 2000-09-29 | 2003-06-25 | Infineon Technologies AG | Verbindungseinrichtung |
DE10124141B4 (de) | 2000-09-29 | 2009-11-26 | Infineon Technologies Ag | Verbindungseinrichtung für eine elektronische Schaltungsanordnung und Schaltungsanordnung |
DE10103294C1 (de) | 2001-01-25 | 2002-10-31 | Siemens Ag | Träger mit einer Metallfläche und mindestens ein darauf angeordneter Chip, insbesondere Leistungshalbleiter |
KR100426897B1 (ko) * | 2001-08-21 | 2004-04-30 | 주식회사 네패스 | 솔더 터미널 및 그 제조방법 |
TWI226139B (en) * | 2002-01-31 | 2005-01-01 | Osram Opto Semiconductors Gmbh | Method to manufacture a semiconductor-component |
US6930032B2 (en) * | 2002-05-14 | 2005-08-16 | Freescale Semiconductor, Inc. | Under bump metallurgy structural design for high reliability bumped packages |
JP4200823B2 (ja) * | 2002-08-22 | 2008-12-24 | ウシオ電機株式会社 | 箔シールランプ |
DE10350707B4 (de) | 2003-02-26 | 2014-02-13 | Osram Opto Semiconductors Gmbh | Elektrischer Kontakt für optoelektronischen Halbleiterchip und Verfahren zu dessen Herstellung |
DE10339462A1 (de) * | 2003-08-27 | 2005-03-31 | Infineon Technologies Ag | Verfahren zum Befestigen eines Anschlussbügels /-beins an einem Halbleiterchip |
DE10345584A1 (de) * | 2003-09-29 | 2005-04-28 | Bosch Gmbh Robert | Leiterplatte mit Kunststoffteil zur Aufnahme einer Messeinrichtung |
DE10355508B4 (de) * | 2003-11-27 | 2006-07-06 | Infineon Technologies Ag | Ultradünne Halbleiterschaltung mit Kontakt-Bumps sowie zugehöriges Herstellungsverfahren |
US20060006510A1 (en) * | 2004-07-06 | 2006-01-12 | Koduri Sreenivasan K | Plastic encapsulated semiconductor device with reliable down bonds |
US20060160267A1 (en) * | 2005-01-14 | 2006-07-20 | Stats Chippac Ltd. | Under bump metallurgy in integrated circuits |
DE102005008600B9 (de) * | 2005-02-23 | 2012-06-21 | Infineon Technologies Ag | Chipträger, System aus einem Chipträger und Halbleiterchips und Verfahren zum Herstellen eines Chipträgers und eines Systems |
DE102005029246B4 (de) | 2005-03-31 | 2023-06-22 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Halbleiterchip mit einer Lötschichtenfolge und Verfahren zum Löten eines Halbleiterchips |
EP1748480B1 (de) | 2005-07-28 | 2009-06-24 | Infineon Technologies AG | Verbindungsstruktur zur Befestigung eines Halbleiterchips auf einem Metallsubstrat, Halbleiterchip und elektronisches Bauelement mit der Verbindungsstruktur, und Verfahren zur Herstellung der Verbindungsstruktur |
DE102005051811A1 (de) | 2005-10-27 | 2007-05-03 | Infineon Technologies Ag | Halbleiterbauteil mit Halbleiterchip in Flachleiterrahmentechnik und Verfahren zur Herstellung desselben |
DE102005058654B4 (de) * | 2005-12-07 | 2015-06-11 | Infineon Technologies Ag | Verfahren zum flächigen Fügen von Komponenten von Halbleiterbauelementen |
US20080251927A1 (en) * | 2007-04-13 | 2008-10-16 | Texas Instruments Incorporated | Electromigration-Resistant Flip-Chip Solder Joints |
US8426960B2 (en) * | 2007-12-21 | 2013-04-23 | Alpha & Omega Semiconductor, Inc. | Wafer level chip scale packaging |
US7808100B2 (en) * | 2008-04-21 | 2010-10-05 | Infineon Technologies Ag | Power semiconductor module with pressure element and method for fabricating a power semiconductor module with a pressure element |
US20090321955A1 (en) * | 2008-06-30 | 2009-12-31 | Sabina Houle | Securing integrated circuit dice to substrates |
US20110006409A1 (en) * | 2009-07-13 | 2011-01-13 | Gruenhagen Michael D | Nickel-titanum contact layers in semiconductor devices |
US8426251B2 (en) * | 2010-01-07 | 2013-04-23 | Infineon Technologies Ag | Semiconductor device |
US9490193B2 (en) * | 2011-12-01 | 2016-11-08 | Infineon Technologies Ag | Electronic device with multi-layer contact |
US8765570B2 (en) * | 2012-06-12 | 2014-07-01 | Intermolecular, Inc. | Manufacturable high-k DRAM MIM capacitor structure |
US10797137B2 (en) * | 2017-06-30 | 2020-10-06 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for reducing Schottky barrier height and semiconductor device with reduced Schottky barrier height |
-
2011
- 2011-12-01 US US13/309,163 patent/US9490193B2/en active Active
-
2012
- 2012-11-30 DE DE102012111654.7A patent/DE102012111654B4/de active Active
- 2012-11-30 CN CN2012105063421A patent/CN103137591A/zh active Pending
-
2016
- 2016-09-30 US US15/282,927 patent/US20170025375A1/en not_active Abandoned
-
2018
- 2018-09-10 US US16/126,190 patent/US10475761B2/en active Active
-
2019
- 2019-11-11 US US16/679,883 patent/US11842975B2/en active Active
-
2023
- 2023-11-15 US US18/509,357 patent/US20240088087A1/en active Pending
Also Published As
Publication number | Publication date |
---|---|
US20190006311A1 (en) | 2019-01-03 |
US20240088087A1 (en) | 2024-03-14 |
US20170025375A1 (en) | 2017-01-26 |
DE102012111654B4 (de) | 2020-02-06 |
US9490193B2 (en) | 2016-11-08 |
US10475761B2 (en) | 2019-11-12 |
US20130140685A1 (en) | 2013-06-06 |
US20200075530A1 (en) | 2020-03-05 |
CN103137591A (zh) | 2013-06-05 |
US11842975B2 (en) | 2023-12-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE102012111654B4 (de) | Verfahren zur Herstellung eines elektronischen Bauelements | |
DE102005028951B4 (de) | Anordnung zur elektrischen Verbindung einer Halbleiter-Schaltungsanordnung mit einer äusseren Kontakteinrichtung | |
DE102013208818B4 (de) | Leistungshalbleitermodul und Verfahren zur Fertigung eines Leistungshalbleitermoduls | |
DE102005052563B4 (de) | Halbleiterchip, Halbleiterbauteil und Verfahren zu deren Herstellung | |
DE102015100862B4 (de) | Elektronisches Durchsteck-Bauelement und Verfahren zum Fertigen eines elektronischen Durchsteck-Bauelements | |
DE102012213548A1 (de) | Bondpad zum Thermokompressionsbonden, Verfahren zum Herstellen eines Bondpads und Bauelement | |
DE102016118655A1 (de) | Verfahren zur Herstellung von Halbleitervorrichtungen und entsprechende Vorrichtung | |
DE102013100339B4 (de) | Verfahren zur Herstellung eines elektronischen Bauelements und flexible Schichtstruktur | |
DE102011053302A1 (de) | Schichtstapel und Integrierter-Schaltkreis-Anordnungen | |
DE10336747A1 (de) | Halbleiterbauelementanordnung mit einer Nanopartikel aufweisenden Isolationsschicht | |
DE102016117826B4 (de) | Elektronikmodul und herstellungsverfahren dafür | |
DE102012100231B4 (de) | Halbleiterchip | |
DE102018115509A1 (de) | Wärmedissipationsvorrichtung, Halbleiterpackagingsystem und Verfahren zum Herstellen derselben | |
DE102014200242B4 (de) | Gebondetes System mit beschichtetem Kupferleiter | |
DE102021102421A1 (de) | Halbleitergehäuse unter Verwendung von Gehäuse-in-Gehäuse-Systemen und zugehörige Verfahren | |
DE102016122963B4 (de) | Halbleitervorrichtung mit einem bidirektionalen Schalter | |
DE102012103157A1 (de) | Halbleitervorrichtung und Bonddraht | |
DE102009040627B4 (de) | Halbleiterbauelement und Verfahren zum Herstellen eines elektronischen Systems | |
DE102011053955B4 (de) | Leistungs-Halbleitervorrichtung und Verfahren zum Verbessern der Zuverlässigkeit einer Leistungs-Halbleitervorrichtung | |
DE102020117678B3 (de) | Halbleitervorrichtung mit heterogener lötstelle und verfahren zu ihrer herstellung | |
DE102012216546A1 (de) | Halbleiterchip, verfahren zur herstellung eines halbleiterchips und verfahren zum verlöten eines halbleiterchips mit einem träger | |
WO2017140574A1 (de) | Verfahren zur herstellung einer substratplatte, substratplatte, verfahren zur herstellung eines halbleitermoduls und halbleitermodul | |
DE102007002807B4 (de) | Chipanordnung | |
DE112016006717T5 (de) | Leistungs-halbleitereinheit | |
DE102012208681A1 (de) | Zinnbeschichtung, zugehöriges Kontaktelement und Verfahren zum Aufbringen einer Zinnbeschichtung |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
R012 | Request for examination validly filed | ||
R016 | Response to examination communication | ||
R016 | Response to examination communication | ||
R083 | Amendment of/additions to inventor(s) | ||
R016 | Response to examination communication | ||
R016 | Response to examination communication | ||
R002 | Refusal decision in examination/registration proceedings | ||
R006 | Appeal filed | ||
R008 | Case pending at federal patent court | ||
R009 | Remittal by federal patent court to dpma for new decision or registration | ||
R016 | Response to examination communication | ||
R079 | Amendment of ipc main class |
Free format text: PREVIOUS MAIN CLASS: H01L0023482000 Ipc: H01L0021600000 |
|
R018 | Grant decision by examination section/examining division | ||
R130 | Divisional application to |
Ref document number: 102012025859 Country of ref document: DE |
|
R020 | Patent grant now final |