CN1992259A - 具有半导体元件、绝缘基板和金属电极的半导体器件 - Google Patents

具有半导体元件、绝缘基板和金属电极的半导体器件 Download PDF

Info

Publication number
CN1992259A
CN1992259A CNA2006101711612A CN200610171161A CN1992259A CN 1992259 A CN1992259 A CN 1992259A CN A2006101711612 A CNA2006101711612 A CN A2006101711612A CN 200610171161 A CN200610171161 A CN 200610171161A CN 1992259 A CN1992259 A CN 1992259A
Authority
CN
China
Prior art keywords
insulated substrate
semiconductor element
metal
metal electrode
metal level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CNA2006101711612A
Other languages
English (en)
Other versions
CN100517696C (zh
Inventor
持田晶良
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
Denso Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Corp filed Critical Denso Corp
Publication of CN1992259A publication Critical patent/CN1992259A/zh
Application granted granted Critical
Publication of CN100517696C publication Critical patent/CN100517696C/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334Auxiliary members in encapsulations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49537Plurality of lead frames mounted in one device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49575Assemblies of semiconductor devices on lead frames
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/33Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/36Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612Auxiliary members for layer connectors, e.g. spacers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199Material of the matrix
    • H01L2224/2929Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/33Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H01L2224/331Disposition
    • H01L2224/3318Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/33181On opposite sides of the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401Disposition
    • H01L2224/40135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/40137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/4901Structure
    • H01L2224/4903Connectors having different sizes, e.g. different diameters
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/4905Shape
    • H01L2224/49051Connectors having different shapes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73215Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/83801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83851Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848Bonding techniques
    • H01L2224/84801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848Bonding techniques
    • H01L2224/8485Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01014Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01068Erbium [Er]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06Polymers
    • H01L2924/078Adhesive characteristics other than chemical
    • H01L2924/0781Adhesive characteristics other than chemical being an ohmic electrical conductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/15786Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787Ceramics, e.g. crystalline carbides, nitrides or oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress

Abstract

一种半导体器件包括:具有彼此面对的内表面的第一和第二金属电极(3、4);夹在电极(3、4)之间的半导体元件(1、2);以及分别设置在电极(3、4)上并且与半导体元件(1、2)相对的第一和第二绝缘基板(5、6)。每个绝缘基板(5、6)由陶瓷制成。电极(3、4)中至少一个包括在平行于层叠方向的方向上层叠的多个层(3a、3b、4a、4b)。设置在半导体元件侧的一层(3b、4b)具有的热膨胀系数比设置在绝缘基板侧的另一层(3a、4a)的热膨胀系数高。

Description

具有半导体元件、绝缘基板和金属电极的半导体器件
技术领域
本发明涉及一种具有半导体元件、绝缘基板和金属电极的半导体器件。
背景技术
在先前的USPNo.6,072,240中,提出了一种具有半导体元件、金属电极对和绝缘基板的结构作为半导体器件。金属电极如此设置以夹持(nip)(例如夹着)半导体元件,并且用作半导体元件的电极和散热部件。绝缘基板设置在每个金属电极中与半导体元件的夹持面相对侧的表面上,并且具有散热性能,以及由陶瓷制成。
在该结构中,半导体元件形成如此设置的形状,从而在两个相对金属电极的相反表面(即在内表面侧)上被两个金属电极夹持。该半导体元件可以通过金属电极从半导体元件的两个面取出电信号。
此外,将每个金属电极的外表面铜焊到绝缘基板,并且冷却器件连接到每个绝缘基板的外表面侧,使得热量可以从半导体元件的两个表面散出。在这里,利用陶瓷制造的绝缘基板来确保金属电极和冷却器件的电绝缘性能。
然而,先前的半导体器件引起以下问题,绝缘基板由于温度循环变化等而弯曲,这是由陶瓷构成的绝缘基板和金属构成的金属电极之间的热膨胀系数差引起的。
例如,当绝缘基板的弯曲大时,就造成以下问题,即冷却器件和绝缘基板的紧密连接性能变得不足,而且由冷却器件夹持半导体器件的组装性能由于两个绝缘基板之间的平行度的退化等而受到妨碍。
发明内容
鉴于上述问题,本公开的目的是提供一种半导体器件。
根据本公开的一个方面,一种半导体器件包括:具有散热性能的第一和第二金属电极,其中金属电极的内表面彼此面对;夹在第一和第二金属电极之间的半导体元件,其中半导体元件电连接到该电极的两个内表面;以及具有散热性能的第一和第二绝缘基板,其中该第一绝缘基板设置在第一金属电极上,并且与半导体元件相对,并且其中第二绝缘基板设置在第二金属电极上,并且与半导体元件相对。第一和第二绝缘基板中的每一个由陶瓷制成。第一和第二金属电极中的至少一个包括在平行于电极、半导体元件和绝缘基板的层叠方向的方向上层叠的多个层。设置在半导体元件侧的一层具有的热膨胀系数比设置在绝缘基板侧的另一层的热膨胀系数高。
在上面的器件中,限制了绝缘基板的热变形,该热变形由绝缘基板和金属电极之间的热膨胀系数差引起。
附图说明
通过参照附图进行下面的详细说明,本发明的上述和其它目的、特点和优点将更加显而易见。在附图中:
图1是示出根据第一实施例的半导体器件的平面图;
图2是示出沿图1中的线II-II切割的器件的横截面图;
图3是示出根据第二实施例的半导体器件的横截面图;
图4是示出根据第三实施例的半导体器件的横截面图;
图5是示出根据第四实施例的半导体器件的横截面图;
图6是示出在图5所示器件中的第二绝缘基板上的第二金属电极的平面图;
图7是示出根据第五实施例的半导体器件的横截面图;以及
图8A是示出第二金属电极的平面图,而图8B是在图7所示器件中的金属层。
具体实施方式
(第一实施方式)
图1是示出根据第一实施方式的半导体器件100的示意性平面结构的视图。图1还是示出在该半导体器件100中的树脂模制物(resinmold)11内的每个部分的平面布置结构的视图。此外,图2是沿图1内的线II-II的示意性横截面图。在以下每个横截面图中,部分省略了剖面线,这是因为在所有部件的截面中都画出剖面线时,就不容易区分和辨别每个部分。
例如,该半导体器件100安装到诸如汽车等车辆上,并且用作操作车辆的各种电子装置的器件。
如图1和2所示,该半导体器件100具有设置在平面上的两个半导体元件1、2。在该实例中,第一半导体元件1是IGBT(绝缘栅型双极晶体管)1,而第二半导体元件2是FWD(续流二极管)2。
成对的第一金属电极3和第二金属电极4夹持这两个半导体元件1、2的两个面。即,该对金属电极3、4如此设置以使彼此的内表面相对。半导体元件1、2如此设置,从而被这两个金属电极3、4夹持,并且电连接到两个金属电极3、4的内表面。
该对金属电极3、4具有导电性能和散热性能,并且用作半导体元件1、2的电极和散热部件。
此外,如图2所示,具有散热性能并且由陶瓷制成的第一绝缘基板5设置在第一金属电极3的外表面上,即在与夹持半导体元件1、2的表面相对侧的表面上。具有散热性能并且由陶瓷制成的第二绝缘基板6设置在第二金属电极4的外表面上,即在与夹持半导体元件1、2的表面相对侧的表面上。
此外,金属层7、8在绝缘基板5、6的外表面上设置为与金属电极3、4电绝缘的状态,即在第一绝缘基板5和第二绝缘基板6每个中与金属电极3、4侧相对侧的表面上。
在该实施方式中,金属电极3、4每个具有层叠结构,其中多个层3a、3b、4a、4b从作为绝缘基板5、6侧的外表面侧到作为半导体元件1、2侧的内表面侧按照热膨胀系数低的顺序层叠。
在该实例中,金属电极3、4每个的层叠结构由两层构成,该两层由位于绝缘基板5、6侧上的绝缘基板侧层3a、4a形成,并且还由位于半导体元件1、2侧并且热膨胀系数大于绝缘基板侧层3a、4a的热膨胀系数的元件侧层3b、4b形成。
具体地,通过从作为第一绝缘基板5侧的外表面侧开始层叠绝缘基板侧层3a和元件侧层3b形成第一金属电极3,该绝缘基板侧层3a由例如纯铁、铸铁等铁系金属构成,而该元件侧层3b由铜、铜合金、铝、铝合金等构成。
另一方面,通过从作为第二绝缘基板6侧的外表面侧开始层叠绝缘基板侧层4a和元件侧层4b形成第二金属电极4,该绝缘基板侧层4a由例如纯铁、铸铁等铁系金属构成,而该元件侧层4b由铜、铜合金或者铝、铝合金等构成。此外,在该实例中,在各个金属电极3、4中,元件侧层3b、4b比绝缘基板侧层3a、4a厚。
关于这一点,纯铁的热膨胀系数是0.138×10-4/K,铜是0.162×10-4/K,以及铝是0.237×10-4/K。可以通过利用铜焊和活化连接(activation joining)使不同种类的金属板成一体,以制造通过层叠不同种类的这种金属所形成的板状金属电极3、4。
此外,可以在每个绝缘基板5、6中采用氧化铝、氮化铝、氮化硅等的普通陶瓷基板。与元件侧层3b、4b类似,设置在各个绝缘基板5、6的外表面上的金属层7、8由铜、铝等构成。此外,在该实施方式中,在各个绝缘基板5、6中,金属层7、8和绝缘基板5、6具有相同的平面尺寸。
由第一金属电极3、第一绝缘基板5和金属层7构成的三个部件以及由第二金属电极4、第二绝缘基板6和金属层8构成的三个部件分别通过各个部件之间的铜焊和活化连接而连接并成一体。
此外,在各个绝缘基板5、6中,位于绝缘基板5、6的内表面侧的金属电极3、4和位于外表面侧的金属层7、8不限于具体的厚度。然而,金属电极3、4优选比金属层7、8厚。
此外,如图2所示,在该半导体器件100中,两个半导体元件1、2的一个表面和第一金属电极3的内表面(即元件侧层3b)之间的部分通过诸如焊料、导电粘合剂等导电连接部件9进行电和热连接。
此外,铜、铝等构成的热沉块10插在两个半导体元件1、2的其它表面和第二金属电极4的内表面(即元件侧层4b)之间。每个半导体元件1、2和热沉块10之间的部分以及热沉块10和第二金属电极4之间的部分通过导电连接部件9进行电和热连接。
如图1和2所示,在该半导体器件100中,夹持半导体元件1、2的成对金属电极3、4和绝缘基板5、6由树脂模制物11密封。该树脂模制物11由环氧树脂等构成,并且通过模具成型形成。
此外,如图2所示,在成对的绝缘基板5、6的每一个中,从树脂模制物11中暴露出每个金属层7、8。
因此,该半导体器件100如此构成,使得通过各个金属电极3、4、各个绝缘基板5、6、各个金属层7、8以及第一和第二半导体元件1、2的两个表面中的一个表面上的热沉块10来散热。
此外,该对金属电极3、4通过导电连接部件9和热沉块10电连接到两个半导体元件1、2的各个表面的未示出电极。
在这里,如图1和2所示,电连接到半导体元件1、2的多个端子3c、4c、12设置在半导体器件100中。这些端子3c、4c、12中的每一个密封在树脂模制物11中,使得从树脂模制物11中暴露出这些端子3c、4c、12中的每一个的一部分。这些端子3c、4c、12中的每一个是电连接到外部的部件。
在该实例中,该对金属电极3、4中的第一金属电极3和第二金属电极4分别成为作为第一半导体元件1的IGBT 1的集电极侧的电极和作为第二半导体元件2的FWD 2的阴极侧的电极,以及IGBT 1的发射极侧的电极和FWD 2的阳极侧的电极。
作为上述各个端子中的端子3c的集电极引线与第一金属电极3模制成一体,并且从第一金属电极3的端面突起并暴露在树脂模制物11的外部。此外,作为端子4c的发射极引线与第二金属电极4模制成一体,并且从第二金属电极4的端面突起并暴露在树脂模制物11的外部。
在这里,在该实施方式中,如图2所示,这些引线3c、4c与位于各个金属电极3、4中的内表面侧的元件侧层3b、4b模制成一体。位于各个金属电极3、4中的外表面侧的绝缘基板侧层3a、4a位于树脂模制物11的内部。
即,在该实施方式中,只有位于各个金属电极3、4中最内表面侧并靠近半导体元件1、2的层3b、4b突起到树脂模制物11的外部,并且它们的突起部分构成端子3c、4c以用于与外部电连接。在图2所示的实例中,这些端子3c、4c在树脂模制物11的外部弯曲,但是在不弯曲和处理这些端子3c、4c的情况下其也可以是直的。
此外,如图1和2所示,在以上各个端子中,由与金属电极3、4分开的引线框构成的端子12是设置在树脂模制物11内部的IGBT 1的周围的控制端子12。
这种控制端子12构成IGBT 1的栅极端子和用于检查等的各种端子。IGBT 1通过金、铝等的接合线13电连接到控制端子12。
在该结构中,插入在第二金属电极4和半导体元件1、2之间的热沉块10确保IGBT 1的线接合面和第二金属电极4之间的高度以在进行该IGBT 1和控制端子12的线接合时保持导线13的高度。
可以通过准备工件制造该半导体器件100,该工件由以下形成:使各个半导体元件1、2、热沉块10和线接合控制端子12成一体,并依次用各个金属电极3、4、各个绝缘基板5、6和各个金属层7、8来夹持该工件的上、下部分,然后进行树脂密封。
该半导体器件100还可以通过预先准备以下结构从而在夹持上述工件的上、下部分之后进行树脂密封来制造,该结构通过使金属电极3、4、绝缘基片5、6和金属层7、8成一体来形成。
根据该实施方式,对于各个金属电极3、4,多个层3a、3b、4a、4b从作为绝缘基板5、6侧的外表面侧到作为半导体元件1、2侧的内表面侧按照热膨胀系数低的顺序层叠。因此,在各个金属电极3、4中,可以将作为绝缘基板5、6侧的部分的绝缘基板侧层3a、4a的热膨胀系数设置为较小。
因此,可以限制邻接陶瓷制造的绝缘基板5、6的绝缘基板侧层3a、4a的热变形,并且可以进一步减小绝缘基板5、6和邻接这些绝缘基板5、6的绝缘基板侧层3a、4a之间的热膨胀系数差。因此,根据该半导体器件100,可以限制由金属电极3、4和绝缘基板5、6之间的热膨胀系数差引起的绝缘基板5、6的弯曲。
如上所述,这种半导体器件通常利用由未示出的冷却器件夹持半导体器件,并且使绝缘基板的外表面侧和该冷却器件彼此接触来促进散热,未示出的冷却器件由铝、铜等的块等构成。在该半导体器件100中,上述冷却器件与设置在两个绝缘基板5、6外表面的金属层7、8接触。
因此,如果如在该半导体器件100中限制了绝缘基板5、6的弯曲,则容易确保金属层7、8和上述冷却器件的紧密连接区域,并且在冷却器件夹持该半导体器件100时还容易确保平行度。
此外,在该实施方式中,只有位于金属电极3、4中最内表面侧的元件侧层3b、4b电连接到外部。位于最外表面侧并且由导电性能相对较差的铁系金属构成的绝缘基板侧层3a、4a不用作与外部电连接的部件。
由于金属电极3、4中的元件侧层3b、4b最靠近半导体元件1、2,所以元件侧层3b、4b主要用作半导体元件1、2的电极。因此,如上所述,使用导电性能优良的铜和铝。因此,可以通过仅仅引导这些元件侧层3b、4b到外部,从而适当地实现半导体元件1、2与外部的电连接。
此外,在该实施方式中,金属层7、8设置在各个绝缘基板5、6的外表面作为金属电极3、4侧的相对侧。通过插入绝缘基板5、6的绝缘体,这些金属层7、8获得与金属电极3、4电绝缘的状态。
例如,在第一绝缘基板5设置为图2的实例时,其变为第一金属电极3设置在第一绝缘基板5的内表面而金属层7设置在外表面的形状。因此,由第一绝缘基板5的内表面侧和第一金属电极3之间的热膨胀系数差引起的应力施加到该内表面侧。然而,由外表面侧和金属层7之间的热膨胀系数差引起的应力同时施加于该外表面侧。因此,内表面和外表面之间的热应力差变小。
因此,即使在第一绝缘基板5中施加温度循环时,期望缓和由该温度循环引起的热应力,并且第一绝缘基板5不容易变形。关于第二绝缘基板6,所述的情况也与这些情况类似。
此外,在该实施方式中,在以该方式通过金属电极3、4和金属层7、8夹持各个绝缘基板5、6的结构中,通过将金属电极3、4设置为比金属层7、8更厚,实现了金属电极3、4能够使大电流流到半导体元件1、2。此外,通过将金属层7、8设置得更薄,在散热性能上是有利的。
在上述实例中,在两个绝缘基板5、6中都设置金属层7、8。然而,根据需要,还可以设置成仅在一个绝缘基板中设置金属层而在另一个绝缘基板中不设置金属层的结构。
(第二实施例)
图3是示出根据第二实施方式的半导体器件200的示意性截面结构的视图。在该半导体器件200中,修改对应于上述第一实施方式中所示半导体器件100的引线3c、4c的部分,而其它类似。
在上述第一实施方式中,只有作为位于各个金属电极3、4中的最内表面侧的层的元件侧层3b、4b突起到树脂模制物11外部,并且它们的突起部分构成作为端子的引线3c、4c。
在该实施方式中,类似于上述的第一实施方式,只有金属电极3、4中的元件侧层3b、4b电连接到外部。然而,在该实施方式中,如图3所示,元件侧层3b、4b通过导电连接部件14连接到与这些元件侧层3b、4b分开的导体部件3d、4d。
在这里,各个元件侧层3b、4b连接到树脂模制物11内部的各个导体部件3d、4d。各个导体部件3d、4d中的每一个从树脂模制物11突起,使得可以与外部进行连接。
即,在该实施方式中,这些导体部件3d、4d相应于上述第一实施方式中的发射极和集电极的各个导线3c、4c。例如,这些导体部件3d、4d由例如铜、铝等导体构成。
此外,与上述用于在半导体元件1、2、热沉块10和金属电极3、4之间的连接部分的导电连接部件9类似,可以在导电连接部件14中采用焊料、导电连接部件、铜焊材料等,以连接这些导体部件3d、4d。
(第三实施方式)
图4是示出根据第三实施方式的半导体器件300的示意性截面结构的视图。在该半导体器件300中,改变了上述第二实施方式中所示半导体器件200中的导体部件3d、4d和元件侧层3b、4b的连接手段,并且其它类似。
在上述第二实施方式中,导体部件3d、4d和元件侧层3b、4b由导电连接部件14连接。然而,在该实施方式中,如图4所示,由接合线15代替该导电连接部件14来进行这种连接。与用于连接控制端子12和IGBT 1的上述导线13类似,该导线15可以由金、铝等构成。
对于上面第一到第三实施方式中的金属电极3、4,端子结构显示其中成对的两个金属电极3、4成为相同的端子结构的情况。然而,根据需要,还可以组合这些各个实施方式的端子结构,使得该对金属电极3、4中的一个和另一个变成不同的端子结构。
例如,第一金属电极3还可以如上面第一实施方式那样,设置为与元件侧层3b、4b成一体的端子结构,而第二金属电极4还可以如上面第二实施方式那样,设置为用于通过导电连接部件14将分开的导体主体4d设置为端子的结构。
(第四实施方式)
图5是示出根据第四实施方式的半导体器件400的示意性截面结构的视图。图6是该半导体器件400中的第二金属电极4、第二绝缘基板6和金属层8的示意性顶视图。
在上面每个实施方式中,如上面附图中的每一个所示,在每个绝缘基板5、6中,设置与金属层7、8的平面尺寸相同的尺寸。与此相反,如图5和6所示,在该半导体器件400中,金属层7、8设置为比绝缘基板5、6的平面尺寸小,并且位于绝缘基板5、6的范围内。
图6示出第二绝缘基板6侧的平面结构。然而,第一绝缘基板5的平面结构与图6的平面结构也基本上类似。即,在第一绝缘基板5和第二绝缘基板6的每个中,各个金属层7、8都位于绝缘基板5、6的范围内,如图6所示。
通过采用这种平面尺寸的关系,绝缘基板5、6的周围部分形成突出金属层7、8的外围端部的形状。因此,在各个绝缘基板5、6中,可以通过绝缘基板5、6的端表面延长金属层7、8和金属电极3、4之间的漏电距离。
因此,根据该实施方式,在各个绝缘基板5、6中,可以提高位于绝缘基板5、6两个表面上的金属电极3、4和金属层7、8的电绝缘性能。
在该实例中,在两个绝缘基板5、6中,金属层7、8的平面尺寸都设置为较小。然而,根据需要,也可以将其设置成下列结构,其中仅仅在一个绝缘基板中将金属层的平面尺寸设置为较小,而在另一个绝缘基板中将金属层的平面尺寸设置为和绝缘基板的尺寸相同。
此外,该实施方式可以通过改变金属层7、8的尺寸来实现,并且可以应用于上面第一到第三实施方式中的每一个。
(第五实施方式)
图7是示出根据第五实施方式的半导体器件500的示意性截面结构的视图。图8A和8B分别是设置在该半导体器件500中的第二绝缘基板6的简化第二金属电极4的示意性平面图和简化金属层8的示意性平面图。
在该实施方式中,设置在该半导体器件500的第一绝缘基板5中的简化第一金属电极3的示意性平面结构和简化金属层7的示意性平面结构与图8A和8B中的类似。
在该实施方式中,如图7和8所示,在金属电极3、4和金属层7、8中设置狭缝16。在这里,狭缝16形成为延长的开孔的形状。在该示例性实例中,设置了多个狭缝16,但是也可以只设置一个狭缝16。此外,狭缝16的图案不限于所示的实例。
通过以这种方式在金属电极3、4和金属层7、8中设置狭缝16,可以缓解金属电极3、4和金属层7、8中产生的热应力。这有利于限制由金属电极3、4和绝缘基板5、6之间的热膨胀系数差引起的绝缘基板5、6的弯曲。
可以通过对金属电极3、4和金属层7、8进行压力加工、蚀刻处理等来形成这种狭缝16。在该实例中,在金属电极3、4和金属层7、8中都设置了狭缝16,但是也可以只在金属电极3、4中设置,并且也可以只在金属层7、8中设置。
此外,在该实例中,两个绝缘基板5、6中都设置了狭缝16。然而,根据需要,还可以设置为以下结构,其中狭缝16只设置在一个绝缘基板中的金属电极或金属层中,而在另一个绝缘基板中的金属电极和金属层中不设置狭缝。
此外,可以通过对金属电极3、4和金属层7、8图案化来实现该实施方式,并且该实施方式可以适用于上述第一到第四实施方式中的每一个。
(其它实施方式)
在上述每个实施方式中,成对的两个金属电极3、4都具有层叠结构,其中,多个层3a、3b、4a、4b从外表面侧到内表面侧按照热膨胀系数低的顺序层叠。然而,金属电极3、4中只有一个设置为具有这种结构,而另一个还可以和先前的情况一样设置为单层的金属电极。
例如,在上述每个实施方式中所示的每个半导体器件中,还有以下情况,其中冷却器件只和成对的金属电极3、4中的一个接触,并且在另一个中没有设置冷却器件而是通过空气冷却系统来散热。在这种情况下,只有与冷却器件接触一侧上的金属电极设置为上述层叠结构,并且可以限制绝缘基板的弯曲。
在只有一侧是这种层叠结构的情况下,上述狭缝16也可以只设置在具有层叠结构的一个金属电极3、4中,并且也可以只设置在没有层叠结构的另一个金属电极3、4中,以及还可以设置在两个金属电极3、4中。这是因为使用狭缝16的显示效果与上述层叠结构的存在无关。
此外,在只有一侧是层叠结构的情况下,可以只在具有层叠结构的一个金属电极中采用上面第一到第三实施方式中所示的端子结构,而在另一个没有层叠结构的金属电极中采用一般的端子结构。
此外,在这种情况下,设置在绝缘基板5、6的外表面上的上述金属层7、8也可以只设置在具有层叠结构的一个金属电极侧的绝缘基板的外表面上,而且也可以只设置在没有层叠结构的另一个金属电极侧的绝缘基板的外表面上,以及还可以设置在两个绝缘基板上。这是因为使用金属层7、8的显示效果与上述层叠结构的存在无关。
此外,在这种一侧层叠结构的情况下,还可以在两个绝缘基板5、6之一或者两者中采用用于将上面的金属层7、8的平面尺寸设置为比绝缘基板5、6的平面尺寸小的结构(参见上面的图5和6)和用于在金属层7、8中设置狭缝16的结构(参见上面的图7和8),而与金属电极3、4是否具有层叠结构无关。
此外,在上述每个实施方式中,金属电极3、4的层叠结构是具有绝缘基板侧层3a、4a和元件侧层3b、4b的两层结构,但是如果该层从作为绝缘基板侧的外表面侧到作为半导体元件侧的内表面侧按照热膨胀系数低的顺序层叠,则也可以设置为三层或更多层。
例如,在三层金属电极的情况下,该层从外表面侧到内表面侧可以按照铸铁层、纯铁层和铜系金属层层叠,或者也可以按照铁系金属层、铜系金属层和铝系金属层层叠。
此外,在上面的第一实施方式中,通过在各个绝缘基板5、6的至少一个中设置上面的金属层7、8,缓解了施加于绝缘基板5、6的热应力。然而,在特定情况下,在两个绝缘基板5、6中也可以不存在这些金属层7、8。
此外,利用树脂模制物11密封上面每个实施方式中的半导体器件,但是也可以不用树脂模制物密封。
此外,如上所述,热沉块10插入在IGBT 1和第二金属电极4之间,并且具有用于确保这两个部件1、4之间的高度的作用。然而,如果可能,在上面每个实施方式中可以不存在热沉块10。
此外,如果设置在两个表面上的该对金属电极3、4可以用作电极,则由该对金属电极3、4夹持的半导体元件也可以不是上述IGBT1和FWD 2。此外,半导体元件的数目也可以设置为一个,并且还可以设置为三个或更多。
上面的公开具有以下方面。
根据本公开的一个方面,半导体器件包括:具有散热性能的第一和第二金属电极,其中金属电极的内表面彼此面对;夹在第一和第二金属电极之间的半导体元件,其中半导体元件电连接到电极的两个内表面;以及具有散热性能的第一和第二绝缘基板,其中第一绝缘基板设置在第一金属电极上,并且与半导体元件相对,以及其中第二绝缘基板设置在第二金属电极上,并且与半导体元件相对。第一和第二绝缘基板每个由陶瓷制成。第一和第二金属电极中的至少一个包括在平行于电极、半导体元件和绝缘基板的层叠方向的方向上层叠的多个层。设置在半导体元件侧的一层具有的热膨胀系数比设置在绝缘基板侧的另一层的热膨胀系数高。
在上面的器件中,限制了绝缘基板的弯曲,该弯曲由绝缘基板和金属电极之间的热膨胀系数差引起。
可选择地,第一和第二金属电极中的至少一个可以还包括狭缝。在这种情况下,金属电极中产生的热应力由狭缝限制。
可选择地,最靠近绝缘基板的一层可以由铁系金属制成。此外,只有最靠近半导体元件的一层可以电连接到外部电路。在这种情况下,另一层可以由除铁(具有相对低导电性)之外的材料制成,使得另一层和外部电路具有优良的电连接。
可选择地,该器件可以还包括设置在第一和第二绝缘基板的至少一个上的金属层。该金属层与金属电极相对,并且金属层与金属电极电绝缘。在这种情况下,金属部件,即金属层和金属电极设置在绝缘基板的两侧。因此,更加限制了对绝缘基板的热应力。
可选择地,金属层可以具有比和该金属层相对的金属电极更小的厚度。在这种情况下,大量的电流可以流过金属电极,并且相对薄的金属层具有优良的散热性能。
可选择地,金属层具有的平面区域可以比其上设置金属层的绝缘基板的平面区域小,并且金属层完全设置在绝缘基板上。在这种情况下,金属层周边和金属电极周边之间的长度增加,从而改善了金属层和金属电极之间的电绝缘。
可选择地,该器件还可以包括用于模制金属层、第一和第二金属电极、半导体元件以及第一和第二绝缘基板的树脂模制物。金属层具有从树脂模制物暴露的表面,并且第一和第二金属电极每个都具有从树脂模制物暴露的部分。
尽管已经参考其优选实施例说明了本发明,但是应该理解本发明不局限于优选的实施例和结构。本发明旨在包括各种改进和等效设置。另外,尽管有优选的各种组合和结构,但是包括更多、更少或仅仅一个元件的其它组合和结构也在本发明的精神和范围内。

Claims (14)

1、一种半导体器件包括:
具有散热性能的第一和第二金属电极(3、4),其中金属电极(3、4)的内表面彼此面对;
夹在所述第一和第二金属电极(3、4)之间的半导体元件(1、2),其中该半导体元件(1、2)电连接到所述电极(3、4)的两个内表面;以及
具有散热性能的第一和第二绝缘基板(5、6),其中所述第一绝缘基板(5)设置在所述第一金属电极(3)上,并且与所述半导体元件(1、2)相对,以及其中所述第二绝缘基板(6)设置在所述第二金属电极(4)上,并且与所述半导体元件(1、2)相对,其中
所述第一和第二绝缘基板(5、6)中的每一个都由陶瓷制成,
所述第一和第二金属电极(3、4)中至少一个包括在平行于所述电极(3、4)、所述半导体元件(1、2)和所述绝缘基板(5、6)的层叠方向的方向上层叠的多个层(3a、3b、4a、4b),并且
设置在半导体元件侧的一层(3b、4b)具有的热膨胀系数比设置在绝缘基板侧的另一层(3a、4a)的热膨胀系数高。
2、根据权利要求1所述的器件,其中
所述第一和第二金属电极(3、4)中的每个都包括在平行于所述层叠方向的方向上层叠的多个层(3a、3b、4a、4b)。
3、根据权利要求1所述的器件,其中
所述第一和第二金属电极(3、4)中的至少一个还包括狭缝。
4、根据权利要求1-3中任何一项所述的器件,其中
最靠近所述绝缘基板(5、6)的一层(3a、4a)由铁系金属制成。
5、根据权利要求4所述的器件,其中
最靠近所述半导体元件(1、2)的另一层(3b、4b)由铜、铜合金、铝或铝合金制成。
6、根据权利要求5所述的器件,其中
所述绝缘基板(5、6)由氧化铝、氮化铝或氮化硅制成。
7、根据权利要求4所述的器件,其中
只有最靠近所述半导体元件(1、2)的一层(3b、4b)电连接到外部电路。
8、根据权利要求7所述的器件,其中
最靠近所述半导体元件(1、2)的一层(3b、4b)通过导电连接部件(14)电连接到导电部件(3d、4d),并且
所述一层(3b、4b)通过所述导电部件(3d、4d)电连接到所述外部电路。
9、根据权利要求7所述的器件,其中
最靠近所述半导体元件(1、2)的所述一层(3b、4b)通过接合线(15)电连接到导电部件(3d、4d),并且
所述一层(3b、4b)通过所述导电部件(3d、4d)电连接到所述外部电路。
10、根据权利要求1-3中任何一项所述的器件,还包括:
设置在所述第一和第二绝缘基板(5、6)中的至少一个上的金属层(7、8),其中
所述金属层(7、8)与所述金属电极(3、4)相对,并且
所述金属层(7、8)与所述金属电极(3、4)电隔离。
11、根据权利要求10所述的器件,其中
所述金属层(7、8)具有的厚度比与该金属层(7、8)相对的所述金属电极(3、4)的厚度小。
12、根据权利要求10所述的器件,其中
所述金属层(7、8)具有的平面区域比其上设置所述金属层(7、8)的所述绝缘基板(5、6)的平面区域小,并且
所述金属层(7、8)完全设置在所述绝缘基板(5、6)上。
13、根据权利要求10所述的器件,其中
所述金属层(7、8)具有狭缝(16)。
14、根据权利要求10所述的器件,还包括:
用于模制所述金属层(7、8)、所述第一和第二金属电极(3、4)、所述半导体元件(1、2)以及所述第一和第二绝缘基板(5、6)的树脂模制物(11),其中
所述金属层(7、8)具有从所述树脂模制物(11)暴露的表面,并且
所述第一和第二金属电极(3、4)中的每个都具有从所述树脂模制物(11)暴露的部分(3c、4c)。
CNB2006101711612A 2005-12-26 2006-12-25 具有半导体元件、绝缘基板和金属电极的半导体器件 Expired - Fee Related CN100517696C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP371815/2005 2005-12-26
JP2005371815A JP4450230B2 (ja) 2005-12-26 2005-12-26 半導体装置

Publications (2)

Publication Number Publication Date
CN1992259A true CN1992259A (zh) 2007-07-04
CN100517696C CN100517696C (zh) 2009-07-22

Family

ID=38135983

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2006101711612A Expired - Fee Related CN100517696C (zh) 2005-12-26 2006-12-25 具有半导体元件、绝缘基板和金属电极的半导体器件

Country Status (4)

Country Link
US (1) US7456492B2 (zh)
JP (1) JP4450230B2 (zh)
CN (1) CN100517696C (zh)
DE (1) DE102006059501B4 (zh)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103069565A (zh) * 2010-08-25 2013-04-24 罗伯特·博世有限公司 用于制造电路的方法和电路
CN103117255A (zh) * 2013-02-05 2013-05-22 西安永电电气有限责任公司 Dbc基板
CN103219301A (zh) * 2012-01-18 2013-07-24 三菱电机株式会社 功率半导体模块及其制造方法
CN110098178A (zh) * 2018-01-30 2019-08-06 丰田自动车株式会社 半导体器件
CN110120371A (zh) * 2018-02-06 2019-08-13 丰田自动车株式会社 半导体装置
CN111406316A (zh) * 2017-10-26 2020-07-10 新电元工业株式会社 电子部件

Families Citing this family (59)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2216891B1 (en) * 2003-08-21 2012-01-04 Denso Corporation Mounting structure ofa semiconductor device
JP2007251076A (ja) * 2006-03-20 2007-09-27 Hitachi Ltd パワー半導体モジュール
WO2008053586A1 (en) * 2006-11-02 2008-05-08 Nec Corporation Semiconductor device
WO2008074164A1 (en) * 2006-12-21 2008-06-26 Abb Research Ltd Semiconductor module
DE102007039916A1 (de) * 2007-08-23 2009-02-26 Siemens Ag Aufbau- und Verbindungstechnik von Modulen mittels dreidimensional geformter Leadframes
US7737548B2 (en) * 2007-08-29 2010-06-15 Fairchild Semiconductor Corporation Semiconductor die package including heat sinks
US7773381B2 (en) * 2007-09-26 2010-08-10 Rohm Co., Ltd. Semiconductor device
DE102007046969B3 (de) * 2007-09-28 2009-04-02 Siemens Ag Elektronische Schaltung aus Teilschaltungen und Verfahren zu deren Herstellung und demgemäßer Umrichter oder Schalter
JP4531087B2 (ja) * 2007-11-19 2010-08-25 三菱電機株式会社 電力用半導体装置
JP4506848B2 (ja) * 2008-02-08 2010-07-21 株式会社デンソー 半導体モジュール
JP4748173B2 (ja) 2008-03-04 2011-08-17 株式会社デンソー 半導体モジュール及びその製造方法
US7911792B2 (en) * 2008-03-11 2011-03-22 Ford Global Technologies Llc Direct dipping cooled power module and packaging
WO2009125779A1 (ja) * 2008-04-09 2009-10-15 富士電機デバイステクノロジー株式会社 半導体装置及び半導体装置の製造方法
JP5268660B2 (ja) * 2009-01-08 2013-08-21 三菱電機株式会社 パワーモジュール及びパワー半導体装置
DE202009000615U1 (de) * 2009-01-15 2010-05-27 Danfoss Silicon Power Gmbh Formmassenvergossenes Leistungshalbleiterelement
EP2436032A1 (de) * 2009-05-27 2012-04-04 Curamik Electronics GmbH Gekühlte elektrische baueinheit
JP5126278B2 (ja) * 2010-02-04 2013-01-23 株式会社デンソー 半導体装置およびその製造方法
WO2011156330A1 (en) * 2010-06-08 2011-12-15 Northeastern University Interfacial convective assembly for high aspect ratio structures without surface treatment
JP5273101B2 (ja) * 2010-06-23 2013-08-28 株式会社デンソー 半導体モジュールおよびその製造方法
EP2485256A3 (en) * 2011-02-08 2018-01-03 ABB Research Ltd. A semiconductor device
DE202011100820U1 (de) 2011-05-17 2011-12-01 Ixys Semiconductor Gmbh Leistungshalbleiter
JP5387620B2 (ja) * 2011-05-31 2014-01-15 株式会社安川電機 電力変換装置、半導体装置および電力変換装置の製造方法
US8804340B2 (en) * 2011-06-08 2014-08-12 International Rectifier Corporation Power semiconductor package with double-sided cooling
JP5434986B2 (ja) * 2011-08-10 2014-03-05 株式会社デンソー 半導体モジュールおよびそれを備えた半導体装置
WO2013021647A1 (ja) * 2011-08-10 2013-02-14 株式会社デンソー 半導体モジュール、半導体モジュールを備えた半導体装置、および半導体モジュールの製造方法
EP2745389B1 (de) * 2011-09-29 2018-12-05 Siemens Aktiengesellschaft Stapelfähiger leistungshalbleiterschalter mit löt-bondtechnik
JP2013105882A (ja) * 2011-11-14 2013-05-30 Denso Corp 半導体モジュール
US9076752B2 (en) * 2012-02-14 2015-07-07 Panasonic Intellectual Property Management Co., Ltd. Semiconductor device and method for manufacturing the same
WO2014046058A1 (ja) * 2012-09-20 2014-03-27 ローム株式会社 パワーモジュール半導体装置およびインバータ装置、およびパワーモジュール半導体装置の製造方法、および金型
JP6041262B2 (ja) * 2012-11-29 2016-12-07 国立研究開発法人産業技術総合研究所 半導体モジュール
JP2014127583A (ja) * 2012-12-26 2014-07-07 Toyota Motor Corp 半導体モジュール
US9147631B2 (en) 2013-04-17 2015-09-29 Infineon Technologies Austria Ag Semiconductor power device having a heat sink
JP6201800B2 (ja) * 2014-02-14 2017-09-27 トヨタ自動車株式会社 半導体モジュール
US9589922B2 (en) * 2014-03-16 2017-03-07 Infineon Technologies Ag Electronic module and method of manufacturing the same
US11437304B2 (en) * 2014-11-06 2022-09-06 Semiconductor Components Industries, Llc Substrate structures and methods of manufacture
US10177084B2 (en) 2014-12-12 2019-01-08 Hitachi, Ltd. Semiconductor module and method of manufacturing semiconductor module
JP6380076B2 (ja) * 2014-12-15 2018-08-29 トヨタ自動車株式会社 半導体装置
WO2016111059A1 (ja) * 2015-01-09 2016-07-14 株式会社村田製作所 パワー半導体のパッケージ素子
DE102015102041A1 (de) 2015-02-12 2016-08-18 Danfoss Silicon Power Gmbh Leistungsmodul
JP6623283B2 (ja) * 2016-03-24 2019-12-18 株式会社日立製作所 パワー半導体モジュール
ES2773479T3 (es) * 2016-05-24 2020-07-13 Mitsubishi Electric Corp Sistema que comprende al menos un módulo de potencia que comprende al menos un chip de potencia que se refrigera con una barra colectora refrigerada por líquido
US10403601B2 (en) 2016-06-17 2019-09-03 Fairchild Semiconductor Corporation Semiconductor package and related methods
JP6493317B2 (ja) * 2016-06-23 2019-04-03 三菱電機株式会社 半導体装置
DE102016120778B4 (de) * 2016-10-31 2024-01-25 Infineon Technologies Ag Baugruppe mit vertikal beabstandeten, teilweise verkapselten Kontaktstrukturen
US10586754B2 (en) * 2016-11-01 2020-03-10 Semiconductor Components Industries, LLC (BHB) Semiconductor die package and manufacturing method
US10727151B2 (en) * 2017-05-25 2020-07-28 Infineon Technologies Ag Semiconductor chip package having a cooling surface and method of manufacturing a semiconductor package
JP6884723B2 (ja) * 2018-03-23 2021-06-09 株式会社東芝 半導体装置
WO2020118289A1 (en) * 2018-12-07 2020-06-11 Alliance For Sustainable Energy, Llc Electronics packaging using organic electrically insulating layers
DE102019135271A1 (de) * 2019-12-19 2021-06-24 Seg Automotive Germany Gmbh Leistungsmodul, Stromrichter und Kraftfahrzeugkomponente
KR20210103302A (ko) * 2020-02-13 2021-08-23 엘지마그나 이파워트레인 주식회사 전력 모듈
US20210305166A1 (en) * 2020-03-27 2021-09-30 Cree, Inc. Power semiconductor package with improved performance
DE202021004377U1 (de) 2020-10-14 2024-01-05 Rohm Co., Ltd. Halbleitermodul
US20230245960A1 (en) 2020-10-14 2023-08-03 Rohm Co., Ltd. Semiconductor module
CN116936485A (zh) 2020-10-14 2023-10-24 罗姆股份有限公司 半导体模块
US11658171B2 (en) 2020-12-23 2023-05-23 Semiconductor Components Industries, Llc Dual cool power module with stress buffer layer
US11646249B2 (en) 2020-12-29 2023-05-09 Semiconductor Components Industries, Llc Dual-side cooling semiconductor packages and related methods
JP7001186B1 (ja) 2021-03-18 2022-01-19 富士電機株式会社 半導体装置、半導体モジュール、車両、および、半導体装置の製造方法
US20220415745A1 (en) * 2021-06-29 2022-12-29 Infineon Technologies Ag Semiconductor packages including recesses to contain solder
JP2023038533A (ja) 2021-09-07 2023-03-17 株式会社 日立パワーデバイス 半導体装置

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2051474B (en) 1979-06-19 1984-04-26 Aei Semiconductors Ltd Mounting arrangements for electrical components
JPS61240665A (ja) 1985-04-17 1986-10-25 Sanyo Electric Co Ltd 半導体装置
US6072240A (en) 1998-10-16 2000-06-06 Denso Corporation Semiconductor chip package
KR20000057810A (ko) * 1999-01-28 2000-09-25 가나이 쓰토무 반도체 장치
US6703707B1 (en) 1999-11-24 2004-03-09 Denso Corporation Semiconductor device having radiation structure
JP3560142B2 (ja) 2000-01-31 2004-09-02 日立化成工業株式会社 半導体パッケ−ジ用チップ支持基板の製造方法、及び半導体パッケ−ジ用チップ支持基板を用いた半導体パッケージとその製造法
EP1148547B8 (en) 2000-04-19 2016-01-06 Denso Corporation Coolant cooled type semiconductor device
JP2002289768A (ja) * 2000-07-17 2002-10-04 Rohm Co Ltd 半導体装置およびその製法
JP2003007703A (ja) 2001-06-26 2003-01-10 Matsushita Electric Works Ltd 半導体装置
JP2003068953A (ja) 2001-08-28 2003-03-07 Toyota Industries Corp 放熱板
JP2003124410A (ja) 2001-10-19 2003-04-25 Yamaha Corp 多層ヒートシンクおよびその製造方法
JP4258391B2 (ja) 2004-01-30 2009-04-30 株式会社デンソー 半導体装置

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103069565A (zh) * 2010-08-25 2013-04-24 罗伯特·博世有限公司 用于制造电路的方法和电路
CN103219301A (zh) * 2012-01-18 2013-07-24 三菱电机株式会社 功率半导体模块及其制造方法
US9059334B2 (en) 2012-01-18 2015-06-16 Mitsubishi Electric Corporation Power semiconductor module and method of manufacturing the same
CN103219301B (zh) * 2012-01-18 2016-01-20 三菱电机株式会社 功率半导体模块及其制造方法
CN103117255A (zh) * 2013-02-05 2013-05-22 西安永电电气有限责任公司 Dbc基板
CN111406316A (zh) * 2017-10-26 2020-07-10 新电元工业株式会社 电子部件
CN110098178A (zh) * 2018-01-30 2019-08-06 丰田自动车株式会社 半导体器件
CN110120371A (zh) * 2018-02-06 2019-08-13 丰田自动车株式会社 半导体装置

Also Published As

Publication number Publication date
US20070145540A1 (en) 2007-06-28
US7456492B2 (en) 2008-11-25
DE102006059501A1 (de) 2007-07-05
JP4450230B2 (ja) 2010-04-14
JP2007173680A (ja) 2007-07-05
DE102006059501B4 (de) 2013-08-08
CN100517696C (zh) 2009-07-22

Similar Documents

Publication Publication Date Title
CN1992259A (zh) 具有半导体元件、绝缘基板和金属电极的半导体器件
US8324726B2 (en) Semiconductor device, electrode member and electrode member fabrication method
US8569890B2 (en) Power semiconductor device module
JP6299120B2 (ja) 半導体モジュール
CN1638119A (zh) 电力半导体装置
CN1227734C (zh) 半导体器件
CN1467828A (zh) 半导体器件
JP2007184525A (ja) 電子機器装置
JP2008085169A (ja) パワー半導体モジュール
JP4885046B2 (ja) 電力用半導体モジュール
JP2013069782A (ja) 半導体装置
JP7443359B2 (ja) 半導体装置
KR102228945B1 (ko) 반도체 패키지 및 이의 제조방법
CN111276447B (zh) 双侧冷却功率模块及其制造方法
CN100345290C (zh) 半导体器件
CN1763933A (zh) 印刷电路板与引入其的电路单元
US20180005923A1 (en) Semiconductor device
US20160035657A1 (en) Semiconductor device and semiconductor module
US20170062317A1 (en) Power semiconductor module and method for manufacturing the same
JP6246057B2 (ja) 半導体装置
TWM354185U (en) Improved packaging substrate and light-emitting device applying the same
US20200203252A1 (en) Semiconductor device and method of manufacturing the same
JP2012209470A (ja) 半導体装置、半導体装置モジュール及び半導体装置の製造方法
KR101216896B1 (ko) 파워 모듈
JP2007227762A (ja) 半導体装置及びこれを備えた半導体モジュール

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20090722

CF01 Termination of patent right due to non-payment of annual fee