CN1989570A - 半导体存储装置 - Google Patents
半导体存储装置 Download PDFInfo
- Publication number
- CN1989570A CN1989570A CNA200480043578XA CN200480043578A CN1989570A CN 1989570 A CN1989570 A CN 1989570A CN A200480043578X A CNA200480043578X A CN A200480043578XA CN 200480043578 A CN200480043578 A CN 200480043578A CN 1989570 A CN1989570 A CN 1989570A
- Authority
- CN
- China
- Prior art keywords
- signal
- address
- circuit
- access
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40603—Arbitration, priority and concurrent access to memory cells for read/write or refresh operations
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40615—Internal triggering or timing of refresh, e.g. hidden refresh, self refresh, pseudo-SRAMs
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4076—Timing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
- G11C7/1045—Read-write mode select circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Dram (AREA)
Abstract
Description
Claims (10)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2004/010210 WO2006008796A1 (ja) | 2004-07-16 | 2004-07-16 | 半導体記憶装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1989570A true CN1989570A (zh) | 2007-06-27 |
CN100550196C CN100550196C (zh) | 2009-10-14 |
Family
ID=35784932
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB200480043578XA Expired - Fee Related CN100550196C (zh) | 2004-07-16 | 2004-07-16 | 半导体存储装置 |
Country Status (7)
Country | Link |
---|---|
US (1) | US7719915B2 (zh) |
EP (1) | EP1770711B1 (zh) |
JP (1) | JPWO2006008796A1 (zh) |
KR (2) | KR100874179B1 (zh) |
CN (1) | CN100550196C (zh) |
DE (1) | DE602004018847D1 (zh) |
WO (1) | WO2006008796A1 (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104737144A (zh) * | 2012-10-25 | 2015-06-24 | 德州仪器公司 | 存储器存取的动态优先级管理 |
CN113223570A (zh) * | 2020-01-21 | 2021-08-06 | 晶豪科技股份有限公司 | 目标行刷新方法及存储器装置中所采用的决策电路 |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7292490B1 (en) * | 2005-09-08 | 2007-11-06 | Gsi Technology, Inc. | System and method for refreshing a DRAM device |
KR100795005B1 (ko) | 2006-06-09 | 2008-01-16 | 주식회사 하이닉스반도체 | 반도체 메모리 장치 |
KR100886180B1 (ko) * | 2007-05-25 | 2009-02-27 | 엠텍비젼 주식회사 | 의사 스태틱 랜덤 액세스 메모리 장치, 메모리 장치 및의사 스태틱 랜덤 액세스 메모리 장치의 동작 방법 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1166843A (ja) * | 1997-08-08 | 1999-03-09 | Mitsubishi Electric Corp | 半導体記憶装置 |
KR100329734B1 (ko) * | 1998-04-03 | 2002-06-20 | 박종섭 | 어드레스입력및데이터입력용으로동일단자를겸용하는반도체메모리장치 |
JP4408500B2 (ja) * | 1999-11-18 | 2010-02-03 | 株式会社ルネサステクノロジ | 半導体集積回路 |
JP2001216800A (ja) * | 2000-02-01 | 2001-08-10 | Fujitsu Ltd | 半導体集積回路および半導体集積回路の特性調整方法 |
JP3778417B2 (ja) * | 2000-02-29 | 2006-05-24 | 富士通株式会社 | 半導体記憶装置 |
JP3636968B2 (ja) * | 2000-06-05 | 2005-04-06 | エルピーダメモリ株式会社 | 半導体装置及びそのテスト方法 |
JP4749538B2 (ja) * | 2000-12-11 | 2011-08-17 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
US6587395B2 (en) * | 2001-05-30 | 2003-07-01 | Fujitsu Limited | System to set burst mode in a device |
JP4768163B2 (ja) * | 2001-08-03 | 2011-09-07 | 富士通セミコンダクター株式会社 | 半導体メモリ |
JP4249412B2 (ja) * | 2001-12-27 | 2009-04-02 | Necエレクトロニクス株式会社 | 半導体記憶装置 |
JP4078119B2 (ja) * | 2002-04-15 | 2008-04-23 | 富士通株式会社 | 半導体メモリ |
JP4246971B2 (ja) * | 2002-07-15 | 2009-04-02 | 富士通マイクロエレクトロニクス株式会社 | 半導体メモリ |
JP3998539B2 (ja) * | 2002-08-28 | 2007-10-31 | 富士通株式会社 | 半導体記憶装置 |
JP2004199842A (ja) * | 2002-12-20 | 2004-07-15 | Nec Micro Systems Ltd | 半導体記憶装置及びその制御方法 |
-
2004
- 2004-07-16 EP EP04747675A patent/EP1770711B1/en not_active Expired - Fee Related
- 2004-07-16 DE DE602004018847T patent/DE602004018847D1/de active Active
- 2004-07-16 JP JP2006527685A patent/JPWO2006008796A1/ja active Pending
- 2004-07-16 WO PCT/JP2004/010210 patent/WO2006008796A1/ja active Application Filing
- 2004-07-16 CN CNB200480043578XA patent/CN100550196C/zh not_active Expired - Fee Related
- 2004-07-16 KR KR1020077001239A patent/KR100874179B1/ko not_active IP Right Cessation
- 2004-07-16 KR KR1020087023993A patent/KR100909411B1/ko not_active IP Right Cessation
-
2007
- 2007-01-16 US US11/653,338 patent/US7719915B2/en not_active Expired - Fee Related
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104737144A (zh) * | 2012-10-25 | 2015-06-24 | 德州仪器公司 | 存储器存取的动态优先级管理 |
CN104737144B (zh) * | 2012-10-25 | 2017-09-22 | 德州仪器公司 | 存储器存取的动态优先级管理 |
CN113223570A (zh) * | 2020-01-21 | 2021-08-06 | 晶豪科技股份有限公司 | 目标行刷新方法及存储器装置中所采用的决策电路 |
CN113223570B (zh) * | 2020-01-21 | 2024-03-26 | 晶豪科技股份有限公司 | 目标行刷新方法及存储器装置中所采用的决策电路 |
Also Published As
Publication number | Publication date |
---|---|
KR20080102274A (ko) | 2008-11-24 |
JPWO2006008796A1 (ja) | 2008-05-01 |
DE602004018847D1 (de) | 2009-02-12 |
EP1770711A4 (en) | 2007-08-15 |
KR100909411B1 (ko) | 2009-07-24 |
US7719915B2 (en) | 2010-05-18 |
WO2006008796A1 (ja) | 2006-01-26 |
EP1770711B1 (en) | 2008-12-31 |
KR100874179B1 (ko) | 2008-12-15 |
EP1770711A1 (en) | 2007-04-04 |
US20070109897A1 (en) | 2007-05-17 |
CN100550196C (zh) | 2009-10-14 |
KR20070021321A (ko) | 2007-02-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
ASS | Succession or assignment of patent right |
Owner name: FUJITSU MICROELECTRONICS CO., LTD. Free format text: FORMER OWNER: FUJITSU LIMITED Effective date: 20081024 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20081024 Address after: Tokyo, Japan, Japan Applicant after: Fujitsu Microelectronics Ltd. Address before: Kanagawa Applicant before: Fujitsu Ltd. |
|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C56 | Change in the name or address of the patentee |
Owner name: FUJITSU SEMICONDUCTORS CO., LTD Free format text: FORMER NAME: FUJITSU MICROELECTRON CO., LTD. |
|
CP03 | Change of name, title or address |
Address after: Kanagawa Patentee after: Fujitsu Semiconductor Co., Ltd. Address before: Tokyo, Japan, Japan Patentee before: Fujitsu Microelectronics Ltd. |
|
ASS | Succession or assignment of patent right |
Owner name: SUOSI FUTURE CO., LTD. Free format text: FORMER OWNER: FUJITSU SEMICONDUCTOR CO., LTD. Effective date: 20150512 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20150512 Address after: Kanagawa Patentee after: Co., Ltd. Suo Si future Address before: Kanagawa Patentee before: Fujitsu Semiconductor Co., Ltd. |
|
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20091014 Termination date: 20180716 |