CN1841704A - 半导体器件及其制造方法 - Google Patents
半导体器件及其制造方法 Download PDFInfo
- Publication number
- CN1841704A CN1841704A CNA2005100914263A CN200510091426A CN1841704A CN 1841704 A CN1841704 A CN 1841704A CN A2005100914263 A CNA2005100914263 A CN A2005100914263A CN 200510091426 A CN200510091426 A CN 200510091426A CN 1841704 A CN1841704 A CN 1841704A
- Authority
- CN
- China
- Prior art keywords
- dielectric film
- grid dielectric
- active area
- grid
- processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823462—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823481—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
Claims (17)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005096089 | 2005-03-29 | ||
JP2005096089A JP4413809B2 (ja) | 2005-03-29 | 2005-03-29 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1841704A true CN1841704A (zh) | 2006-10-04 |
CN100594598C CN100594598C (zh) | 2010-03-17 |
Family
ID=37030637
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN200510091426A Expired - Fee Related CN100594598C (zh) | 2005-03-29 | 2005-08-11 | 半导体器件及其制造方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7396715B2 (zh) |
JP (1) | JP4413809B2 (zh) |
CN (1) | CN100594598C (zh) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101123252B (zh) * | 2006-08-10 | 2011-03-16 | 松下电器产业株式会社 | 半导体装置及其制造方法 |
JP4762169B2 (ja) * | 2007-02-19 | 2011-08-31 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
JP5449942B2 (ja) | 2009-09-24 | 2014-03-19 | セイコーインスツル株式会社 | 半導体装置およびその製造方法 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5254489A (en) * | 1990-10-18 | 1993-10-19 | Nec Corporation | Method of manufacturing semiconductor device by forming first and second oxide films by use of nitridation |
JPH07219970A (ja) * | 1993-12-20 | 1995-08-18 | Xerox Corp | 加速フォーマットでの再生方法及び再生装置 |
JPH10187188A (ja) * | 1996-12-27 | 1998-07-14 | Shinano Kenshi Co Ltd | 音声再生方法と音声再生装置 |
US6048769A (en) * | 1997-02-28 | 2000-04-11 | Intel Corporation | CMOS integrated circuit having PMOS and NMOS devices with different gate dielectric layers |
US6184083B1 (en) * | 1997-06-30 | 2001-02-06 | Kabushiki Kaisha Toshiba | Semiconductor device and method of manufacturing the same |
US6087236A (en) * | 1998-11-24 | 2000-07-11 | Intel Corporation | Integrated circuit with multiple gate dielectric structures |
JP2000188338A (ja) | 1998-12-21 | 2000-07-04 | Hitachi Ltd | 半導体装置及びその製造方法 |
US7260311B2 (en) * | 2001-09-21 | 2007-08-21 | Matsushita Electric Industrial Co., Ltd. | Apparatus, method, program and recording medium for program recording and reproducing |
-
2005
- 2005-03-29 JP JP2005096089A patent/JP4413809B2/ja not_active Expired - Fee Related
- 2005-07-27 US US11/189,816 patent/US7396715B2/en not_active Expired - Fee Related
- 2005-08-11 CN CN200510091426A patent/CN100594598C/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US20060220143A1 (en) | 2006-10-05 |
JP4413809B2 (ja) | 2010-02-10 |
CN100594598C (zh) | 2010-03-17 |
JP2006278752A (ja) | 2006-10-12 |
US7396715B2 (en) | 2008-07-08 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
ASS | Succession or assignment of patent right |
Owner name: FUJITSU MICROELECTRONICS CO., LTD. Free format text: FORMER OWNER: FUJITSU LIMITED Effective date: 20081107 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20081107 Address after: Tokyo, Japan Applicant after: FUJITSU MICROELECTRONICS Ltd. Address before: Kanagawa Applicant before: Fujitsu Ltd. |
|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C56 | Change in the name or address of the patentee |
Owner name: FUJITSU SEMICONDUCTOR CO., LTD. Free format text: FORMER NAME: FUJITSU MICROELECTRON CO., LTD. |
|
CP01 | Change in the name or title of a patent holder |
Address after: Japan's Kanagawa Prefecture Yokohama Patentee after: FUJITSU MICROELECTRONICS Ltd. Address before: Japan's Kanagawa Prefecture Yokohama Patentee before: Fujitsu Microelectronics Ltd. |
|
CP02 | Change in the address of a patent holder |
Address after: Japan's Kanagawa Prefecture Yokohama Patentee after: FUJITSU MICROELECTRONICS Ltd. Address before: Tokyo, Japan Patentee before: Fujitsu Microelectronics Ltd. |
|
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20100317 Termination date: 20190811 |
|
CF01 | Termination of patent right due to non-payment of annual fee |