CN1830091B - 带有单引线框的h桥 - Google Patents

带有单引线框的h桥 Download PDF

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CN1830091B
CN1830091B CN038042428A CN03804242A CN1830091B CN 1830091 B CN1830091 B CN 1830091B CN 038042428 A CN038042428 A CN 038042428A CN 03804242 A CN03804242 A CN 03804242A CN 1830091 B CN1830091 B CN 1830091B
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circuit
mosfet
pin
low side
bridge driver
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CN1830091A (zh
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布鲁诺C·纳得
樊尚·蒂埃里
格扎维埃·德佛吕托
李植荫
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Infineon Technologies North America Corp
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International Rectifier Corp USA
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/08—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for dynamo-electric motors
    • H02H7/0833—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for dynamo-electric motors for electric motors with control arrangements
    • H02H7/0838—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for dynamo-electric motors for electric motors with control arrangements with H-bridge circuit
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P7/00—Arrangements for regulating or controlling the speed or torque of electric DC motors
    • H02P7/03—Arrangements for regulating or controlling the speed or torque of electric DC motors for controlling the direction of rotation of DC motors
    • H02P7/04—Arrangements for regulating or controlling the speed or torque of electric DC motors for controlling the direction of rotation of DC motors by means of a H-bridge circuit
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P2203/00—Indexing scheme relating to controlling arrangements characterised by the means for detecting the position of the rotor
    • H02P2203/07—Motor variable determination based on the ON-resistance of a power switch, i.e. the voltage across the switch is measured during the ON state of the switch and used to determine the current in the motor and to calculate the speed

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Control Of Direct Current Motors (AREA)
  • Electronic Switches (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

一电路方框图，包括含在封装(33)中的控制电路。因此，MOSFET(31)和(33)被分别提供了相应的击穿保护电路(61)和(62)，并分别带有过流关机电路(63)和(64)。

Description

带有单引线框的H桥
技术领域
本发明涉及一种直流电机控制电路，更具体地涉及一种用于可控制地驱动诸如直流(d-c)电机的负载的新颖的H桥驱动器。
背景技术
控制电路用于驱动直流电机是众所周知的。通常采用H桥电路，其包括两个高端MOSFET(金属氧化物半导体场效应晶体管)和两个低端MOSFET，其中每个高端器件与相应的低端器件串联。每对高端和低端器件之间的节点(下文分别称为M1和M2)与电机端子相连接；每个高端器件的漏极与诸如电池的直流电源(下文称为Vcc)相连接，并且每个低端器件的源极与地(下文称GND)相连。
控制电路则被提供用来使高端和低端器件导通和截止，以驱动电流以一定方向通过电机的线圈，从而使电机转子顺时针或逆时针旋转。
用于这种电路的MOSFET通常被单独安装成为分立的器件；并且对它们进行导电控制的控制电路也被形成为分立的电路或几个集成电路和分立电路的组合。另外，电路控制还需要复杂的编程电路。所有这些都增加了控制的复杂性和成本，并降低了其可靠性。
减少这些电路中的元件数量、简化它们的操作、以及消除对编程控制功能的需求是人们所期望的。
发明内容
本发明提供了一种用于驱动电负载的H桥驱动器，所述H桥驱动器包括：第一和第二高端MOSFET以及第一和第二低端MOSFET，每个所述MOSFET具有各自的漏极、源极和控制电极；所述高端MOSFET的漏极和所述低端MOSFET的源极连接到功率输入端；在限定出输出桥端子的第一和第二节点处，所述第一和第二高端MOSFET的源极分别与所述第一和第二低端MOSFET的漏极相连；用于控制所述高端和低端MOSFET的操作的控制集成电路；所述控制集成电路具有可连接以接收来自外部桥控制电路的输入控制信号的输入端，并且具有连接到所述高端MOSFET的所述控制电极的输出端；用于支撑所述第一和第二高端MOSFET和所述集成电路的支撑装置；封装所述第一和第二高端MOSFET及所述集成电路的公共绝缘外壳；以及从所述外壳伸出的多个连接管脚；所述第一和第二高端MOSFET包括智能功率开关并且具有输出端，所述输出端带有与开关电流和MOSFET管芯温度相关的信号；当电流或管芯温度超过一个给定值时，与所述集成电路连接的所述输出端产生输出信号给微控制器以使所述H桥停止工作。
根据本发明，一种新颖的全保护双工高端开关集成电路(IC)配有两个附加的分立低端开关。这两个高端开关和控制它们操作的控制IC可以包容在单塑料封装中的一个公共散热器(heat sink)上，该封装带有合适的连接管脚，以用于连接直流源、地、电机端子和微控制器，微控制器用于控制特定的电机操作。还提供了用于RC控制电路的管脚，RC控制电路用于控制软启动，其独立于来自所述微控制器的信号。
该单高端封装驱动和控制着整个H桥电路，并包含许多新颖的特征。
为说明的目的，还示出了输入将在后面说明的两个高端FET(场效应晶体管)驱动器的输入信号IN1和IN2，其被加载给两个高端FET(图1)，并且操作用来选择电机操作模式以及提供每种模式中的控制。首先，提供了新颖的自适应击穿(shoot thru)预防电路(在截止期间)以防止串联连接的(半桥)高端MOSFET和低端MOSFET同时导通。根据该特征，低端驱动电路包含在装有高端器件的集成控制电路中。当电路被切断时，两个低端FET总是正常导通以锁闭电机。为了实现切断，高端MOSFET通过IN1或IN2被截止，IN1或IN2使得与它相应的低端FET的低端驱动电路导通，以使其在较慢的高端MOSFET完全截止之前导通，特别是在其输出电压达到或超过某个小值(例如2伏)时。更具体地，为了使高端MOSFET截止，高端FET被截止，并且电路进行等待直到其输出电压小于约2伏为止。截止的低端FET随后被导通以锁闭电机负载。因此，击穿保护是在不带有常规的空载时间(dead-time)控制电路的情况下被自适应地提供的。
其次，提供了在每次电机启动时可由IN1和IN2信号选择的新颖的软启动序列。软启动电路采用PWM(脉冲宽度调制)序列，其使得低端开关中相应的一个进行循环，供应给该低端开关的电流由高端开关(MOSFET)之一控制。这限制了电机的冲击电流。软开关序列由简单的RC电路操作(编程)，并在启动后自动复位。
第三，该新颖的电路提供了在高端MOSFET封装中的IC的控制下的过流(短路)和超温(过载)保护。这些保护功能由高端MOSFET上的电流传感器和热传感器(它们是“IPS”开关)实现，并向所述微控制器提供状态反馈以要求关机(shut-down)。当IN1和IN2都为低电平(或零)时，保护电路随即被复位。
第四，在单个控制IC中实现了许多其他的功能，这些功能可由信号IN1和IN2联合选择，例如，欠压锁闭(lockout)、电机制动、温度保护和诊断反馈。
附图说明
图1的图示出了本发明的H桥电路以及由其驱动的直流电机；
图1A是本发明新颖的高端驱动封装的截面图；
图1B是封装的另一个实施方案的截面图，其中所有4个MOSFET都处在一个单封装中；
图1C示出了用于排列图1A的高端MOSFET和IC的优选拓扑结构的俯视图；
图1D示出了类似于图1A的截面图，其中提供了导电的引线框支架；
图2的立体图示出了图1中的低端封装之一；
图3是图2的俯视图；
图4是图1A的封装的立体图；
图5是图4的俯视图；
图6示出了利用图2、图3、图4和图5实现的图1的电路；
图7是图2的高端封装的电路图，包括控制IC和其他控制电路；
图8是与图6相类似的图，其示出了用于软启动电路的一个具体负载电路和RC定时电路；
图9示出了控制IC中的击穿保护电路的一部分；
图10示出了软启动电路的一部分；
图11示出了用于睡眠模式和RC复位的逻辑控制的一部分；
图12示出了IC控制中的关机电路的一部分；
图13到图18示出了图1到图12所示电路的各种操作特征。
具体实施方式
参照图1，其中示出了根据本发明制造的一种H桥电路。图1还示出了被安排用于驱动直流电机30的本发明的桥电路，但该新颖的桥电路也可被用于其他的应用，例如，用于驱动线性螺线管和其他负载。
图1的桥路由第一和第二高端MOS门控(MOSgated)器件31和32组成，它们在图中被显示为N沟道垂直导电MOSFET。注意，本发明可以由其它的MOS门控器件(如IGBT(绝缘栅双极型晶体管))实现，并且也可以由P沟道器件实现。可以将MOSFET 31和32安装成使它们的漏极处在公共的散热器上，如导电的切片框架垫(diced frame pad)上，或PCB板上的导电迹线(trace)上，并可以如虚线框所示包含在单个封装33中。在随后说明的图4、图5和图6中更详细地示出了封装33。
图1的桥还包括两个低端MOS门控器件40和41。每个MOS门控器件40和41也被显示为N沟道MOSFET，并且单独被分别封装在分立的封装42和43中(见图2、图3和图6)。
因而，低端MOSFET 42和43可被包容在如图2、图3和图6所示的8引线SOIC(小外形集成电路)封装中，并且其每一个都可以(例如)国际整流器公司的IRFL 7484型器件，该公司位于加利福尼亚州的E1西贡多(Segundo)，并且是本申请的受让人。上述的IRFL 7484型器件是一个6.8mΩ、40伏的器件，其额定值(rating)可以根据需要改变。图2、图3和图6示出了器件42、43(图6)的管脚外观(pin-out)，其包括源极S、漏极D和栅极G端子。
含有高端MOSFET 31和32的封装33在图4、图5和图6中示出，其中示出了封装外的管脚。下面给出了管脚或引线的定义，其功能将在后文更详细地描述。
 VCC   正电源
 M1   电机1输出(高端源极-引脚1)
 M2   电机2输出(高端源极-引脚2)
 G1   栅极1驱动输出(低端栅极-引脚1)
 G2   栅极2驱动输出(低端栅极-引脚2)
 Gnd   电源返回(return)
 IN1   逻辑输入1(引脚1，Cdt./模式)
 VCC   正电源
 IN2   逻辑输入2(引脚2，Cdt./模式)
 Dg   诊断输出(漏极开路)
 Vrc   电压基准输出(软启动RC)
 SS   RC软启动输入(该输入上的电压驱动开关占空比(duty cycle))
如图1D所示，器件的源极27和28优选地安装在一个公共导电支架上，例如导电铜或铜合金引线框的主垫(pad)上。如果使用引线框，那么在引线框元件分离之前，上述管脚将与引线框集成在一起。
图1A示出了在取代了引线框的支撑电路板20上的MOSFET 31和32的另一种可能的支撑结构。板20带有铜涂层21和22，并且MOSFET 31和32的漏极23和24分别与导电层21电导通连接。在图1A和1D示出的器件31和32的源极27和28分别与突出到绝缘罩壳33的边界之外的端子M1和M2相连接。MOSFET 31和32的源极27和28分别与外部接地管脚GND相连接。MOSFET的选通控制(gate control)电极随后通过引线接合(wirebonding)被连接到合适的控制IC上，该控制IC被支撑在板20上，并将随后描述。该控制IC可通过绝缘管芯连接介质安装到层21(或图1D中的导电引线架)上。
图1B示出了对图1A和图1D的改进，其中，低端MOSFET 40和41被分别安装在MOSFET 31和32的顶上，它们的漏极与MOSFET的31和32的源极粘合连接并电连接。因而，整个驱动器被包容在图1B所示的单个封装中。注意，图1B中的结构可与图1D中的引线框支架一起使用。
图1C示出了MOSFET 31和32以及控制IC的结构的另一个优选实施方案的俯视图。
如随后将描述的图1和图6的电路是受到完全保护的双工高端开关，其特征整个H桥电路的控制。该保护电路可以与两个低端MOSFET 40和41一起集成进封装33。可以限制直流电机负载30的浪涌电流，并且可以在制动模式下以两个方向驱动电机30而无需外部电源管理。如后文所述，还可提供电流保护(短路)和由于过载而造成的温度响应关机。
高端开关31和32提供方向能力和H桥保护。作为控制功能的一个示例，所示的MOSFET 31、32、40和41的导通/截止状态使电机按照图1中的箭头50的方向旋转。通过提供高频开关能力，低端MOSFET 40和41为电路带来了灵活性。因此，如后文所述，可以通过平缓低应力速度斜坡上升(ramp up)来避免电机的硬启动。
在描述处理睡眠模式、击穿保护、软启动和热保护的控制电路之前，理解MOSFET 31、32、40和41的导通和截止顺序是有益的。
通过下面的电机30的6种不同控制模式的真值表可以更好地理解这种操作。
 IN1   IN2   模式   DG   FET 31   FET40   FET 32   FET41   SS复位
  L   L   有制动睡眠模式的待机   H   截止   导通   截止   导通   导通
  L   H   前向旋转(正常操作)   H   截止   导通   导通   截止   截止
  L   H   前向旋转(保护触发)   L   截止   导通   截止   截止   截止
  H   L   反向旋转(正常操作)   H   导通   截止   截止   导通   截止
  H   L   反向旋转(保护触发)   L   截止   截止   截止   导通   截止
  H   H   无制动的待机   H   截止   截止   截止   截止   导通
在上表中，后文将示出，在“睡眠模式”下，所有的保护电路被复位；并且MOSFET 40在反向旋转(“正常模式”和“保护触发”)中被显示为“导通”时，该低端部分正在切换。
注意，在睡眠模式(电机制动开启)中，两个低端器件都应是“导通”的，但提供了最小电流消耗的新颖的控制电路以用于使它们保持在这种状态。
图7是电路的方框图，其包括含在封装33中的控制电路。因此，MOSFET31和32被分别提供了相应的击穿保护电路61和62以及过流关机(shut-down)电路63和64。提供了逻辑控制和状态反馈电路65以控制过流和击穿保护电路。最后，提供了由振荡器70、相对于从管脚VRC获得的基准电压进行切换的比较器71、以及软启动复位开关72组成的软启动控制电路，该软启动控制电路受电路65的控制。这些不同的元件可以被集成在封装33中的一个或多个IC芯片内。
图7的电路架构体现出了几个基本特征：
首先，H桥(包括图6的低端器件40和41)的每个引脚是相互完全独立的。每个引脚以其自己的电流保护和击穿电路为特征。因此，在这四个MOSFET中无需“诊断”命令。
第二，低端MOSFET 40和41的正常静态是导通的。由于所述桥的每个引脚是独立的，所以输入信号IN(1)和IN(2)控制或驱动高端MOSFET31或32以及各自的低端MOSFET 40和41。也就是说，低端器件40和41分别被门驱动器75和76驱动，而门驱动器75和76则分别由高端FET 31和32的击穿保护电路61和62驱动。
关于击穿保护，如前所述，当电路截止时，两个低端MOSFET都将是正常导通的(用于制动)。因此，必须注意使正确的低端器件在其所串连的高端器件被截止之前导通。根据本发明，当与其串连的高端器件的节点的电压值高于某给定值(例如2伏)时，该正确的低端MOSFET必须导通。
第三，振荡器70和比较器71的软启动电路将逐渐增大的脉冲宽度调制信号带给两个低端MOSFET 40和41，而不考虑高端MOSFET 31和32中的电流的方向。因而，脉冲宽度调制电路几乎是独立的，并为扩展操作需求提供了极大的灵活性，如电机速度或扭矩的控制。
上述的每一个特征都被选来用于安全桥路操作或提高IC功能间的独立性，而无需任何H桥逻辑电路。然而，仍需实现的与IC相关的其它功能包括：欠压锁闭(lockout)、温度保护以及诊断反馈。所有这些功能都可以集合在逻辑控制和状态IC 65中。
图6和图7的电路的最终控制(ultimate control)来自微控制器。因而，在图8中，提供了微控制器80，其带有与封装33上的DG管脚相连的诊断反馈端子或管脚81。该微控制器还提供了分别与封装33上的IN(1)管脚和管脚IN(2)相连的顺时针控制信号输出管脚82和逆时针旋转管脚83。这些输入将按照所需的顺序导通或截止MOSFET 31、32、40、41，从而使电机30分别顺时针或逆时针旋转。在典型的应用中，电机30可以使架子(rack)85向左或向右移动直到分别到达停止开关86或87为止，从而阻止电机的操作超过给定的界限。
图8还示出了与电路33上的RC管脚和SS(软启动)管脚相连的电阻90和电容91。这些元件控制并编制软启动序列，其说明将在后面描述。
图9示出了用于图7所示的击穿保护电路61和62的新颖的结构。传统的击穿控制电路在串连的高端和低端器件导电之间采用有意的空载时间(dead time)。本发明采用了新颖的自适应空载时间(dead time)，其中，当MOSFET 31开始截止时，节点M(1)处的电压被与2伏基准89相比较，以导通MOSFET 40。具体而言，图9示出了带有低端MOSFET 40的击穿保护电路61。IC/封装33的M1、G1和GND管脚也被示出。该击穿保护电路包括R-S触发器95和比较器96，其中比较器96是用于MOSFET 40的VDS比较器。
输入到比较器的2伏输入导致恒定的“导通”静态信号被提供给管脚G1。“睡眠模式”输入与晶体管97相连接，以提供低功耗电路来保持MOSFET40处于静态的“导通”状态。(注意，相同的电路被用于低端MOSFET 41)。另外，PWM(脉冲宽度调制)信号被施加给晶体管98(同时施加给两个低端MOSFET 40和41)，但只有非活动的高端能够将该信号转发到管脚G1或管脚G2。
本发明的(每个引脚的)新颖的击穿保护电路有益地分别利用了低端MOSFET 40与41及高端MOSFET 31与32之间的开关时间差。因而，高端MOSFET 31和32的每一个都配置了传统的充电泵(charge pump)以获得高于Vcc的栅极电压。这些充电泵致使高端MOSFET的导通/截止时间比在图9所示的电路中直接导通/截止的低端MOSFET要慢。因而。当IN1(或IN2)被设置为高电平时，施加给管脚G1的信号在充电泵电路使相应的高端MOSFET 31导通之前立即很好地使MOSFET 40截止。因而，在MOSFET 31和40之间不会形成击穿路径。类似地，当IN1处的信号被设置为低电平时，高端开关31缓慢截止，而低端MOSFET 40只有在比较器96监测到的电压VDS被降低到2伏时才会重新导通，并回到其静态导通状态。
结果，图9的新颖的电路定出了没有复杂电路的自适应空载时间(deadtime)电路。本质上，R-S触发器95和比较器96记忆IN1(或类似地在IN2)处的用来导通高端MOSFET 31的请求；并且当完全截止时(例如(M1-GND)＜2伏)，比较器使存储器复位。
图10示出了包含在封装33中的IC内的新颖的软启动电路。
更具体地讲，图10示出了图8的电阻90和电容91以及图7的震荡器70和比较器71。电阻90和电容91从外部安装在电路板上的可接入的位置上，从而它们能够被不同值的器件替换以按需要改变RC时间常数。图10还示出了封装33的管脚VRC、SS和GND。
图10的电路产生用于电路启动的脉冲宽度调制(PWM)信号。振荡器70产生在大约1伏到4伏之间振荡的20KHz以上的锯齿输出。该锯齿输出被与管脚SS处的电压进行比较，从而管脚SS将占空比从0％(如果SS小于1伏)驱动到100％(如果SS大于4伏)。
如图所示，比较器71的脉冲宽度(pulse duration)输出随后逐渐增大，而无需微控制器或程序的控制。SS管脚在正常情况下处在由RC管脚提供电能的RC网90、91的中心点。最后，当H-桥被截止时，放电电路101被执行以使SS复位并保持为低电平。
在操作中，当IN1管脚被置为高电平时，低端MOSFET 40截止，并且像前所述的那样，高端MOSFET 31随后导通，并且放电电路101被释放。管脚SS处的电压缓慢增长，结果产生了低端MOSFET的非活动引脚的栅极处的平滑的占空比变量(PWM信号)。因此，直流电机30所见的开关波形从0％占空比到100％占空比，从而向电机轴上的负载提供了没有应力的斜坡上升。
软启动序列的总的开关持续时间(duration)是RC电路90、91的时间常数的1到4倍。当H桥停止导通时，电容器91通过电阻105(50欧姆)放电。电容91必须在任何新的启动之前完全放电。另外，电机30轴上的负载必须在要求新的启动序列之前必须到达完全停止。软启动持续时间随不同的应用而变化，它取决于直流电机特性、负载、摩擦等，并在浪涌电流限制和软启动持续时间之间寻求折中。RC的值可以从非常平缓的启动(其中软启动持续时间差不多是时间常数Tau的10倍)到低至用于低贯量、低扭矩启动的时间常数Tau的两倍之间变化。
图11示出了图7的IC逻辑控制电路65的一部分，并示出了管脚DG、IN1和IN2。
该电路包括滞后欠压锁闭电路120，其与Vcc连接并在Vcc下降(例如低于4伏)时，使门121和122关闭以防止MOSFET 31和32导通。当自动重启能够发生时，门121、122被禁止，直到Vcc升高到5伏为止。
图11还示出了睡眠模式电路，其包括门123、滞后元件124、125和反相器126、127。当IN1和IN2都为0时，该电路将整个IC切换到低功耗模式(例如小于50微安)。应注意，在睡眠模式期间，低端MOSFET 40和41都保持在导通(ON)。
另外，如图11所示，当IN1和IN2都为高电平时，增加了非制动模式。
最后，当H桥被关闭时，在门128处产生了充电/放电复位信号(复位RC)，不管其是否正在制动(braking)。由于内部的高端开关状态，开启管脚DG的收集器输出被激活。
高端开关31和32优选地为具有电流和热检测能力的IPS(智能功率开关)器件。这些器件可以采用标准的垂直导电MOSFET，其利用测量管芯温度的横向布置的热监测元件来感应电流。更具体地，开关31和32的特征在于它们是这样的封装的或集成的电路，其含有充电泵、过流保护(关机型)状态反馈和有源箝位(active clamp)能力。在某些异常状态下，如自动负载清除(load dump)状态，有源箝位能力是有用的。
图12示出了MOSFET 31和32及其保护电路。因此，任何所需类型的温度检测器件130向比较器130a提供了输出。如果温度超过阀值θth，则向或门131和132施加一个输出。电流监测电路包括用于MOSFET 31的电流镜像电路(mirror circuit)133、134和用于MOSFET 32的电流镜像电路135、136，它们分别向比较器138和比较器139提供输入，比较器138和比较器139对测量的电流和阀值Ith进行比较，如果电流超过了该基准值，则分别向或门131和132提供信号。
来自门138或139的输出分别连接并操作RS触发器140、141。这会产生与图11的DG管脚耦合的输出St1和st2。
图12还示出了分别用于MOSFET 31和32的驱动器及充电泵电路150和151。这些也会通过触发器140、141的操作被测量的电流故障和温度故障所关闭，从而导致桥路的电流或热关机。但应注意，低端MOSFET 40和41保持导通状态，直到复位条件被加载为止。
由于MOSFET 31和32可能不得不在同一时间耗散能量(一个为导通，另一个为保持原状态(free-wheeling))，因此，一旦MOSFET 31、32的结温度超过(例如)165℃，则热保护电路130、130a栓锁(latch off)，并且该故障状态被如上所述地转发到管脚DG。当IN1和IN2在最小时间(例如50微秒)内都为低电平，则保护电路复位。
如图8所示，上述功能使本发明的器件特别适用于直流激励器应用。因而，其提供了一种用来短路直流电机30(制动模式下，IN1和IN2都为低)的“睡眠模式”以及用于在两个方向上运动的斜坡上升软切换，而无需任何附加电路。在电机导线之间短路或任何电机导线接地的情况下，电流关机保护了该应用。另外，假定对低端MOSFET40和41进行了足够的冷却，则可防止整个H桥温度过高。
本发明还体现在新颖的布局以及热控制方面的考虑。因而，在图12中，当其结温度达到预定值(例如165℃)时，热传感器130栓锁(latch off)合适的高端开关31和32。该保护结构假定MOSFET 40和41的结温度将总是低于高端MOSFET的结温度。
已经发现，用来在其被低端器件40、41需要之前确保响应高端器件31、32的热关机的足够的误差限度(margin)就是使低端温度增量ΔT为高端器件温度增量的一半。即：
RDSON)LS·Rthjals＜1/2[RDS(ON)HS·Rthjahs]
其中：
RDS(ON)ls为低端MOSFET 40、41的导通电阻(on resistance)；
RDS(ON)HS为高端MOSFET 31、32的导通电阻；
Rthjals为低端MOSFET 40、41的结与环境(junction to ambient)的热电阻；
Rthjahs为高端MOSFET 32、32的结与环境的热电阻。
应注意，Rthja依赖于封装和容纳该MOSFET的散热器。铜引线框架提供了最好的热性能和电性能。如果使用PCB，可以在PCB支架或用于MOSFET的其它支架上采用适当的铜板、或利用合适的散热器并通过适当设计的连接管脚或其他装置去除热量，从而降低Rthja。
最为本发明所述的受到完全保护的H桥驱动器的一个例子，电路被用于驱动直流电机，并具有下面的特性：
RDSON           -12mΩ
VCC             -5.5到35V
Icont@85℃环境  -6.0安培
I关机           -30安培
操作频率        -20KHz
下表列出了一些绝对最大额定值，它们代表了可以承受的极限，超过它就会造成对驱动器的损害。其中，电压以GND管脚为基准；@25℃的环境温度，带有(2)的符号表示M2输出：
器件热特性为：
Figure G038042428D00132
典型操作条件如下：
Figure G038042428D00133
最后，在Tj＝25℃、Vcc＝14V时的静态电特性为：
Figure G038042428D00141
图13的时序图示出了前述的软启动序列。图13中的3条线示出了公共时基t上的管脚In1[或IN2]、SS和[M1-M2](M1+M2)处的电压。应注意，管脚M1处的占空比调制跟随管脚SS处电压的增大，并且调制周期TSS被设定为约1-4RC(时间常数)。
图14示出了在一个公共时基上的用于图12的管脚IN1或2及M1或2处的有源箝位的有源箝位电压波形以及管脚M1或2处的电流。
图15示出了新颖的保护方案在一个公共时基上的管脚IN1或2、DG、M1或2(电流波形)和假定Tj的时序图。当IM1或Tj达到关机值时，该桥路将被关闭。
图16和17示出了在公共时基上的管脚IN1和M1处的导通和截止条件并定义出了先前使用的各种术语。
图18示出了电机电流与管脚IN1、IN2、SS、M1和M2处的电压的关系的时序图。操作的软启动序列在M1和M2线上示出。所示的制动模式中，M1和M2管脚接地。所示的待机(stand-by)模式中，管脚M1和M2开路(高电平)。
尽管本发明是结合其特定的实施方案描述的，但许多其他的变化和修改对本领域的技术人员来说是显而易见的，因而声明，本发明不仅受本文特定公开内容的限制。

Claims (16)

1.一种用于驱动电负载的H桥驱动器，所述H桥驱动器包括：第一和第二高端MOSFET以及第一和第二低端MOSFET，每个所述MOSFET具有各自的漏极、源极和控制电极；所述高端MOSFET的漏极和所述低端MOSFET的源极连接到功率输入端；在限定出输出桥端子的第一和第二节点处，所述第一和第二高端MOSFET的源极分别与所述第一和第二低端MOSFET的漏极相连；用于控制所述高端和低端MOSFET的操作的控制集成电路；所述控制集成电路具有可连接以接收来自外部桥控制电路的输入控制信号的输入端，并且具有连接到所述高端MOSFET的所述控制电极的输出端；用于支撑所述第一和第二高端MOSFET和所述集成电路的支撑装置；封装所述第一和第二高端MOSFET及所述集成电路的公共绝缘外壳；以及从所述外壳伸出的多个连接管脚；所述第一和第二高端MOSFET包括智能功率开关，所述智能功率开关具有输出端，所述输出端带有与开关电流和MOSFET管芯温度相关的信号；当电流或管芯温度超过一个给定值时，与所述集成电路连接的所述智能功率开关的输出端产生输出信号给所述集成电路以使所述H桥停止工作。
2.如权利要求1所述的H桥驱动器，其中所述连接管脚包括：IN1和IN2管脚，它们分别与所述第一和第二高端MOSFET的控制电极连接；Vcc管脚和GND管脚，它们与所述功率输入端相连；以及M1和M2管脚，它们分别与所述第一和第二节点相连。
3.如权利要求1所述的H桥驱动器，其中所述低端MOSFET在正常情况下都是导通的。
4.根据权利要求3所述的H桥驱动器，还包括在所述集成电路中的击穿保护电路，所述击穿保护电路用于在所述第一或第二高端MOSFET的输出达到与其全部输出电压相比的一个给定的低电压值时，分别响应所述第一或第二高端MOSFET的截止以使所述第一或第二低端器件导通。
5.如权利要求1所述的H桥驱动器，其中，所述集成电路包括脉冲宽度调制发生器，用于向所述低端MOSFET的所述控制电极提供软启动脉冲宽度调制信号。
6.根据权利要求5所述的H桥驱动器，其特征在于，所述低端MOSFET在正常情况下是导通的。
7.根据权利要求6所述的H桥驱动器，还包括在所述集成电路中的击穿保护电路，所述击穿保护电路用于在所述第一或第二高端MOSFET的输出达到与其全部输出电压相比的一个给定的低电压值时，分别响应所述第一或第二高端MOSFET的截止以使所述第一或第二低端器件导通。
8.根据权利要求7所述的H桥驱动器，其中所述连接管脚包括DG管脚，其连接到由所述集成电路响应管芯温度或电流的过度而产生的所述输出信号。
9.根据权利要求2所述的H桥驱动器，其特征在于，所述低端MOSFET在正常情况下是导通的。
10.根据权利要求9所述的H桥驱动器，还包括在所述集成电路中的击穿保护电路，所述击穿保护电路用于在所述第一或第二高端MOSFET的输出达到与其全部输出电压相比的一个给定的低电压值时，分别响应所述第一或第二高端MOSFET的截止以使所述第一或第二低端导通。
11.根据权利要求2所述的H桥驱动器，其特征在于，所述集成电路包括脉冲宽度调制发生器，用于向所述低端MOSFET的所述控制电极提供软启动脉冲宽度调制信号。
12.根据权利要求5所述的H桥驱动器，还包括外部RC电路，所述RC电路与所述集成电路连接，用于控制所述软启动电路的占空比。
13.根据权利要求6所述的H桥驱动器，还包括外部RC电路，所述RC电路与所述集成电路连接，用于控制所述软启动电路的占空比。
14.根据权利要求12所述的H桥驱动器，其特征在于，所述连接管脚包括：VRC管脚，其与所述RC电路的电阻的一端相连接；SS管脚，其与所述RC电路的电阻和电容之间的节点相连接；以及GND管脚，其与所述RC电路的电容的一端相连接。
15.根据权利要求12所述的H桥驱动器，其特征在于，所述连接管脚包括：IN1和IN2管脚，其分别与所述第一和第二高端MOSFET的控制电极连接；Vcc管脚和GND管脚，其与所述功率输入端连接；以及M1和M2管脚，其分别与所述第一和第二节点连接。
16.根据权利要求15所述的H桥驱动器，其特征在于，所述连接管脚包括：VRC管脚，其与所述RC电路的电阻的一端相连接；SS管脚，其与所述RC电路的电阻和电容之间的节点相连接；以及GND管脚，其与所述RC电路的电容一端相连接。
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CN1830091A (zh) 2006-09-06
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US7115922B2 (en) 2006-10-03
WO2003077322A2 (en) 2003-09-18
US6747300B2 (en) 2004-06-08
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