CN1735963A - 具有局部预制图形化引线框架的半导体封装及其制造方法 - Google Patents

具有局部预制图形化引线框架的半导体封装及其制造方法 Download PDF

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CN1735963A
CN1735963A CNA2004800020813A CN200480002081A CN1735963A CN 1735963 A CN1735963 A CN 1735963A CN A2004800020813 A CNA2004800020813 A CN A2004800020813A CN 200480002081 A CN200480002081 A CN 200480002081A CN 1735963 A CN1735963 A CN 1735963A
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chip
lead frame
lead
bonding
encapsulation
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CN100385641C (zh
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S·伊斯兰
R·S·圣安东尼奥
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Advanced Interconnect Technolo
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先进互联技术有限公司
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Abstract

披露了一种形成引线框架以及具有接近芯片尺寸封装(CSP)引线数量的局部图形化引线框架封装的方法,其中该方法使其更加适用于生产线的自动化以及改进由其所生产的封装的质量和可靠性。这是通过执行使金属条在其一侧局部图形化成具有类似网状引线框架的制造工艺步骤的大部分步骤来完成的,与常规完全刻蚀模板型的引线框架相比较,类似网状的引线框架在其另一侧上是实体和平坦的,使其具有机械上的刚性和热性能上的稳健性,从而可以在芯片粘结和引线键合处理工艺的过程中在没有任何扭曲或变形的情况下在芯片层和封装层上进行。金属引线框架的底部一侧进行图形化,以便于只在包括芯片和引线的前面一侧采用密封材料进行密封之后隔离芯片焊盘和引线键合触点。最终的封装具有电性能绝缘,使得条测试和可靠分割(成单个)可以在不一定要切割任何其它金属的条件下进行。也披露了在形成ELP、ELPF和ELGA类型的CSP中的典型的局部图形化引线框架的使用。

Description

具有局部预制图形化引线框架的半导体封装及其制造方法
发明领域
本发明一般涉及电子封装,尤其涉及局部图形化引线框架以及生产和使用该框架的方法。局部图形化引线框架比常规的引线框架更加牢固和更加稳定。局部图形化引线框架的坚固改进了制造引线框架封装的工艺并且提高了终端产品的整体可靠性。
背景技术
在生产使用引线框架的电子封装中,有几个步骤会使引线框架忍受机械和热应力。当前引线框架的较细几何尺寸以及在半导体芯片上不断增加集成电路已经导致对引线框架置以更大应力的过程。较细结构的引线框架非常像精巧的嵌件或者类似雕刻的金属结构,这些结构容易被弄弯、折断、损坏或者变形(见图1a和1b)。在工业中经常使用这种常规的引线框架来生产各种芯片封装,包括引线键合和倒装晶片(FC)的封装(见图2a-2d和3a-3b)。
常规的引线框架一般都缺乏结构上的刚性。引线框架的类似指状部分一般都非常之薄且难以固定到位。这就会引起在装配工艺中的装卸缺陷、损坏和变型并且使得引线键合状态复杂化。因此,在键合工艺中,键合的参数必须进行优化,以便于能够补偿引线框架的颤动。对补偿引线框架机械不稳定而进行的键合参数优化的失败就会导致较差的键合粘结,并且导致键合的质量和可靠性都较差。
典型的引线框架的类似指状的部分是从这些中心部分开始延伸的,称之为芯片接受区域,也可以称之为芯片焊盘。芯片通常是采用背面向下的方式粘结着接受区域,并且前面一侧是定位成面对着在芯片的四周边缘的端点,或者采用阵列的方式盖在芯片的表面。接受区域通常所具有的尺寸是5mm×5mm,并且从芯片焊盘区域向外延伸的引线通常所具有的尺寸是大约10mm长×1mm宽×0.5mm厚。引线框架一般是采用真空夹盘和机械卡盘保持的。夹盘和卡盘必须改装,以便于适合于不同尺寸和形状的引线框架。本发明就是为了能够缓减这一问题。
现有技术还未能显示出任何引线框架可以承受在目前半导体封装工艺过程中所遇到的应力并且可以较低的成本方式来生产。本发明通过提供局部图形化引线框架达到了这一目的,这不仅改进了引线框架自身的可制造性,而且还改进了由此所形成的电子封装的整体性和可靠性。
发明内容
引线框架是由薄膜所制成,该薄膜具有顶部表面和底部表面。薄膜的第一区域是从顶部表面进行局部图形化,但没有整个贯穿薄膜到底部表面。薄膜的第二区域,不是从顶部表面进行图形化,它形成了用于支撑集成电路(IC)的芯片接受区域和用于提供与IC芯片电性能连接的多个引线触点。第一区域以薄膜的方式形成沟道并且创建一个网状结构,该结构可以互连着不是从顶部表面进行局部图形化的第二区域。本发明还提出了一种制造局部图形化引线框架的方法,以及提出了使用该引线框架所制成的电子封装的方法。由于具有类似网状或者网状的结构,本发明的引线框架已经改进了结构的刚性。
根据本发明能够,金属薄膜的顶部表面,由其可以形成引线框架,首先使用标准的照相平版印刷技术或者类似的技术进行图形化,以勾画出对应于芯片接受区域和引线的区域。在下一步中,在所勾画区域以外的薄膜第一区域中进行刻蚀,从薄膜的顶部表面局部贯穿下层薄膜的厚度,以便于在薄膜中创建引线框架的图形。在局部图形化之后,从顶部表面没有图形化的其余区域形成第二区域,该区域用于芯片接受区域和沿着顶部表面的引线,第一区域形成了一个比薄膜顶部表面低的下凹网状区域。第一区域的网状结构将引线部分相互连接着并连接着芯片接受区域。于是,局部图形化的薄膜看上去就像蜘蛛的脚并且保持着它的刚性和强度,使得它能够承受后续制造工艺步骤中的力。特别是,局部图形化引线框架可以忍受在引线键合和封装工艺过程中所遇到的力。在部分实施例中,芯片接受区域和电性能引线可以由第二区域的相同部分制成(例如,在电性能引线支撑集成电路以及提供对其电性能连接的情况下)。
本发明还提供了一种使用局部图形化引线框架来制成多个电子封装的独特方法。该方法包含具有顶部表面和底部表面的薄膜,在第一区域中,仅仅只是从顶部表面进行局部图形化,但是不是整体贯穿到底部表面。从顶部表面没有进行局部图形化的薄膜上所剩余的第二区域形成多个局部图形化的引线框架。各个引线框架具有一个用于支撑一个集成电路(IC)芯片的芯片接受区域以及用于提供与IC芯片电性能连接的多个电性能引线。
薄膜的第一区域形成网状结构,用于互连芯片接受区域和各个引线框架的电性能引线。第一区域也在薄膜的芯片间隔部分将多个引线框架相互连接。
也提供了多个芯片,各个芯片具有多个电性能端点,可用于粘结相对应的引线框架。各个芯片可以粘结着在相对应引线框架中的芯片接受区域并且在各个芯片的至少一个端点和引线框架的电性能引线之间形成电性能连接。此后,在引线框架和薄膜的芯片间隔部分上涂覆封装材料,以完全覆盖薄膜的上面。一旦封装材料干燥之后,就可以对第一区域中的薄膜底部表面进行背面图形化处理,以去除薄膜的网状结构和芯片间隔部分。随后,分割沉积在薄膜芯片间隔部分上的封装材料,以便于形成单独的封装。
在较佳实施例中,该方法包括采用方块/窗口图形以阵列方式在薄膜中形成引线框架,并且包含芯片尺寸封装的生产。
本发明的局部图形化引线框架具有一些优点。引线框架的平坦和固体未刻蚀的底部表面可以在引线键合工艺中作为优良的散热片使用。这就为更好和更一致的键合质量提供均匀的热传递。另外,固体结构提供一个连续的表面,以便于通用真空夹盘可保持引线框架,从而使得芯片粘结处理可以更加稳定并且使得后续工艺更加安全。消除了引线框架外围边缘难以卡住的问题,从而允许阵列引线框架的设计和处理不再需要任何转换。因为局部图形化引线框架的底部表面是平坦的连续表面,因此可以使用通用的真空夹盘来保持许多不同尺寸的框架。这就去除了在封装处理工艺中采用不同尺寸的引线框架时每次都需要改装真空夹盘的复杂性。同样,也就不再需要卡盘了。通用真空夹盘的使用以及消除卡盘,使得在第二区域上能够构成两行或者三行交错的引线,以适用于更高的引线数量。
本发明提出了一种局部图形化引线框架,它不仅可以实现引线键合芯片,而且还可以实现焊接凸缘式倒装芯片。另外,本发明教导了一种能够使用局部引线框架的方法,该方法适用于使用引线键合所制成的刻蚀引线框架封装(ELP),采用倒装芯片的ELP(ELPF),以及具有焊区网状阵列(LGA)焊盘以形成刻蚀的焊区网状阵列(ELGA)封装的ELP或ELPF,正如在本发明实施例中所进一步讨论的。
倒装芯片(FC)技术是一种多步骤的技术针对将芯片电性能端点自动连接至下一级封装,例如,陶瓷或者塑料基片,或者与基片后续相结合的芯片微载体。微载体,仅仅只比芯片本身稍大一些,现在称之为芯片尺寸封装(CSP)。FC技术是由卷带式自动键合(TAB)技术演变而成的,而卷带式自动键合技术起源于引线键合(WB)技术。于是,在WB和TAB中,芯片都是定位在它的背面表面上,电性能连接是连接着在它的顶部表面四周边缘上的端点。而在FC技术中,芯片的方向则是相反的。芯片是面向下放置,并且芯片的背面取向朝上。在发展高效热传递设计的过程中,这倒装的方向是极其有利的,这样可以集中电功能于芯片下面,而上侧可自由利用。
在FC工艺中,芯片的端点或者键合焊盘都可以在芯片表面上采用不同类型的凸缘来密封,其中,在区域阵列中可以形成图形,边缘图形或者其它图形。芯片可以采用下列方法粘结着下一级:a)粘结至引线框架的FC;b)层/基片的FC粘结称之为插入,适用于在引线框架上的连接空间中重新连接;c)粘结着引线框架上的预先粘结插入的FC;或者d)使用包括芯片回流方法的常规技术粘结着印刷电路板的FC。
使用常规技术的芯片粘结当应用至在制造QFN(四边形扁平无引线)封装或者其衍生产品(例如,VFQPF-N)时的QFN引线框架上就会变得十分困难。这是因为常规引线框架一般都缺乏结构上的刚性。引线框架中类似指状的部分可以十分精细,并且很难保持在一个精确的位置上。这就容易在装配工艺过程中引起操作上的缺陷、损坏和变形以及使得芯片键合状态复杂。PC结合工艺需要凸缘焊盘头与引线框架的悬浮和精细的引线端精确对准。此外,网状焊接端必须在经过焊接回流工艺的放置之后保持在它们各自的位置上。因此,必须对回流的参数进行优化,以便于补偿在芯片结合过程中的引线框架的颤动,如果不能进行适当的优化,则有可能产生较差的结合,并因此使得最终产品的质量和可靠性都较差。
通过在金属条上利用光刻胶进行图形化,并通过图形的刻蚀,形成从芯片接受区域向外延伸以类似指状引线方法来形成模板型的引线框架是常见的实现方法。也可以专门使用在指之间的“连接条”,以便于在各个工艺步骤中保持指相互分开,正如图3a和3b所示。本发明通过形成网状、局部图形化引线框架取代模板型的引线框架,缓减了引线框架缺乏结构刚性的问题。
根据本发明的方法,所有适用于形成半导体封装的主要工艺步骤都可以从将要形成引线框架的薄膜一侧开始。另一侧,即,下一侧,则可以保持表面上的平坦和不触接,例如,真空夹盘的表面。这包括封装和密封局部形成的封装前侧。一旦完成封装之后,底部表面进行背面刻蚀,以便于选择性地去除相互连接引线以及芯片接受区域的网状部分。在ELP的情况下,其中,芯片是背面键合至芯片接受区域上的芯片焊盘上的,并且采用引线键合的方式来形成与芯片端点的电性能连接,所有中间的网状部分都可通过刻蚀来切断,从而可以通过在芯片、引线以及引线键合触点面积的周围模压材料使得在引线键合端点单的芯片焊盘和引线触点相互隔离。然而,在ELPF封装的情况下,只有连接着引线的网状区域可以通过刻蚀切断,因为连接至芯片焊接头部凸缘引线本身提供对下一级封装的电性能连接。
通过锯断厚度或者芯片间隔部分,在网状部分中所嵌入金属的去除具有几项优点,包括消除通过引线框架结构所传播的锯力,以及防止金属-塑料界面上的分层。同样,采用背面刻蚀的电性能隔离可以在任何锯断或者分割之前,甚至于在任何其它处理工艺之前进行条的测试。在背面图形化之后,在底部表面上的剩余和外露的金属部分都可以采用浸锡或者非电解镀镍的方法很快形成任意数量的可焊接的材料。然而,ELGA封装使用ELPF封装的PC,具有用于连接下一级封装的LGA焊盘。
为了防止在制造过程中模压材料和封装的其它部件之间的任何分开,本发明还教授了如何在局部刻蚀引线框架的下凹网状部分的外露垂直壁上形成锁闭特征,例如,在引线的侧壁上,这一部分将与诸如树脂之类的模压材料相接触。另外,还教授了在芯片焊盘和引线触点的边缘上形成“唇缘”,以便于将模压材料俘获在各个唇缘下,从而使得模压材料难以与配合的表面相分开。
从上述描述中,显而易见的是,局部刻蚀引线框架提供了结构上的整体性以及附加的刚性和强度,能够较好承受在制造电子封装中所需经历的各种制造工艺的应力和张力。因为局部刻蚀引线框架所具有的这些独特机械特性还能够承受引线与封装的底部表面的超声波键合的严格限制,这些键合是用于连接下一级封装,这在传统的塑料封装中是不可能的。在本发明的另一实施例中,提供了形成具有超声波键合引线的电子封装的方法。形成局部刻蚀引线框架的模块,其中,引线框架包括网状部分并且由芯片间隔部分将其相互分开,它具有连续的底部表面。芯片粘结在引线框架上的芯片接受区域。在各芯片的端点和相对应引线框架的电性能引线部分之间形成电性能连接。引线采用超声波键合在引线框架的底部表面。引线框架通过在引线框架上,包括分开引线框架的芯片间隔部分,涂覆封装材料来封装引线框架。接着,进行底部表面的背面图形化,以便于去除网状部分和芯片间隔部分。随后,在芯片间隔部分上分割所封装的引线框架,从而形成在底部表面上具有超声波键合引线的各个独立的芯片尺寸封装。
附图的简要说明
图1a是根据现有技术具有引线和芯片焊盘区域的常规引线框架的示意图。
图1b是图1a所示根据现有技术的常规引线框架的示意图,它显示了芯片与芯片焊盘的粘结,以及引线从芯片的端点至引线的键合。
图2a是根据现有技术的引线键合和引线接近(具有引线)芯片尺寸封装(CSP)的剖面图,它显示了采用引线方式的连接至下级封装。
图2b是根据现有技术的引线键合和无引线接近(不具有引线)芯片尺寸封装(CSP)的剖面图,它显示了采用焊接凸缘或者焊球的方式与下一级封装连接。
图2c是根据现有技术的倒装芯片和引线接近CSP的剖面图,它显示了采用引线的方式与下一级封装连接。
图2d是根据现有技术的倒装芯片和无引线接近CSP的剖面图,它显示了采用焊球的方式与封装下层的连接。
图3a是根据现有技术的模板型的引线框架的俯视图,它显示了背面键合芯片与引线框架之间引线的引线键合连接。
图3b是根据现有技术的模板型的引线框架的俯视图,它显示了采用焊接回流工艺倒装芯片与引线框架的引线的连接。
图4是根据本发明的均匀厚度金属薄膜的剖面图,它采用可键合材料预先涂覆在两表面。
图5是图4所示的金属薄膜的剖面图,其中根据本发明仅仅只预涂覆在对应于两个芯片位置的顶部表面上予以图形化,这两个位置分别包括芯片焊盘和在芯片焊盘周围的引线触点。
图6是图4所示的电镀金属薄膜的剖面图,这是根据本发明已经进行了局部图形化的。
图6a是显示根据本发明的局部图形化引线框架阵列的俯视图。
图6b和6c显示了图6a所示阵列中的引线框架的逐渐放大俯视图。
图7a是图6所示的局部图形化金属薄膜的剖面图,其中根据本发明将芯片已经粘结着两个芯片位置中的各个芯片焊盘。
图7b是显示根据本发明在芯片和芯片焊盘之间的结合的放大示意图,它显示了粘结包括环氧或焊接。
图8是图7a或7b所示的芯片粘结金属薄膜的剖面图,其中根据本发明将各个芯片上的端点已经键合在引线框架的引线部分,形成在各个芯片位置上。
图9是图8所示的引线键合引线框架的剖面图,其中根据本发明,金属薄膜的顶部表面包括已经密封在封装中的芯片和引线键合。
图10是图9所示的密封封装的剖面图,其中根据本发明,该密封封装是从背面进行刻蚀,以便于去除在薄膜中的各个引线框架的第一区域和芯片间隔区域。
图11是显示两个接近芯片尺寸局部图形化封装的剖面图,其中根据本发明,封装已经在芯片间隔部分进行分割且形成两个单独的封装。
图12a是图11所示的分割后的封装之一的俯视图,其中根据本发明,显示了芯片、触点、芯片端点与引线触点相连接的引线,以及采用引线键合的一个触点的放大剖面图。
图12b是显示芯片焊盘和一个触点之间区域的剖面图,其中根据本发明,显示了在与模压材料相接触的垂直表面上使用“唇缘”,以便于提供锚定和防止分层。
图12c是显示芯片焊盘和一个触点之间区域的剖面图,其中根据本发明,显示了在与模压材料相接触的垂直表面上使用不同形状的腔体,以便于提供锚定和防止分层。
图13a-13f是各种腔体的示意图,根据本发明,它可以用于为图12b和12c所示垂直表面上的模压材料提供锚定部件。
图14是根据本发明制成局部图形化封装的各种工艺步骤的流程示意图。
图15a是显示根据本发明的具有外围I/O配置的封装的俯视、侧视和底视图。
图15b是显示根据本发明的具有I/O焊盘阵列配置的封装的俯视、侧视和底视图。
图16是图4所示金属薄膜的剖面图,其中根据本发明仅仅只预涂覆在对应于两个倒装芯片位置已经进行图形化的顶部表面上,这两个位置分别包括芯片接受区域和在各个芯片接受区域周围的引线。
图17是图16所示电镀金属薄膜的剖面图,这是根据本发明已经进行了局部图形化且形成类似网状的引线框架(即,网状结构)。
图18是显示芯片结合引线框架(FCL)的剖面图,根据本发明,它显示了倒装芯片(FC)结合。
图19是图18所示的FCL剖面图,其中根据本发明,金属薄膜的顶部表面包括芯片且已经密封在一个封装中。
图20是图19所示的密封封装的剖面图,其中根据本发明,已经从背面进行刻蚀以便于选择性地去除在各个引线之间和在各个下凹的芯片接受区域之间的网状部分。
图21是显示两个接近芯片尺寸局部图形化封装的剖面图,根据本发明,它已经由图20所示的封装分割而成。
图22a是图21所示的分割后封装的俯视图,根据本发明,它显示了芯片以及将芯片端点与引线的端点部分相连接的引线,该引线端点部分还连接着下一级封装。
图22b是显示在倒装芯片和下一层封装连接之间区域的放大剖面图,根据本发明,它显示了引线的两个端点连接。
图23是根据本发明形成支撑倒装芯片的局部图形化封装的各种工艺步骤的流程图。
图24a和24b显示了两个接近芯片尺寸局部图形化封装的剖面图和底视图,其中根据本发明,该封装已经被分割,并随后提供了适用于连接封装下一层以形成ELGA类型封装的球栅阵列连接。
图25a和25b显示了本发明另一实施例,其中,图24a和24b所示的封装是根据本发明分别采用铝引线或者采用铜引线球键合技术进行超声波键合的。
具体实施方法
图4-15b和16-24b显示了形成局部图形化引线框架的不同实施例,该局部图形化引线框架可以具有比接近芯片尺寸封装(CSP)更多的引线数。本发明的方法改进了生产线的自动化以及由此所制造的封装的质量和可靠性。这是通过执行制造工艺步骤中的大多数步骤之后,然后再局部图形化金属薄膜的一侧面形成网状引线框架来完成的。与常规穿透的模板型的引线框架相比较,本发明所使用的引线框架是在其一侧面进行局部图形化,而在另一侧面是实体和平坦的。这种结构改进了机械和热性能,从而可以在芯片的粘结、引线的键合、以及封装的过程中可在没有扭曲或变形的情况下进行。在完成芯片粘结和引线键合工艺步骤以及芯片和引线键合都粘结在一起并且密封封装在模压材料中之后,刻蚀底部表面使之完全穿过薄膜,以便于使得引线触点与芯片焊盘以及自身相互之间隔离。因此,最终所形成的密封封装可以在不需要切割到其它附加金属的条件下进行分割。
具体地说,图4-15b显示了形成适用于引线键合芯片的局部图形化引线框架以及使用该框架来形成ELP类型电子封装的方法。另一方面,图16-22显示了形成适用于倒装芯片的局部图形化引线框架以及使用该框架来形成ELP类型电子封装的方法。还结合图24a和24b讨论了使用速成的局部图形化引线框架来形成ELGA类型电子封装的方法。
图4是薄膜的剖面图,较佳的是一片金属薄片,更佳的是采用铜的薄片,它不仅可以用于形成引线框架,而且还在确保形成引线框架的工艺步骤中可作为稳定的载体来使用。金属条的厚度等于或者大于大约0.05mm。在另一实施例中,该厚度可以在大约0.05mm至0.5mm的范围内。
形成引线框架一般包括刻穿金属条,类似切割模板,并随后采用非常精细的指状引线工作。为了能够将这类精密的结构保持到位,一般可以使用真空夹盘。然而,常规的真空夹盘一般都难以对这类精细的器件提供吸力。并且通常都必须卡住引线框架的边缘。当由一种类型和尺寸的引线框架变化成另一种时,任何一种适用于这一目的的设备都必须进行重新改装。但是,本发明可以缓减这种重新改装的步骤。因为局部图形化引线框架的底部表面是实体的并且是连续的,所以在处理过程中,常规真空夹盘可以方便地将引线框架保持到位。此外,在引线框架的制造过程中,可以通用一种尺寸的金属条,但该金属条能够容纳各种的工业引线框架。芯片粘结和引线健合的后续加工工艺步骤可以对所要形成的引线框架只有很少应力和张力的方法来完成。因为引线是采用类似网状结构保持在一起并且在最后的步骤之前是不会相互分开的,所以就可以很容易地制造出具有十分精细几何尺寸的引线框架。
可以采用多种方法来完成在引线框架上制成各种图形。一种方法可以是将图形压印/铸造在金属中。另一种方法可以包括化学或者电化学刻蚀和电学放电加工(EDM)。另一方面,较佳的是,采用在半导体制造工艺中常用的照相平版印刷图形化技术。在本发明中,图4所示的金属条(100)是在照相平版印刷图形化之前预先电镀在前(或顶部)侧和背(或者底部)侧的两面。前表面和背表面中的一个或者两个表面都可以采用能够分别键合以及可焊接的材料进行预先电镀。在一个实施例中,前表面采用可键合的材料进行预先电镀,例如,Ni/Pd/Au-渗透或Ag。在另一实施例中,背表面采用可焊接的材料进行预先电镀,例如,Sn/Pb、无铅焊料、浸锡无电解镍或者Au-渗透。该预先电镀也可以根据需要在后续的步骤中进行。
在接下去的步骤中,经过预先电镀的前面(110)进行照相平版印刷图形化,以便于形成对应于芯片焊盘(115)的区域以及环绕着芯片焊盘区域的电性能触点(113)。电性能触点(113)可以具有引线端点部分的特征该部分通过形成类似网状结构的中间下凹部分的第一区域连接至芯片焊盘区域(115)。在最后从背表面刻蚀金属薄膜(100)时,可以取出这些中间的下凹类似网状部分,以便于端点部分和芯片焊盘部分能够相互隔离。包含芯片焊盘(115)和环绕着触点(113)的区域有时可称之为芯片位置。在链动至一个滚筒上的连续的铜薄片卷上可以形成多个芯片位置,从而可以方便地自动形成由一个或多个芯片所组成的引线框架。图5图示说明了两个芯片位置,这可以形成了两个相应的引线框架,并以此可由该引线框架形成两个封装部分。
适用于图5所说明的两个芯片位置的所示的图形可随后通过刻蚀传递至薄膜条(100)。正如图6所示,本发明的主要特征在于刻蚀仅仅只是部分刻穿金属的厚度,因此本文称之为局部图形化。该局部图形化可以在薄膜的第一区域中进行,以便于形成连接着各个引线框架的引线触点(113)的芯片焊盘(115)的网状结构(130)。第一区域也可以在薄膜芯片间隔部分(136)中相互连接着引线框架。
正如图6a-6c所示,一个阵列或者这类引线框架(例如,16×16)可以采用方块/窗口薄膜(138)来形成。图6b和6c显示了包括网状结构(139)的第一区域,其中,该网状结构连接着芯片焊盘和各个引线框架的引线触点。第一区域也在薄膜的芯片间隔部分(136)中相互连接着多个引线框架。
在一个实施例中,局部图形化可以从薄膜厚度的25%变化到90%。然而,事实上,局部图形化可以是薄膜厚度的任意百分比,并且局部刻蚀的量可以根据影响制造参数的各种因素来确定,这些因素包括柔性、刚性以及热厚度(或者热传导)。引线触点区域(113)和芯片焊盘区域(115)的横向尺寸可以基于所给定芯片尺寸和引线键合或者其它可以用于在给定封装或者在下一级封装中的两个封装之间的中间层或者中间层连接的连接媒介所需的小型化程度来确定。特别值得注意的是,现在,关注引线框架的精细特征和尺寸稳定性的可制造性由于类似指状引线的类似网状结构而变得意义不再十分重要了。
正如图7a所示,芯片(140)接着最好是采用环氧(150)粘结在芯片焊盘区域。图7b是根据本发明在芯片和芯片焊盘之间结合的放大示意图,它显示了包括环氧或者焊接的粘结。环氧(150)可以采用导电粒子来填充,以增强芯片的冷却。在另一实施例,焊接膏(150’)来替代环氧(150),也可以用于在芯片和芯片焊盘之间提供较强的键合,并且对周围环境提供更加有效的冷却路径。固化环氧,并且正如图8所示,在芯片粘结之后,可以使用众所周知的引线键合技术,将引线(160)键合在端点(145)上和相对应的引线触点(113)上,正如图8所示。因为根据本发明所制成的引线框架具有实体、连续的背面表面,它可以进行牢固的安置并且可以采用诸如真空夹盘(未显示)来保持在平坦的表面上,所以引线的类似网状结构在引线键合的过程中就不会摆动或弹跳。这就能够产生良好的键合,从而可以改进终端产品的可靠性。
在图9中,在将芯片和对应的触点相连接之后,在金属薄膜的前表面一侧上的所有元件都可以随后密封在模制材料中,例如,树脂封装(170)可形成在薄膜和所有暴露的表面上,包括引线框架和它们所相关联的引线(160),芯片(140)和触点(113)以及网状结构(130)和芯片间隔部分(136)。在对最终的模制封装进行脱模时,就可以为下一步处理提供有效的清洁背面。可以采用这一讨论的方法来消除对封装底部轨迹的模制溢出的最常见问题。
正如图10所示,现在,对引线触点(113)和芯片焊盘(115)两者可以实现相互隔离,以通过封装背面一侧刻蚀第一区域的网状结构来形成它们各自的岛。这时,也可以背面刻蚀芯片间隔部分(136)。背面刻蚀持续,直至达到模制材料。适用于背面刻蚀金属的刻蚀方法应该与前面所使用的方法相同。然而,适用于背面刻蚀的刻蚀时间可以不同于适用于前面刻蚀所使用的刻蚀时间,这取决于从前面进行刻蚀的局部刻蚀的程度。于是,初始形成局部刻蚀引线框架可以由用户来进行裁剪,以适用于最终封装的自动化、质量、可靠性和功能的制造需要。
在最后的步骤中,在引线框架之间的芯片间隔部分(136)上的密封材料(170)中进行分割,以形成两个独立的封装,正如图11所示。这一步骤可以采用多种方法来完成,包括锯子切割、水喷射切割、激光切割或上述方法组合,或者其它特别适用于切割塑料的技术。换句话说,没有很多金属需要割穿,并因此就不存在着变形和其它与组合切割塑料和金属相关联的问题。与常规的封装相比较,其中,在芯片间隔部分之间的桥接金属必须与封装分割同时进行切割。有许多次,当同时切割金属和塑料时,部分金属芯片就会短路和短接,从而对锯片引起不需要和不期望的磨损。正如图6a所示,这一方法也可以应用于从一个引线框架阵列中产生大量的封装。
图12a显示了分割后的ELP的俯视图,其中,所示的触点(120)和芯片(140)在它们各自岛中是相互隔离的,但只可以通过已经引线键合的引线(160)相互连接。图12b显示了封装一角的放大视图,这是在芯片和一个触点之间的封装,其中触点可以包括原始的金属带(100),形成可键合层(113)的预先电镀的顶部表面,以及形成可焊接层(123)的预先电镀的底部表面的部分。在图12b中,所显示的“唇缘”是在触点和芯片的角上。
现在,在封装底部上所预先电镀的表面(120)可以适用于几个目的。首先,直接外部达到芯片焊盘(140)的背部可以提供冷却用的附加热路径。其次,在接近芯片尺寸封装(CSP)的轨迹中的触点(123)使得它有可能紧密地安装在下一级封装上所分开的封装上,并因此可增强同一区域的性能。
本发明的另一方面提供了适用于减少在模制材料和它所应该粘结的表面之间的变形的可能性。这是通过一半刻蚀环绕着芯片焊盘和触点区域的边缘以形成凸耳或者“唇缘”来完成的,例如,图12b中的标号(105)所表示的。也有可能形成图12c所示的不规则形状的腔体(107),来增强与模制材料相接触表面的互锁机制。图13a-13f还显示了各种其它腔体的放大视图,以及形成这些表面增强可以迅速与从前面一侧进行局部刻蚀相结合。这样就不再需要从背面一侧进行刻蚀,因为模制材料仅仅只密封从前面一侧局部形成的表面。
图14概述了本发明的方法,该方法从前面一侧局部刻蚀引线框架(200)成为金属条开始,并且以在同一金属条上进行背面图形刻蚀(250)为结束,从而采用该方法形成所需要的芯片焊盘和四周的触点。芯片粘结(210)、环氧固化(220)、引线键合(230),以及密封(240)的中间步骤都可以在机械和热稳定的引线框架上完成,因为引线依然是通过在金属薄膜中局部刻蚀而成的类似网状或网状结构上的中间下凹部分地第一区域相互连接的。值得注意的是,很重要的是只能在封装的所有部件都已经在密封中固化之后,通过背面图形化刻蚀(250)去除中间下凹部分的第一区域,并且使得四周的触点和芯片焊盘相互分开,以便于形成适当的隔离。因此,就不再需要在分割成单个接近芯片尺寸封装(260)的过程中切割任何金属。
本发明的方法可以用于形成各种类型的封装,例如,适用于电子封装的阵列类型的引线框架。图15b显示了阵列类型的封装(400)的俯视图,而图15a则显示了标准的边缘类型的封装(300)。在标号(305)表示芯片端点的边缘结构的同时,标号(405)则表示端点的阵列类型结构,这可以构成直线结构或者交错结构。这两种封装可以使用所披露的局部图形化发明来制成,并可采用标号(310)和(410)来表示。在阵列类型ELP中,显示了内部引线(440)和外部引线(445)。两种封装都可以采用模制材料(320)和(420)来密封。使触点和芯片相隔离的背面图形化刻蚀可由(330)和(430)来表示。标号(450)表示接地环的特征,它可以刻蚀到成模材料的同一层。标号(460)表示了在ELP的底视图上的阵列类型输入/输出的结构。
附图16和24b所示的第二实施例披露了形成局部图形化VFQFP-N类型的引线框架的方法,该方法特别适用于大批量生产FC电子封装。因此,与倒装芯片相兼容的引线框架可以称之为FCL,以示区别于传统的引线框架。这是因为,不同于传统引线框架,FCL是刚性的并且更加适用于自动生产流水线,正如以下所描述的。
FCL也具有类似网状的结构,这不同于常用的多用途的贯穿的模板类型的引线框架。类似网状FCL的前面一侧具有下凹的部分,并包括局部图形化的引线,而背面一侧是实体和平坦的,这就提供机械上的刚性,从而在制造加工处理过程中可以在没有扭曲或变形的情况下进行。在完成芯片粘结以及封装的密封之后,刻蚀背面一侧,以便于引线触点的相互隔离。因此,最后所密封的封装可以在不一定要割断任何附加金属的条件下进行分割。于是,可以意识到的是,具有精细几何结构的FCL,例如,VFQFP-N封装,都可以很方便地制造,因为引线是都由类似网状或者网状结构保持在一起的,并且只到最后的分割步骤之前是没有完全相互分开。
类似于第一实施例所已经披露的局部图形化引线框架,第二实施例的FCL也是有一片金属所制成的,较佳的是由铜薄膜所制成的,正如图4所示,其中,薄膜的前表面和背表面都是预先电镀的,或者正如以上所阐述的,该电镀也可以推迟到后续步骤中。(值得注意的是,当两个实施例的工艺处理步骤都相似时,只要适合所采用的标号都可以保持相同的标号,除非第二实施例在初期所表示的标号。相同的标号(100)继续保持两个实施例中所使用的金属薄膜的一致性。随后,预先电镀的前面一侧(110’)进行照相平版印刷的图形化,以便于形成芯片接受区域(115’)、环绕着芯片接受区域的引线部分(113’),以及其它中间区域(117’)。在以下所披露的后续处理步骤中,引线的一端端部将连接着PC的端点,而另一端部可以连接着下一层封装。包含芯片接受区域和环绕的引线的区域有时称之为芯片位置,类似采用引线键合芯片的芯片位置。在链动至一个滚轮上的连续铜薄片卷上可以形成包括多个芯片位置的多个引线框架,从而可以方便地自动形成由一个或多个芯片所组成的引线框架。图16图示说明了两个芯片位置,这可以形成两个相应的引线框架,并依次可由两个引线框架形成的两个封装部分。
适用于图16所说明的两个芯片位置的所示的图形可随后通过局部图形化贯穿刻蚀传递至金属薄膜(100)。如图17所示的局部图形化可以达一半、四分之一,或者对于某些情况可以是金属条厚度的任何比率,并且局部刻蚀的量可以根据影响制造参数的各种因素来确定,这些因素包括柔性、刚性以及热厚度(或者热传导)。引线触点区域(113’)和芯片焊盘区域(115’)的横向尺寸可以基于包括芯片尺寸和在给定封装或者在下一级封装中的两个封装之间作为中间层或者中间层连接的引线的给定封装位置所需的小型化确定。特别值得注意的是,现在,关注引线框架的精细特征和尺寸稳定性的可制造性由于具有类似指状引线的类似网状结构而变得意义不再十分重要了。
倒装芯片(FC)(130’)可以随后倒装在上面,使得在芯片前面一侧的端点(135’)可以驻留在引线的一端部,正如图18所示。在后一步骤中,引线的另一端部可以形成适用于连接封装下一层(例如,卡或者板)的电性能触点。然而,首先,在类似图18所示的网状引线框架结构上的芯片配件可以通过芯片连结炉送出,正如在现有技术中所实现的那样。回流焊球,使得回流受限于BLM,从而形成可焊接的立柱。由于根据本发明所制成的引线框架具有实体的连续的背面一侧且它可牢固地设置和保持在平坦的表面上,所以引线的类似网状结构就不会在芯片连结炉中摆动或弹跳,从而产生优良的芯片结合。因此,所披露的方法可以改进最终产品的可靠性,也就是,可以改进VFQFP-N类型封装的可靠性。
在芯片结合之后,芯片,沿着在原始金属薄膜的前面一侧上所局部图形化的引线,采用模制材料,例如,采用树脂材料进行密封性密封,正如图19所示。密封(140’)可以形成在所有暴露的表面四周,包括引线(113’)、焊球(135’)的周围、芯片下面、沿着芯片接受区域(115’)的垂直壁的区域,以及除了能够牢固保持在平坦表面上的金属条(100)所未刻蚀、实体和平坦的背面一侧之外的下凹区域(117’)的垂直壁的区域。在最终模制的封装脱模时,就可以为下一步处理提供有效的清洁背面。在该实施例中,也可以消除对封装底部轨迹的模制溢出的最常见问题。
现在,通过对封装背面一侧的图形化且与在工艺开始时从前面一侧进行局部刻蚀的图形相对准就可以使得引线(113’)相互隔离。背面刻蚀持续,直至达到模制材料。正如图20所示,去除引线框架的类似网状部分,也就是区域(111’)和区域(119’),使得芯片区域(115’)可以相互断开,以及引线(113’)相互断开。较佳的是,适用于背面图形化金属的刻蚀处方是与从前面一侧进行局部刻蚀所使用的处方是完全相同的。然而,从背面一侧所进行刻蚀的时间可以不同于适用于前面一侧刻蚀所使用的刻蚀时间,这取决于从前面进行的局部刻蚀的程度。于是,初步形成局部刻蚀引线框架可以由用户来进行裁剪,以适用于最终封装的自动化、质量、可靠性和功能的制造需要。
在最后的步骤中,接着分割图20所示的封装,它具有两个使用本发明所说明目的的两个密封芯片位置,将其分成单个接近于芯片尺寸封装(CSP),这是VFQFP-N类型封装中常见的,正如图21所示。图22a显示了分割后的局部图形化引线框架封装的俯视图,其中所示的引线(113’)是相互隔离的并且连接着在芯片(130’)下面的焊球(135’)。图22b显示了在芯片和连接着一个外部触点(145’)的一个引线之间的封装一角的放大视图,其中外部触点设置在卡或板(150’)上。预先电镀的表面(120’)已经制备好,用于结合下一级的触点,正如在同一附图中所显示的。同样,引线(113’)的下面暴露于外部环境,从而改善冷却。
之前所披露的相同技术可以用于防止密封材料与FCL表面的分层,也就是说,通过在网状引线框架的下凹区域(115’)和(117’)的垂直壁上合并图13a-13f所示的不规则形状的腔体。这些表面增强的形成可以迅速合并从前面一侧所进行的局部刻蚀。这就不再需要从背面一侧所进行的刻蚀,因为模制材料仅仅只密封从前面一侧所局部形成的表面。
图23概述了本实施例的方法,该方法从前面一侧引线框架(200’)局部图形化成为金属条开始,并且以在同一金属条上进行背面图形图形化(240’)为结束,从而采用该方法形成所需要的芯片接受区域和四周的引线。FC设置(210’)、FC芯片结合(220’),以及密封(230’)的中间步骤都可以在机械和热稳定的FCL上完成,因为引线依然是通过在金属薄膜中局部刻蚀而成的类似网状或网状结构相互连接的。值得注意的是,很重要的是只能在封装的所有部件都已经在密封中牢固之后,可以通过背面图形化刻蚀(240’)选择性地去除引线的网状部分,并且引线可以相互分开一提供适当的隔离。因此,就不再需要在分割成单个接近芯片尺寸封装(260)的过程中切割任何金属。
本发明的方法可以用于形成很多种封装,例如,阵列类型的局部图形化引线框架,其中可焊接凸缘的区域阵列可以是能够同时结合于具有芯片倒装的引线框架上的芯片,该方法类似于本文所讨论的具有四周可焊接凸缘的方法。同样,局部图形化的引线框架的阵列也可以同时形成,并因此也同时形成FC结合,随之通过将阵列分割成多个单独的VFQFP-N类型封装。同样,各个最终的CSP可随后具有可焊接的凸缘、焊盘或者其它在封装之下的电性能连接,可用于与封装的下层相结合以形成具有球栅阵列的刻蚀引线框架封装或ELGA类,正如图24a和24b所示。在图24a中,显示了剖面图,其中芯片焊盘(135’)可形成在引线(145’)上。在背面图形化之后,引线(145’)是相互间电性能隔离的,以便于结合下一级封装。引线(145’)所暴露的底部表面可以通过浸锡或者无电解镍电镀与任何数量的可焊接材料闪速结束。ELGA封装的底部表面(111’)如图24b所示,具有适用于电性能连接(145’)的阵列图形。
因为形成ELP、ELPF或者ELGA封装中的任何一种封装的局部刻蚀方法在各种制造步骤中都具有良好的稳健性,所以其它形成电子封装的方法也都是可能的。一种这类方法包括本发明的引线框架封装与下一级封装引线键合。超声波键合技术不能适用于常规的引线框架,因为引线本身的脆弱,除非将它们粘结在可提供稳定性和强度的实体基础上。相反,通过依靠它们的网状结构,局部刻蚀引线框架是稳定的。局部图形化引线框架的未刻蚀和预先电镀的底部表面(120’)提供了实体键合区域,或者立柱,以便于有效地应用超声波能量,使得铝引线楔入键合在ELP或ELPF的块或者条上。因此,根据本发明的另一方面,铝引线(121)可超声波粘结在局部刻蚀引线框架的模块或条的底部表面上,正如图25a所示。引线直径范围在大约0.001英寸至0.020英寸之间,后者尺寸则表示取代引线的带子。随后,可以密封该条,背面图形化和分割,以形成各个接近的CPS。超声波键合是理想的,因为它可以避免暴露由于球栅阵列类型封装所经历的球键合温度,并因此改善其可靠性。铜引线球键合也可以应用,正如图25b所示。应该理解的是,图25a和25b所示的CSP可以是ELP和ELPF中的任何一种。
在电子封装制造过程中,本发明还具有许多其它优点。例如,在背面刻蚀之后以及在进行分割之前,封装块可固有地准备条测试,而在该块上仍可以设置多个封装。这与将封装只作为单个单位处理相比较就提供了鲜明的优点。在该块上设置封装的同时进行条测试封装可改善测试的可靠性。
本发明也使得制造商能够生产具有双排或者三排交错引线的封装,它使得给定封装的I/O功能成倍。引线框架的平坦连续的底部表面使得通用配件装备的使用更加方便不再需要对每次应用重新改装,并且对自动化具有更多的灵活性。例如,在2×2至12×12的封装块之间的处理就不再需要任何机械上的变化。另外,本发明更加便于具有各个脚“远离”的封装结构(例如,在脚表面上各模制主体底部之间为2密尔)。该远离的结构可以在芯片封装与下一级封装(例如,板)连接时提供其它优点。
在本发明参考特定实施例进行特定显示和讨论的同时,本领域熟练的技术人士都会理解到,可以在不背离本发明的精神和范围的条件下对形式和细节上作出各种不同的改变。

Claims (13)

1.一种形成具有超声波键合引线的电子封装的方法,其特征在于,该方法包括步骤:
形成局部刻蚀引线框架块,其中所述引线框架包括网状部分并采用芯片间隔部分相互分开,且具有底部表面;
将芯片粘结在对应引线框架上的芯片接受区域中;
在各个芯片的端点和对应引线框架的电引线部分之间形成电连接;
将引线超声波键合在所述引线框架的底部表面上;
通过在所述引线框架以及分开所述引线框架的芯片间隔部分上施加密封材料,以密封所述引线框架;
背面图形化所述底部表面以去除网状部分和芯片间隔部分;和,
分割在芯片间隔部分上所设置的密封材料,以在其底部表面上形成各个具有引线的芯片尺寸封装。
2.如权利要求1所述方法,其特征在于,所述引线框架包括铜或铜合金的薄膜。
3.如权利要求1所述方法,其特征在于,所述引线框架是采用压印或者铸造法来制成的。
4.如权利要求2所述方法,其特征在于,所述铜的薄膜具有大于或等于大约0.05mm的厚度。
5.如权利要求1所述方法,其特征在于,所述芯片包括半导体器件。
6.如权利要求1所述方法,其特征在于,所述粘结芯片是通过使用环氧树脂将芯片背面键合在接受区域来完成的。
7.如权利要求1所述方法,其特征在于,所述粘结芯片是通过使用焊膏将芯片背面键合在接受区域来完成的。
8.如权利要求1所述方法,其特征在于,所述形成电性能连接是采用引线键合技术来完成的。
9.如权利要求1所述方法,其特征在于,所述形成电性能连接是通过将所述芯片的端点与延伸至所述芯片区域的电性能引线的端部相连接来完成的。
10.如权利要求1所述方法,其特征在于,所述超声波键合引线包括铝引线。
11.如权利要求1所述方法,其特征在于,所述密封材料是树脂。
12.如权利要求1所述方法,其特征在于,所述背面图形化是通过刻蚀来完成的。
13.如权利要求1所述方法,其特征在于,所述分割(成单个)是通过对密封材料切片来完成的。
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JP2006516812A (ja) 2006-07-06
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CN100385641C (zh) 2008-04-30
US6777265B2 (en) 2004-08-17

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