CN1521826A - 双槽隔离的交叉存储器阵列及其制造方法 - Google Patents
双槽隔离的交叉存储器阵列及其制造方法 Download PDFInfo
- Publication number
- CN1521826A CN1521826A CNA2004100024303A CN200410002430A CN1521826A CN 1521826 A CN1521826 A CN 1521826A CN A2004100024303 A CNA2004100024303 A CN A2004100024303A CN 200410002430 A CN200410002430 A CN 200410002430A CN 1521826 A CN1521826 A CN 1521826A
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- 238000000034 method Methods 0.000 title claims abstract description 59
- 239000000463 material Substances 0.000 claims abstract description 57
- 238000002955 isolation Methods 0.000 claims abstract description 50
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 37
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 37
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 22
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 19
- 239000010703 silicon Substances 0.000 claims abstract description 19
- 229910052751 metal Inorganic materials 0.000 claims abstract description 13
- 239000002184 metal Substances 0.000 claims abstract description 13
- 238000005530 etching Methods 0.000 claims description 28
- 239000012212 insulator Substances 0.000 claims description 16
- 230000015572 biosynthetic process Effects 0.000 claims description 13
- 230000004888 barrier function Effects 0.000 claims description 11
- 230000008021 deposition Effects 0.000 claims description 9
- 229910010413 TiO 2 Inorganic materials 0.000 claims description 7
- 238000011049 filling Methods 0.000 claims description 5
- 238000005498 polishing Methods 0.000 claims description 5
- 238000003780 insertion Methods 0.000 claims description 4
- 230000037431 insertion Effects 0.000 claims description 4
- 239000002887 superconductor Substances 0.000 claims description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 3
- 229910052796 boron Inorganic materials 0.000 claims description 3
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 238000002161 passivation Methods 0.000 claims description 3
- 229910052698 phosphorus Inorganic materials 0.000 claims description 3
- 239000011574 phosphorus Substances 0.000 claims description 3
- 229910052785 arsenic Inorganic materials 0.000 claims description 2
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims description 2
- 239000000758 substrate Substances 0.000 abstract description 4
- 238000000151 deposition Methods 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 6
- 229920002120 photoresistant polymer Polymers 0.000 description 5
- 239000000203 mixture Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 230000002349 favourable effect Effects 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/101—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including resistors or capacitors only
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/30—Resistive cell, memory material aspects
- G11C2213/31—Material having complex metal oxide, e.g. perovskite structure
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/70—Resistive array aspects
- G11C2213/77—Array wherein the memory element being directly connected to the bit lines and word lines without any access device being used
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
- Mram Or Spin Memory Techniques (AREA)
- Hall/Mr Elements (AREA)
- Element Separation (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (29)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/350,643 | 2003-01-23 | ||
US10/350,643 US6875651B2 (en) | 2003-01-23 | 2003-01-23 | Dual-trench isolated crosspoint memory array and method for fabricating same |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1521826A true CN1521826A (zh) | 2004-08-18 |
CN1303665C CN1303665C (zh) | 2007-03-07 |
Family
ID=32594948
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2004100024303A Expired - Lifetime CN1303665C (zh) | 2003-01-23 | 2004-01-29 | 双槽隔离的交叉存储器阵列及其制造方法 |
Country Status (7)
Country | Link |
---|---|
US (2) | US6875651B2 (zh) |
EP (1) | EP1441391B1 (zh) |
JP (1) | JP4651075B2 (zh) |
KR (1) | KR100580901B1 (zh) |
CN (1) | CN1303665C (zh) |
DE (1) | DE60324888D1 (zh) |
TW (1) | TWI239591B (zh) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101345251B (zh) * | 2007-07-13 | 2011-09-28 | 旺宏电子股份有限公司 | 位于半导体衬底之上的存储单元阵列及其制造方法 |
CN102254854A (zh) * | 2011-08-01 | 2011-11-23 | 上海宏力半导体制造有限公司 | 双沟槽隔离结构的形成方法 |
CN102280404A (zh) * | 2011-08-01 | 2011-12-14 | 上海宏力半导体制造有限公司 | 双沟槽隔离结构的形成方法 |
CN101221970B (zh) * | 2006-12-26 | 2012-10-24 | 三星电子株式会社 | 具有在相邻单元之间共用的相变材料图案的相变存储器件和包括该相变存储器的电子产品 |
Families Citing this family (41)
Publication number | Priority date | Publication date | Assignee | Title |
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US6962648B2 (en) * | 2003-09-15 | 2005-11-08 | Global Silicon Net Corp. | Back-biased face target sputtering |
JP2006049772A (ja) * | 2004-08-09 | 2006-02-16 | Nec Electronics Corp | 半導体記憶装置及びその製造方法 |
KR101031398B1 (ko) * | 2004-08-27 | 2011-04-25 | 주식회사 하이닉스반도체 | 반도체 소자 및 그 소자의 형성 방법 |
US7425504B2 (en) * | 2004-10-15 | 2008-09-16 | 4D-S Pty Ltd. | Systems and methods for plasma etching |
US20060081467A1 (en) * | 2004-10-15 | 2006-04-20 | Makoto Nagashima | Systems and methods for magnetron deposition |
US20060081466A1 (en) * | 2004-10-15 | 2006-04-20 | Makoto Nagashima | High uniformity 1-D multiple magnet magnetron source |
KR100593750B1 (ko) * | 2004-11-10 | 2006-06-28 | 삼성전자주식회사 | 이성분계 금속 산화막을 데이터 저장 물질막으로 채택하는교차점 비휘발성 기억소자 및 그 제조방법 |
JP4880894B2 (ja) * | 2004-11-17 | 2012-02-22 | シャープ株式会社 | 半導体記憶装置の構造及びその製造方法 |
US20130082232A1 (en) | 2011-09-30 | 2013-04-04 | Unity Semiconductor Corporation | Multi Layered Conductive Metal Oxide Structures And Methods For Facilitating Enhanced Performance Characteristics Of Two Terminal Memory Cells |
US20070084717A1 (en) * | 2005-10-16 | 2007-04-19 | Makoto Nagashima | Back-biased face target sputtering based high density non-volatile caching data storage |
US20070084716A1 (en) * | 2005-10-16 | 2007-04-19 | Makoto Nagashima | Back-biased face target sputtering based high density non-volatile data storage |
KR100723419B1 (ko) * | 2006-02-17 | 2007-05-30 | 삼성전자주식회사 | 불휘발성 메모리소자 및 그 동작방법 |
US8395199B2 (en) | 2006-03-25 | 2013-03-12 | 4D-S Pty Ltd. | Systems and methods for fabricating self-aligned memory cell |
KR100785509B1 (ko) * | 2006-06-19 | 2007-12-13 | 한양대학교 산학협력단 | ReRAM 소자 및 그 제조 방법 |
US8454810B2 (en) | 2006-07-14 | 2013-06-04 | 4D-S Pty Ltd. | Dual hexagonal shaped plasma source |
US7932548B2 (en) | 2006-07-14 | 2011-04-26 | 4D-S Pty Ltd. | Systems and methods for fabricating self-aligned memory cell |
US20080011603A1 (en) * | 2006-07-14 | 2008-01-17 | Makoto Nagashima | Ultra high vacuum deposition of PCMO material |
TWI299162B (en) * | 2006-07-18 | 2008-07-21 | Ind Tech Res Inst | Sensing memory device |
TWI328871B (en) * | 2006-09-04 | 2010-08-11 | Ind Tech Res Inst | Resistance type memory device |
US8308915B2 (en) | 2006-09-14 | 2012-11-13 | 4D-S Pty Ltd. | Systems and methods for magnetron deposition |
KR100780964B1 (ko) * | 2006-11-13 | 2007-12-03 | 삼성전자주식회사 | 셀 다이오드를 구비하는 상변화 메모리 소자 및 그의제조방법 |
WO2008062734A1 (en) * | 2006-11-20 | 2008-05-29 | Panasonic Corporation | Nonvolatile storage element, nonvolatile storage element array and its fabrication process |
US7704849B2 (en) * | 2007-12-03 | 2010-04-27 | Micron Technology, Inc. | Methods of forming trench isolation in silicon of a semiconductor substrate by plasma |
US8154005B2 (en) * | 2008-06-13 | 2012-04-10 | Sandisk 3D Llc | Non-volatile memory arrays comprising rail stacks with a shared diode component portion for diodes of electrically isolated pillars |
KR20100070557A (ko) * | 2008-12-18 | 2010-06-28 | 주식회사 동부하이텍 | 반도체 소자의 제조 방법 |
US8357601B2 (en) | 2010-02-09 | 2013-01-22 | Micron Technology, Inc. | Cross-hair cell wordline formation |
US20120012897A1 (en) * | 2010-07-16 | 2012-01-19 | Unity Semiconductor Corporation | Vertically Fabricated BEOL Non-Volatile Two-Terminal Cross-Trench Memory Array with Two-Terminal Memory Elements and Method of Fabricating the Same |
US8377718B2 (en) | 2010-11-10 | 2013-02-19 | Micron Technology, Inc. | Methods of forming a crystalline Pr1-xCaxMnO3 (PCMO) material and methods of forming semiconductor device structures comprising crystalline PCMO |
CN102201359B (zh) * | 2011-05-27 | 2015-04-01 | 上海华虹宏力半导体制造有限公司 | 双沟槽隔离结构的形成方法 |
JP5671413B2 (ja) * | 2011-06-07 | 2015-02-18 | ルネサスエレクトロニクス株式会社 | 不揮発性半導体記憶装置及びその製造方法 |
US8610099B2 (en) * | 2011-08-15 | 2013-12-17 | Unity Semiconductor Corporation | Planar resistive memory integration |
US9577010B2 (en) | 2014-02-25 | 2017-02-21 | Micron Technology, Inc. | Cross-point memory and methods for fabrication of same |
US11223014B2 (en) | 2014-02-25 | 2022-01-11 | Micron Technology, Inc. | Semiconductor structures including liners comprising alucone and related methods |
US9484196B2 (en) | 2014-02-25 | 2016-11-01 | Micron Technology, Inc. | Semiconductor structures including liners comprising alucone and related methods |
US9806129B2 (en) | 2014-02-25 | 2017-10-31 | Micron Technology, Inc. | Cross-point memory and methods for fabrication of same |
US10249819B2 (en) | 2014-04-03 | 2019-04-02 | Micron Technology, Inc. | Methods of forming semiconductor structures including multi-portion liners |
US9768378B2 (en) | 2014-08-25 | 2017-09-19 | Micron Technology, Inc. | Cross-point memory and methods for fabrication of same |
US9748311B2 (en) | 2014-11-07 | 2017-08-29 | Micron Technology, Inc. | Cross-point memory and methods for fabrication of same |
TWI572074B (zh) * | 2015-02-04 | 2017-02-21 | 力晶科技股份有限公司 | 電阻式隨機存取記憶體及其製造方法 |
KR102511693B1 (ko) * | 2016-03-22 | 2023-03-20 | 삼성전자주식회사 | 반도체 메모리 소자 및 이의 제조 방법 |
US11495293B2 (en) * | 2020-02-04 | 2022-11-08 | Micron Technology, Inc. | Configurable resistivity for lines in a memory device |
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JPS5721856A (en) * | 1980-07-15 | 1982-02-04 | Nec Corp | Semiconductor memory cell |
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US5238855A (en) * | 1988-11-10 | 1993-08-24 | Texas Instruments Incorporated | Cross-point contact-free array with a high-density floating-gate structure |
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JP2000206220A (ja) * | 1999-01-11 | 2000-07-28 | Mitsubishi Electric Corp | 磁界検出素子 |
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US6437383B1 (en) * | 2000-12-21 | 2002-08-20 | Intel Corporation | Dual trench isolation for a phase-change memory cell and method of making same |
US6747286B2 (en) * | 2001-06-30 | 2004-06-08 | Ovonyx, Inc. | Pore structure for programmable device |
CN1650442A (zh) * | 2002-08-14 | 2005-08-03 | 奥翁尼克斯公司 | 用于可编程器件的修改的触点 |
US6746910B2 (en) * | 2002-09-30 | 2004-06-08 | Sharp Laboratories Of America, Inc. | Method of fabricating self-aligned cross-point memory array |
-
2003
- 2003-01-23 US US10/350,643 patent/US6875651B2/en not_active Expired - Lifetime
- 2003-12-12 JP JP2003415801A patent/JP4651075B2/ja not_active Expired - Fee Related
- 2003-12-18 TW TW092136032A patent/TWI239591B/zh not_active IP Right Cessation
- 2003-12-24 EP EP03258165A patent/EP1441391B1/en not_active Expired - Fee Related
- 2003-12-24 DE DE60324888T patent/DE60324888D1/de not_active Expired - Lifetime
-
2004
- 2004-01-20 KR KR1020040004454A patent/KR100580901B1/ko active IP Right Grant
- 2004-01-29 CN CNB2004100024303A patent/CN1303665C/zh not_active Expired - Lifetime
-
2005
- 2005-01-19 US US11/039,536 patent/US7042066B2/en not_active Expired - Lifetime
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101221970B (zh) * | 2006-12-26 | 2012-10-24 | 三星电子株式会社 | 具有在相邻单元之间共用的相变材料图案的相变存储器件和包括该相变存储器的电子产品 |
CN101345251B (zh) * | 2007-07-13 | 2011-09-28 | 旺宏电子股份有限公司 | 位于半导体衬底之上的存储单元阵列及其制造方法 |
CN102254854A (zh) * | 2011-08-01 | 2011-11-23 | 上海宏力半导体制造有限公司 | 双沟槽隔离结构的形成方法 |
CN102280404A (zh) * | 2011-08-01 | 2011-12-14 | 上海宏力半导体制造有限公司 | 双沟槽隔离结构的形成方法 |
CN102254854B (zh) * | 2011-08-01 | 2016-06-01 | 上海华虹宏力半导体制造有限公司 | 双沟槽隔离结构的形成方法 |
CN102280404B (zh) * | 2011-08-01 | 2016-06-29 | 上海华虹宏力半导体制造有限公司 | 双沟槽隔离结构的形成方法 |
Also Published As
Publication number | Publication date |
---|---|
CN1303665C (zh) | 2007-03-07 |
TW200426979A (en) | 2004-12-01 |
KR100580901B1 (ko) | 2006-05-17 |
US20050136602A1 (en) | 2005-06-23 |
KR20040068024A (ko) | 2004-07-30 |
EP1441391B1 (en) | 2008-11-26 |
TWI239591B (en) | 2005-09-11 |
US20040147081A1 (en) | 2004-07-29 |
EP1441391A2 (en) | 2004-07-28 |
JP4651075B2 (ja) | 2011-03-16 |
JP2004228561A (ja) | 2004-08-12 |
EP1441391A3 (en) | 2006-08-09 |
US7042066B2 (en) | 2006-05-09 |
DE60324888D1 (de) | 2009-01-08 |
US6875651B2 (en) | 2005-04-05 |
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