CN1424756A - 金属布线基板和半导体装置及其制造方法 - Google Patents
金属布线基板和半导体装置及其制造方法 Download PDFInfo
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- CN1424756A CN1424756A CN02156318A CN02156318A CN1424756A CN 1424756 A CN1424756 A CN 1424756A CN 02156318 A CN02156318 A CN 02156318A CN 02156318 A CN02156318 A CN 02156318A CN 1424756 A CN1424756 A CN 1424756A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 104
- 239000000758 substrate Substances 0.000 title claims abstract description 92
- 229910052751 metal Inorganic materials 0.000 title claims abstract description 61
- 239000002184 metal Substances 0.000 title claims abstract description 61
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 27
- 229920005989 resin Polymers 0.000 claims abstract description 50
- 239000011347 resin Substances 0.000 claims abstract description 50
- 230000003647 oxidation Effects 0.000 claims abstract description 7
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 63
- 239000011889 copper foil Substances 0.000 claims description 53
- 238000000034 method Methods 0.000 claims description 52
- 239000011521 glass Substances 0.000 claims description 47
- 239000011256 inorganic filler Substances 0.000 claims description 23
- 229910003475 inorganic filler Inorganic materials 0.000 claims description 23
- 238000012545 processing Methods 0.000 claims description 21
- 238000009434 installation Methods 0.000 claims description 20
- 239000000463 material Substances 0.000 claims description 20
- 239000000203 mixture Substances 0.000 claims description 19
- 230000008878 coupling Effects 0.000 claims description 15
- 238000010168 coupling process Methods 0.000 claims description 15
- 238000005859 coupling reaction Methods 0.000 claims description 15
- 239000003822 epoxy resin Substances 0.000 claims description 14
- 229920000647 polyepoxide Polymers 0.000 claims description 14
- 230000008569 process Effects 0.000 claims description 12
- -1 polyethylene naphthalenedicarboxylate Polymers 0.000 claims description 11
- 238000012546 transfer Methods 0.000 claims description 10
- 238000010438 heat treatment Methods 0.000 claims description 9
- KKEYFWRCBNTPAC-UHFFFAOYSA-N Terephthalic acid Chemical compound OC(=O)C1=CC=C(C(O)=O)C=C1 KKEYFWRCBNTPAC-UHFFFAOYSA-N 0.000 claims description 8
- 239000011651 chromium Substances 0.000 claims description 6
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 5
- 229910052804 chromium Inorganic materials 0.000 claims description 5
- 239000011248 coating agent Substances 0.000 claims description 5
- 238000000576 coating method Methods 0.000 claims description 5
- 238000009713 electroplating Methods 0.000 claims description 4
- 239000004698 Polyethylene Substances 0.000 claims description 3
- 239000004642 Polyimide Substances 0.000 claims description 3
- 239000004734 Polyphenylene sulfide Substances 0.000 claims description 3
- 239000004743 Polypropylene Substances 0.000 claims description 3
- 229920000573 polyethylene Polymers 0.000 claims description 3
- 229920001721 polyimide Polymers 0.000 claims description 3
- 229920000069 polyphenylene sulfide Polymers 0.000 claims description 3
- 229920001155 polypropylene Polymers 0.000 claims description 3
- 238000005728 strengthening Methods 0.000 claims 1
- 239000002344 surface layer Substances 0.000 abstract 1
- 239000010931 gold Substances 0.000 description 23
- 238000007747 plating Methods 0.000 description 14
- 229920001187 thermosetting polymer Polymers 0.000 description 14
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 11
- 229910052802 copper Inorganic materials 0.000 description 10
- 239000010949 copper Substances 0.000 description 10
- 239000002245 particle Substances 0.000 description 9
- 238000012360 testing method Methods 0.000 description 9
- 238000009740 moulding (composite fabrication) Methods 0.000 description 6
- 229920001568 phenolic resin Polymers 0.000 description 6
- 239000005011 phenolic resin Substances 0.000 description 6
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 5
- XLJMAIOERFSOGZ-UHFFFAOYSA-M cyanate Chemical compound [O-]C#N XLJMAIOERFSOGZ-UHFFFAOYSA-M 0.000 description 5
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 4
- 239000003795 chemical substances by application Substances 0.000 description 4
- ZCDOYSPFYFSLEW-UHFFFAOYSA-N chromate(2-) Chemical compound [O-][Cr]([O-])(=O)=O ZCDOYSPFYFSLEW-UHFFFAOYSA-N 0.000 description 4
- 239000002270 dispersing agent Substances 0.000 description 4
- 238000007731 hot pressing Methods 0.000 description 4
- 229910000077 silane Inorganic materials 0.000 description 4
- OMIHGPLIXGGMJB-UHFFFAOYSA-N 7-oxabicyclo[4.1.0]hepta-1,3,5-triene Chemical compound C1=CC=C2OC2=C1 OMIHGPLIXGGMJB-UHFFFAOYSA-N 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 3
- 229910018605 Ni—Zn Inorganic materials 0.000 description 3
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000005260 corrosion Methods 0.000 description 3
- 230000007797 corrosion Effects 0.000 description 3
- 230000001351 cycling effect Effects 0.000 description 3
- 230000006378 damage Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 238000002156 mixing Methods 0.000 description 3
- 238000000465 moulding Methods 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- 230000000630 rising effect Effects 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 2
- 238000013459 approach Methods 0.000 description 2
- 239000007864 aqueous solution Substances 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 239000006229 carbon black Substances 0.000 description 2
- 239000003153 chemical reaction reagent Substances 0.000 description 2
- 238000004040 coloring Methods 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 239000006071 cream Substances 0.000 description 2
- 238000000280 densification Methods 0.000 description 2
- 238000007772 electroless plating Methods 0.000 description 2
- 239000000945 filler Substances 0.000 description 2
- 238000011049 filling Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 239000012528 membrane Substances 0.000 description 2
- 239000004033 plastic Substances 0.000 description 2
- 229920003023 plastic Polymers 0.000 description 2
- 229920000642 polymer Polymers 0.000 description 2
- 229920001343 polytetrafluoroethylene Polymers 0.000 description 2
- 239000004810 polytetrafluoroethylene Substances 0.000 description 2
- 238000007670 refining Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 238000004381 surface treatment Methods 0.000 description 2
- QBTUCBKAWGUMMK-UHFFFAOYSA-N C=CC.[F] Chemical group C=CC.[F] QBTUCBKAWGUMMK-UHFFFAOYSA-N 0.000 description 1
- 102000004895 Lipoproteins Human genes 0.000 description 1
- 108090001030 Lipoproteins Proteins 0.000 description 1
- 208000034189 Sclerosis Diseases 0.000 description 1
- 229910020816 Sn Pb Inorganic materials 0.000 description 1
- 229910020922 Sn-Pb Inorganic materials 0.000 description 1
- 229910008783 Sn—Pb Inorganic materials 0.000 description 1
- 230000005856 abnormality Effects 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 239000011324 bead Substances 0.000 description 1
- 239000007767 bonding agent Substances 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000004587 chromatography analysis Methods 0.000 description 1
- 230000004087 circulation Effects 0.000 description 1
- 238000005253 cladding Methods 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 229960002089 ferrous chloride Drugs 0.000 description 1
- 239000012467 final product Substances 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- 239000002241 glass-ceramic Substances 0.000 description 1
- NMCUIPGRVMDVDB-UHFFFAOYSA-L iron dichloride Chemical compound Cl[Fe]Cl NMCUIPGRVMDVDB-UHFFFAOYSA-L 0.000 description 1
- 238000009940 knitting Methods 0.000 description 1
- 238000011068 loading method Methods 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 229920002620 polyvinyl fluoride Polymers 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
- 238000010992 reflux Methods 0.000 description 1
- 239000012779 reinforcing material Substances 0.000 description 1
- 239000011342 resin composition Substances 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000002002 slurry Substances 0.000 description 1
- 235000011121 sodium hydroxide Nutrition 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000003756 stirring Methods 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 229920003002 synthetic resin Polymers 0.000 description 1
- 239000000057 synthetic resin Substances 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/568—Temporary substrate used as encapsulation process aid
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
- H01L23/49894—Materials of the insulating layers or coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/282—Applying non-metallic protective coatings for inhibiting the corrosion of the circuit, e.g. for preserving the solderability
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68359—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during manufacture of interconnect decals or build up layers
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/29111—Tin [Sn] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H—ELECTRICITY
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Abstract
制作把埋置在电绝缘基板(104)的表层的金属布线(105)与覆盖金属布线(105)能够以机械方式剥离而且防止氧化的载片(101)贴合在一起的金属布线基板,使用了该基板的半导体装置把埋置在电绝缘基板(104)中的金属端子电极(105)与半导体元件(106)上的突出电极(107)电连接,突出电极(107)具有通过把基板(104)加热、加压安装半导体元件(107)来挤压前端的结构,是用绝缘树脂体(108)增强基板(104)与半导体元件(106)的连接部分,并且构成为一体的结构,由此,使用低成本的布线图形,提供具备低电阻而且能够与高可靠性的凸点连接的载片的金属布线基板和半导体装置及其制造方法。
Description
技术领域
本发明涉及具备载片的金属布线基板和半导体装置及其制造方法。
背景技术
随着便携用设备的小型化、高性能化,越来越要求半导体器件等也相应地小型化、高性能化。为此,重要的是增加端子引脚数,使间距狭窄或者进行区域排列。但是,在使间距狭窄方面存在极限,另一方面,重要的是在元件或者布线上设置焊区(pad)以便进行安装。作为能够实现这种要求的技术,有美国的IBM开发的通称为基于焊锡凸点的C4(控制故障芯片连接)技术,此外,还有除了焊锡以外在形成阻挡金属层后形成镀Au凸点的结构等。
这些现有技术能够期待在IC芯片的有源元件上形成端子电极,即使在其上面形成突出电极,也不会造成对于IC芯片的有源元件的损伤。
另一方面,在包括与这些突起电极接合的基板一侧的端子电极的布线图形上,还同时要求镀Au等表面处理。上述电镀凸点或者布线图形使用由电镀或者无电镀生成的Au、Ni等构成的材料。另外,在接合层中使用焊锡或者导电性粘接剂(各向同性)的情况下,虽然在实际安装时几乎不需要加载,但是在使用各向异性导电膜(ACF:各向异性导电膜),绝缘性膜(NCF:非导电膜)或者各向异性导电膏的情况下,为了确保连接的稳定性或者可靠性,有时需要最大200g/引脚左右的载荷。
图示5A-B中,示出使用了各向异性导电膜(ACF)时的现有的安装方法。第1基板401的第1电极402经过各向异性导电膜(ACF)407安装在第2基板406的第2电极405上。包含在各向异性导电膜(ACF)407中的导电粒子403例如能够使用涂敷了Au(或者Ni-Au)的小球。在粘接剂404中例如使用环氧系列树脂。使热与载荷同时作用,使得在第1电极402与第2电极403之间夹入导电粒子406那样地进行连接。或者,在把由Au构成的突出电极Au-Au接合到Au的输入输出端子电极上的情况下,也可以同时使用安装载荷和超声波。
另一方面,在把半导体芯片等有源部件安装到电路基板表层上的方法中,由于在进行高密度化方面显然是有限制的,因此提出了在基板上设置凹部并且在其内部收入并安装半导体芯片的方法(特开平5-259372号,特开平11-103147号公报,特开平11-163249号公报)。这种情况下,在凹部内安装了半导体芯片以后,涂敷用于保护连接部分以及半导体芯片的密封树脂以便进行密封。
但是,在内通孔连接法中使用的基板由于用树脂系列的材料构成,因此热传导率低,需要大量散发从内部安装部件发生的热,但是在以往的基板中不能够充分散热,存在着电路部件内部模块的可靠性低的问题。
作为用于解决该问题的一个例子,提出把半导体芯片等电路部件安装在具有高热传导率的基板内(特开平11-220262号公报,特开2001-244638号公报)。
如以上所述,实际的封装形态越来越追求小型化,薄型化,另一方面,端子引脚数今后也进一步增加,要求更高的高性能化。另外,为了降低成本,需要在以往的基础上提高安装工序中的生产性,为了提高流水作业,更着眼于以ACF、NCF等为代表的热压工序安装。
但是,在考虑了进一步提高生产率及降低成本时,包括端子电极的基板一侧的布线图形希望仍然用铜电极构成。但是,由于铜易于氧化,因此通常加上了防锈处理膜。防锈处理膜由硅烷耦联材料层、铬酸盐防锈处理层和镀Ni-Zn处理层等构成,以预防铜箔被氧化。
但是,由于这些防锈处理膜,通常,如果使用热压工序在铜箔上安装半导体元件,则由于具有高电阻的防锈处理膜的影响,安装后的每一引脚的初始连接电阻显示出很高的值。另一方面,在没有防锈处理膜的状态下形成布线图形并使用热压工序进行安装的结果,将发生布线部分的氧化,使初始连接电阻产生很大的分散性。从而,通常如果不是始终把包括端子电极的铜箔布线部分上形成镀Au层,则不能得到稳定的低电阻连接。
另一方面,镀Au处理如果考虑到提高生产性和降低成本则并不理想。
另外,如果考虑特开2001-244638号公报示出的使半导体芯片等有源部件安装在电路基板内部以谋求小型、高密度化的情况,则依据上述考虑,除了多层布线部分的布线部分以外,需要在2层以上的多层中形成镀Au了的布线图形,有时会带来成本的进一步升高。
另一方面,在多层地安装电路部件的情况下,在考虑了可靠性时,必须经过用于各个电路部件安装的多次回流。这种情况下,在形成镀Au时,还要考虑形成在基底上的镀Ni层析出的问题等。
发明内容
本发明是为解决现有技术的问题而产生的,目的在于通过使用低成本的布线图形,提供具备能够进行低电阻而且高可靠性的凸点连接的载片的金属布线基板和半导体装置及该半导体装置的制造方法。
为了达到上述目的,本发明的金属布线基板的特征在于把埋置在电绝缘基板的表层中的金属布线与用于覆盖上述金属布线并能以机械方式进行剥离和可防止上述金属布线氧化的载片贴合在一起。
本发明的半导体装置包括下述结构:把埋置在电绝缘基板中的金属端子电极与半导体元件上的突出电极电连接起来,上述突出电极具有通过把上述半导体元件安装在上述基板上来挤压其前端的结构,并且用绝缘树脂体增强上述基板与上述半导体元件的连接部分并使其形成为一体。
本发明的半导体装置的制造方法包括:
使用在载片上形成了金属布线图形的转移材料、使该转移材料与电绝缘基板相接触和把上述金属布线图形埋入到上述基板内的工序;
把增强上述金属布线图形与形成在半导体元件上的突出电极的连接部分的绝缘树脂体准备成预定形状的工序;
剥离上述载片的剥离工序;以及
在通过由上述剥离工序露出的上述金属布线图形上进行加热加压、一边经过绝缘树脂体、一边使上述突出电极的前端接触上述金属布线图形以及以挤压上述前端的方式把上述金属布线图形与上述突出电极加热加压进行连接的半导体安装工序。
附图说明
图1A-图1B是示出本发明第1实施形态中的半导体装置的各个制造工序的剖面图,图1C-图1E是示出本发明第2实施形态中的半导体装置的各个制造工序的剖面图。
图2A-图2B是示出本发明第2实施形态中的其它的半导体装置的各个制造工序的剖面图。
图3A-图3B是示出本发明第3实施形态中的半导体装置的制造工序的剖面图。
图4是本发明第4实施形态中的部件内部安装基板的布线层的剖面图。
图5A-图5B是以往的使用各向异性导电膜(ACF)的半导体装置的实际安装方法的概略剖面图。
具体实施方式
本发明的形成在基板一侧的包括端子电极的金属布线图形可以通过转移法在表面上形成对膜没有进行防锈处理的状态,使上述防止金属布线氧化的载片贴合在一起。由此,即使在转移以后,形成转移材料的载片也能够最大限度地维持到即将进行半导体元件的安装工序为止。从而,金属布线图形与未处理的表面状态无关,即使经过加热处理,铜箔也不会因载片而导致被氧化。
另一方面,由于半导体元件的热压工序在去除了载片以后进行,因此金属布线图形多少被氧化。从而,在本实施形态中理想的是通过充分的安装载荷连接突出电极与布线图形的NCF、ACF等膜增强连接部分的安装方法。从而,理想的是通过上述突出电极破坏形成为很薄的上述氧化膜从而在安装后挤压前端的结构。
另外,如果依据上述半导体装置的结构,则由于连接部分仅在金属端子电极与凸点的接合处形成,因此由于回流等的反复热冲击产生的随时间的变化很少。从而,在形成把上述半导体埋置在基板内的结构的半导体装置方面也很理想。
如果依据把半导体元件安装在基板内部的半导体装置的结构,则由于通过形成在电绝缘性基板内的内通孔进行内通孔连接,因此能够高密度地安装电路部件。另外,由于通过无机填料迅速地散发从电路部件发出的热,因此能够实现可靠性高的内部安装电路部件的半导体装置。另外,再次布线也很容易,能够构成设计上制约少的多种多样的LGA(接合区栅格阵列)电极。
另一方面,在考虑了生产性的情况下,形成在上述半导体的突出电极理想的是能够通过使用引线键合法形成的方法一起大量地形成的电镀法。
如果依据本发明,则能够使用成本低的布线图形,可提供具备能进行低电阻且可靠性高的凸点连接的载片的金属布线基板和半导体装置及其制造方法。
以下,使用实施形态更具体地说明本发明。
第1实施形态
本实施形态是本发明的带载片的基板的一个例子,图1A-B中示出其概要。
如图1A所示,作为转移材料,具备载片101和上述载片的一个表面上的铜箔布线图形105。在上述铜箔布线图形中,载片101与布线图形105的接触面是部件安装侧102,埋置到基板内的面是埋置侧表面103。另外,在以下的各实施形态中,所谓布线图形105是端子电极、布线等的总称。
如图1B所示,带载片的基板把电绝缘性基板104、埋置在电绝缘性基板104的一个主面中形成的铜箔布线105和覆盖上述铜箔布线图形105的可剥离的载片101包含在内形成为一体。
在本实施形态中使用的电绝缘性基板104没有任何限定,FR4等玻璃环氧基板(使环氧树脂含浸在玻璃纤维织物中的基板)、通过无机填料与树脂混合构成的合成基板、进而是能够与铜同时烧结成的陶瓷基板(例如玻璃陶瓷基板等)都在该范畴以内。
另外,在铜箔布线图形105中,在基板埋置一侧表面103上,最好形成所需要的最小限度的防锈处理膜等。在防锈处理膜的一个例子中,利用铬酸盐处理、镀Zn处理、硅烷耦联处理等都以每单位面积重量0.05~0.5mg/dm2形成。部件安装一侧102最好是未处理面的铜箔表面。
如果依据本实施形态,则由于原本作为表面状态不稳定的未处理铜箔面的安装部件一侧102被能够剥离的载片覆盖,因此也不会被氧化,能够维持稳定的状态。
而且,由于在需要安装部件等时,能够以机械方式剥离载片,因此十分方便。在载片的剥离方法是腐蚀等化学方法的情况下,在洗净、干燥工序时,万一作为未处理铜箔面的安装部件一侧102被氧化,则将产生不理想状况。
作为在铜箔布线图形105中使用的铜箔,例如,能够使用通过电解电镀制作的厚度9μm~35μm左右的铜箔。为了使铜箔与电绝缘性基板104的粘接性提高,最好把与电绝缘性基板104的接触面粗糙化成均匀粗糙度为Ra:1μm以上。另外,作为铜箔,为了使粘接性以及耐氧化性提高,最好用硅烷耦联材料层、铬酸盐防锈处理层、镀Ni-Zn处理层构成铜箔表面。另外,另一方面,还可以使用在铜箔表面上实施了由Sn-Pb合金等构成的镀锡或者Sn-Ag-Bi系列的无Pb的镀锡的材料。
形成在本发明的主面的布线图形由于通过转移形成,因此埋置在基板内。
作为能够剥离的载片101,能够使用合成树脂薄膜,例如,聚酰亚胺,聚对苯二甲酸乙脂,聚乙烯萘,聚苯撑硫,聚乙烯,聚丙烯,氟树脂等,作为剥离层,能够使用涂敷了适宜的有机膜的材料。载片的理想厚度是30~100μm。氟树脂例如是聚四氟乙烯(PTFE),四氟乙烯-全氟烷基乙烯醚(PFA)聚合物,四氟乙烯-环氟丙烯(FEP)聚合物,聚氟乙烯,聚偏氟乙烯等。
另外,在载片101中使用具有30μm以上厚度的金属箔,例如在使用铜箔等的情况下,可以经过镀金属层,例如,镀Cr层、镀Ni层形成铜箔布线图形。
布线图形105例如在载片101上粘接了铜箔以后,能够经过光刻工序或者腐蚀工序形成。如果这样做,则与在载片中使用了树脂膜的情况相比较,能够把载片剥离后的铜箔表面清洗得更干净。即,由于直接使电镀边界面露出,因此能够使没有被氧化的具有更亮光泽的铜箔界面露出。
在本实施形态中所示的带载片的基板中,由于用载片覆盖布线层,因此能够防止布线层表面的氧化,能够作为保存稳定性良好的多层基板。从而,能够使电路部件、特别是作为半导体安装用基板流通,非常有用。
第2实施形态
本实施形态是本发明的半导体装置的一个例子,图1C-E是示出本实施形态中的半导体装置的剖面图。
如图1E所示,本实施形态的半导体装置包括电绝缘性基板104、埋置在电绝缘性基板104的一个主面上形成的铜箔布线图形105、与布线图形105形成为一体的树脂膜108、配置在电绝缘性基板104的表层的半导体元件106和把布线图形105与半导体元件106电连接的凸点107。
本实施形态的半导体装置如图1C所示,在把载片101从电绝缘性基板104剥离了以后,如图1D所示,在电绝缘性基板104的铜箔布线图形105一侧,配置包含树脂成分的薄膜108,在其上面配置电连接了半导体元件106的凸点107,使铜箔布线图形105与凸点107位置重合,从上下方向加热、加压进行结合。加热、加压的条件,最好例如是80℃~200℃的温度,1.47×106Pa(15kg/cm2)~9.8×106Pa(15~100kg/cm2)的压力。
上述包含树脂成分的薄膜108是NCF(非导电膜),可以是基本上以热硬化性树脂为主要成分的薄膜,也可以是无机填料与热硬化性树脂的混合物,而最好是使热和压力同时作用,把凸点107与铜箔布线图形105紧密地连接固定。作为热硬化性树脂,例如是环氧树脂,酚醛树脂等。
作为无机填料,例如能够使用Al2O3,MgO,BN,AlN或者SiO2等。无机填料最好在50体积%~75体积%的范围内高密度地充填。无机填料的平均粒子最好是在0.1μm~40μm的范围内。热硬化性树脂例如最好是耐热性高的环氧树脂,酚醛树脂,氰酸盐树脂或者聚亚苯基醚树脂。环氧树脂由于耐热性高因此特别理想。另外,混合物还可以包括分散剂,着色剂,耦联剂或者脱模剂。
另一方面,上述包含树脂成分的薄膜108也可以是图5A所示的称为ACF(各向异性导电膜)的各向异性导电膜407。作为各向异性导电粒子,例如,能够使用Ni粒子,涂敷了Au(或者Ni,Au)的树脂球等。这种情况下,在粘接薄膜中,例如也能够使用环氧系列树脂,使热和压力同时作用,能够把导电粒子夹入到凸点107与铜箔布线图形105之间获得连接。
另外,本发明不限定于包含绝缘树脂的薄膜,只要是绝缘树脂体即可,例如,也可以使用把绝缘树脂不做成薄膜形而是做成膏形的材料。进而,包含树脂成分的薄膜108为了防止表面污染,可以在使用之前一直用脱模薄膜覆盖,直到即将在把半导体元件106与布线图形105构成为一体时去除剥离薄膜使用。
凸点107由于要求贯通上述薄膜的功能,因此最好是具有突起的结构。例如,是金属凸点,作为其一个例子,通过使用了Au引线的引线键合法,能够形成Au柱状凸点。另一方面,考虑到生产性,作为能够一并地制作大量凸点的方法是电镀凸点法,例如,能够构成用Cu-Ni-Au构成的凸点。其中,用通常的电镀法构成的凸点由突起起的程度小,因此贯通上述包含树脂成分的薄膜108的功能稍差。从而,通过使用把导电性粒子作为填料的ACF,能够经过导电粒子更可靠地得到电镀凸点与无处理铜箔端子电极的接合。
另一方面,在凸点107是两段突出电极的情况下,由于前端的突出尖锐,因此能够容易地贯通包含树脂成分的薄膜108,从而在薄膜内也可以包含无机填料。另外,如果依据本结构,则由于安装时突出电极由布线图形105挤压,因此能够容易地贯通在无处理薄膜表面上由安装加热形成的很薄的氧化膜,能够得到凸点107与布线105的良好的连接。
另外,图1A-E示出了布线图形105的表面与电绝缘性基板104的表面是平坦的金属布线基板的例子,而如图2A所示,布线图形105也可以从电绝缘性基板104的表面突出。如图2B所示,由于在半导体元件106与电绝缘性基板104之间存在包含树脂成分的薄膜108构成为一体,因此能够得到凸点107与布线图形105的良好的连接。
另外,在本实施形态中,说明了凸点107与布线图形105直接接合的情况,而凸点107与布线图形也可以经过导电性膏接合。经过该导电性膏的接合方法称为柱状凸点键合法(SBB法)。如果采用该方法,则由于减少凸点107与布线图形105的接合所需要的载荷,因此能够进一步降低在半导体元件中产生的损伤。
另外,作为半导体元件,例如能够使用晶体管,IC,LSC等。
第3实施形态
本实施形态是半导体装置的一个例子,图3A-B是示出本实施形态中的半导体装置的剖面图。
本实施形态的半导体装置把电绝缘性基板205,埋置在电绝缘性基板205的一个主面以及另一个主面中形成的铜箔布线图形204,与布线图形204构成一体的包含树脂成分的绝缘树脂部分203,配置在电绝缘性基板205的表层的半导体元件201,电连接布线图形204与半导体元件201的凸点202构成为一体(图3A)。进而,上述包含安装部分的半导体元件201埋置到电绝缘性基板206内,与内部安装的半导元件201连接的布线图形204经过内通孔207取出到其它的表层(图3B)。
另外,在把上述半导体元件埋置到电绝缘性基板内时,由于不是像在以往技术的栏目中说明过的以往技术那样,设置凹部安装半导体元件,因此在半导体元件与基板之间不存在空隙。
从而,在本实施形态的半导体装置中,能够以高密度安装电路部件,例如半导体元件201。
本实施形态的各结构除去电绝缘性基板206、内通孔207以外,由于与第1以及第2实施形态相同,因此省略其说明。
内通孔207例如由热硬化性的导电性物质构成。作为热硬化性的导电性物质,例如,能够使用把金属粒子与热硬化性树脂混合了的导电性树脂组合物。作为金属粒子,能够使用金、银、铜或者镍等。金、银、铜或者镍由于导电性高因此很理想,铜由于导电性高,而且迁移少,因此最理想。作为热硬化性树脂,例如,能够使用环氧树脂,酚醛树脂,氰酸盐树脂,或者聚亚苯基醚树脂。环氧树脂由于耐热性高因此最理想。
另一方面,电绝缘性基板206由包括无机填料与热硬化树脂的混合物构成。
作为无机填料,例如能够使用Al2O3,MgO,BN,AlN或者SiO2等。无机填料最好例如在60体积%~90体积%的范围内高密度地充填。无机填料的平均粒子最好是在0.1μm~40μm的范围内。热硬化性树脂例如最好是耐热性高的环氧树脂,酚醛树脂,氰酸盐树脂或者聚亚苯基醚树脂。环氧树脂由于耐热性高因此特别理想。另外,混合物还可以包括分散剂,着色剂,耦联剂或者脱模剂。
如果依据该实施形态,则由于电绝缘性基板206不包含玻璃纤维等增强材料,因此能够容易地埋入电路部件。
另外,埋入到电绝缘性基板206中的半导体元件201成为内置电路部件模块,在上述内置电路部件模块中,由包含在电绝缘性基板206中的无机填料迅速地传导在电路部件中发生的热。从而,能够实现可靠性高的内置电路部件模块。
另外,在电绝缘性基板206中,通过选择无机填料,能够容易地控制电绝缘性基板206的线性膨胀系数,热传导率,介电率等。如果使电绝缘性基板206的线性膨胀系数接近于半导体元件,则由于能够防止发生由温度变化引起的断裂等,因此能够实现可靠性高的电路模块。另外,如果使电绝缘性基板206的热传导性提高,则即使在以高密度安装了电路部件的情况下,也能够实现可靠性高的内置电路部件模块。进而,通过降低电绝缘性基板206的介电率,能够实现介电率小的高频电路用模块。进而,由于能够用电绝缘性基板206从外部遮挡作为电路部件的半导体元件201,因此能够防止由于湿度引起的可靠性下降。
另外,如果依据本实施形态,则由于采用层叠了电绝缘性基板205与206的结构,因此考虑到翘曲、变形,电绝缘性基板205也能够采用与电绝缘性基板206相同的成分。
第4实施形态
其次,图4中示出第3实施形态的变形例。
图4中,与图3相同的部分使用相同的符号。在本变形例中,在电绝缘层206上还安装了其它的半导体元件311或者电子部件310。另外,在电绝缘层内部安装了其它的电子部件310。也可以像这些元件那样,安装其它的电子部件,或者安装在内部。
另外,在该变形例中,作为电绝缘性基板205,示出了多层布线基板的一例,而在上述各实施形态中,也可以使用多层布线基板作为电绝缘层。
另外,在上述各实施形态中,作为电子部件,例如使用电容器或者电感器,电阻等片状部件,或者二极管,热敏电阻,开关等。
另外,在上述各实施形态中,上述转移材料的膜可由铜箔构成,载片与铜箔布线图形之间的剥离层可由镀铬层形成。由此,具有更易于剥离的优点。
另外,在上述各实施形态中,作为布线图形示出了使用铜箔的例子,而本发明不限定于此,也可以是铝,镍等金属箔。
实施例
以下,举出具体的实施例,进一步详细地说明本发明。
实施例1
在本实施例中,说明制作与第1~第3实施形态相对应的半导体装置时的由包含无机填料与热硬化性树脂的2种混合物构成的电绝缘性基板的制作方法的一个例子。
本实施例的制作方法按照以下的顺序形成。从电绝缘性基板的制作方法开始,按照图1A所示转移形成材料的制作方法,图1B所示带载片的基板的制作方法,图1C-E所示表面安装状态的半导体装置的制作方法,最后,把上述半导体元件安装在基板内部图3所示的基板内置型半导体装置的制造方法,结束制作。从而,按照上述的顺序进行说明。
在本实施例中,作为液态环氧树脂,使用了日本ペルノツクス公司制造的环氧树脂“WE-2025”(商品名)。另外,作为酚醛树脂,使用了大日本インキ公司制造的”フエノライトVH-4150”(商品名)。另外,作为シアネ-ト树脂,使用了旭チバ公司制造的氰酸盐树脂“AroCy,M30”(商品名)。另外,作为添加物,添加了碳黑或者分散剂。在下边的表1中示出条件,在表2中示出结果。
【表1】
(备注)
Al2O3:昭和电工公司制造的商品名“SA-40”
SiO2:关东化学公司制造试剂1级
AIN:ダウコニングクス公司制造
BN:电化学工业公司制造
MgO:关东化学公司制造试剂1级
液态环氧树脂:日本ペルノツクス公司制造商品名“WE-2025”
酚醛树脂:大日本インキ公司制造商品名“フエノライトVH-4150”
氰酸盐树脂:旭チバ公司制造商品名“AroCy M-30”
碳黑:东亚カ—ボン公司制造商品名“R-930”
分散剂:第一工业制药公司制造商品名“プライサ—フS-208F”
【表2】
在制作构成电绝缘性基板的第1混合物时,首先,将按照上述(表1)的成分混合的膏状的混合物以预定的量滴落在脱模型薄膜上。使用搅拌混合机把无机填料和液态的热硬化性树脂混合10分钟左右制作该膏状的混合物。所使用的混合搅拌机是在预定容量的容器中投入无机填料和液态的热硬化性树脂、使容器自身旋转的同时进行公转的设备,可以得到混合物的粘度比较高而且充分地分散的状态。作为脱模薄膜,使用了在厚度75μm的聚对苯二甲酸乙脂薄膜的表面上实施了由硅进行的脱模处理的薄膜。
接着,在脱模薄膜上的膏状的混合物上进而重叠脱模薄膜,使用加压压力机进行加压使得成为厚度200μm,从而得到板形的混合物。另外,在脱模薄膜上载置使粘度进一步降低了的浆形的混合物,即使使用刮桨刀法成形为片形,也能够得到良好的板形的混合物。
另外,作为无机填料使用了非晶质SiO2的情况下,线性膨胀系数是12ppm/℃,更接近于硅半导体(线性膨胀系数是3ppm/℃)。从而,希望将作为无机填料使用了非晶质SiO2的电绝缘性基板用作为直接安装半导体的倒装片用基板。
另外,作为无机填料在使用了SiO2的情况下,可以得到相对介电率为3.4~3.8的低的电绝缘性基板。SiO2还具有比重小的优点。希望将作为无机填料使用了SiO2的内置电路部件模块用作为便携电话等的高频用模块。
其次,在图1A所示的转移形成材料的制作方法中,准备了层叠了的作为剥离层把镀铬层夹在中间的厚度70μm的电铜箔和厚度9μm的电铜箔的铜箔。9μm的铜箔的表面处理在剥离层一侧以未处理面在表面层一侧以防锈处理为目的,用硅烷耦联材料层,铬酸盐防锈处理层,镀Ni-Zn处理层构成。然后,从9μm铜箔一侧进行光刻法(干膜抗蚀剂(DFR))的剥离,图形曝光,显像,由氯化亚铁水溶液进行的腐蚀,由氢氧化钠水溶液进行的DFR的剥离,进行铜箔布线图形形成,制作转移形成材料。另外,在本实施例中,作为能够剥离的载片,使用了铜箔薄膜,而也可以使用聚酯等的树脂薄膜。
其次,在图1B所示的带载片的基板的制作方法中,准备B级(半硬化或者部分硬化)状态的环氧树脂制电绝缘片,以120℃加热以后,通过以30kg/cm2加载,粘贴上述转移形成材料而获得。
其次,在图1E所示的半导体装置的制造方法中,准备PEG(试验元件组)的半导体元件对,使用Au引线,形成50μm的柱状凸点。同时,作为NCF,准备由硅填料和环氧树脂构成的流动性出色的混合片。
把布线图形的电绝缘性基板放置在加热台上,在完成了与半导体元件的对准的阶段,如图1C所示,以机械方式剥离载片,即,加热、加载(150℃,80g/凸点),进行凸点与铜端子电极的接合。同时,薄膜106硬化,以机械方式增强凸点连接部分。
评价了这样得到的半导体装置凸点的初始连接电阻。为了比较,在形成于基板的布线图形方面,准备了(1)形成了防锈处理膜的铜箔布线,(2)用精制法形成的无处理铜箔布线,(3)在形成于基板的铜箔布线图形上实施了电场镀Ni-Au处理的材料。
凸点连接电阻如下所述。
(1)带防锈处理膜的铜箔布线100~500mΩ
(2)基于精制法的未处理铜箔布线100~1000mΩ
(3)无电镀Ni-Au处理铜箔布线20~25mΩ
(4)本实施例(刚刚剥离了载片以后的无处理铜箔)15~20mΩ
根据上述结果可知,如果依据本实施例的结构,则能够确认可以得到与镀Au了的铜端子电极同等以上的初始连接电阻值。
另一方面,在只是使用无处理铜箔布线进行安装的情况下,根据(2)的结果可知,连接电阻高而且分散性大。
另外,该凸点连接电阻值在把半导体元件201埋置到电绝缘性基板206中以后,也可以得到同样的趋势和电阻值。
接着,为了评价所制作的半导体装置的可靠性,进行了焊锡回流试验以及温度循环试验。焊锡回流试验通过使用皮带式的回流试验机,在最高温度260℃下以10秒的周期反复10次进行。温度循环试验通过把在125℃的温度下保持了3分钟以后在-60℃的温度下保持3分钟的工序反复200个循环进行。
即使在焊剂回流试验以及温度循环试验的任一个试验中,在本实施例的内置电路部件模块中都不发生破裂,即使使用超声波探伤装置也没有特别地发现异常。其结果,能够确认半导体元件的凸点连接部分被紧固地粘接。
Claims (22)
1.一种金属布线基板,其特征在于:
把埋置在电绝缘基板的表层中的金属布线与用于覆盖上述金属布线并能以机械方式剥离和可防止上述金属布线氧化的载片贴合在一起。
2.根据权利要求1所述的金属布线基板,其特征在于:
与上述载片相接的上述金属布线的表面没有进行防锈处理。
3.根据权利要求1所述的金属布线基板,其特征在于:
在埋置于上述电绝缘基板表层中的上述金属布线的表面进行了防锈处理。
4.根据权利要求1所述的金属布线基板,其特征在于:
上述载片是金属片或者树脂片。
5.根据权利要求4所述的金属布线基板,其特征在于:
上述树脂片是从聚酰亚胺,聚对苯二甲酸乙脂,聚乙烯萘,聚苯撑硫,聚乙烯,聚丙烯以及氟树脂中选择出的至少一种树脂薄膜,金属片是铜箔。
6.根据权利要求1所述的金属布线基板,其特征在于:
上述载片的厚度是30~100μm的范围。
7.根据权利要求1所述的金属布线基板,其特征在于:
上述金属布线是铜箔,形成上述载片与上述布线图形之间的剥离层,上述剥离层是镀铬层。
8.一种半导体装置,其特征在于:
把埋置在电绝缘基板内的金属端子电极与半导体元件上的突出电极电连接起来,上述突出电极具有通过把上述半导体元件安装在上述基板上来挤压其前端的结构,包括用绝缘树脂体增强上述基板与上述半导体元件的连接部分并使其构成为一体。
9.根据权利要求8所述的半导体装置,其特征在于:
上述金属端子电极的表面没有进行防锈处理。
10.根据权利要求8所述的半导体装置,其特征在于:
上述绝缘树脂体是树脂薄膜。
11.根据权利要求8所述的半导体装置,其特征在于:
上述绝缘树脂体由无机填料和至少包含环氧树脂的树脂成分构成。
12.根据权利要求8所述的半导体装置,其特征在于:
上述半导体埋置在其它的基板内。
13.根据权利要求8所述的半导体装置,其特征在于:
在把上述半导体埋置在基板内时,在上述半导体与上述基板之间不存在空隙。
14.根据权利要求8所述的半导体装置,其特征在于:
上述埋置绝缘树脂体和半导体的基板每一个都由无机填料和包含树脂的成分构成。
15.根据权利要求8所述的半导体装置,其特征在于:
形成于上述半导体上的突出电极用电镀形成。
16.根据权利要求8所述的半导体装置,其特征在于:
上述金属端子电极是铜箔,形成上述载片与上述金属端子电极之间的剥离层,上述剥离层是镀铬层。
17.一种半导体装置的制造方法,其特征在于:
包括:
使用在载片上形成了金属布线图形的转移材料、使该转移材料与电绝缘基板相接触和把上述金属布线图形埋入到上述基板内的工序;
准备增强上述金属布线图形与形成在半导体元件上的突出电极的连接部分的绝缘树脂体的工序;
剥离上述载片的剥离工序;以及
在通过上述剥离工序露出的上述金属布线图形上加热加压、经过绝缘树脂体使上述突出电极的前端接触上述金属布线图形和把上述布线图形与上述突出电极加热加压进行连接来挤压上述前端的半导体安装工序。
18.根据权利要求17所述的半导体装置的制造方法,其特征在于:
上述载片是金属片或者树脂片。
19.根据权利要求18所述的半导体装置的制造方法,其特征在于:
上述树脂片是从聚酰亚胺,聚对苯二甲酸乙脂,聚乙烯萘,聚苯撑硫,聚乙烯,聚丙烯以及氟树脂中选择出的至少一种树脂薄膜,金属片是铜箔。
20.根据权利要求19所述的半导体装置的制造方法,其特征在于:
上述载片是铜箔,金属布线图形是铜箔,上述载片与上述金属布线图形之间的剥离层用镀铬层形成。
21.根据权利要求17所述的半导体装置的制造方法,其特征在于:
包括在上述半导体安装工序以后把上述半导体元件埋置在以包含无机填料和树脂的组成构成的基板上的工序。
22.根据权利要求17所述的半导体装置的制造方法,其特征在于:
突出电极用电镀形成。
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Also Published As
Publication number | Publication date |
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US20030127725A1 (en) | 2003-07-10 |
TWI255001B (en) | 2006-05-11 |
TW200300991A (en) | 2003-06-16 |
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