CN1417861A - 用于大存储容量的3－d存储设备 - Google Patents

用于大存储容量的3－d存储设备 Download PDF

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Publication number
CN1417861A
CN1417861A CN02148159A CN02148159A CN1417861A CN 1417861 A CN1417861 A CN 1417861A CN 02148159 A CN02148159 A CN 02148159A CN 02148159 A CN02148159 A CN 02148159A CN 1417861 A CN1417861 A CN 1417861A
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CN
China
Prior art keywords
plane
memory
array
electrically connected
bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN02148159A
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English (en)
Chinese (zh)
Inventor
L·T·特兰
T·C·安东尼
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of CN1417861A publication Critical patent/CN1417861A/zh
Pending legal-status Critical Current

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0023—Address circuits or decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/50—Peripheral circuit region structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices
    • H10D88/01—Manufacture or treatment
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/71—Three dimensional array
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Dram (AREA)
CN02148159A 2001-10-31 2002-10-31 用于大存储容量的3－d存储设备 Pending CN1417861A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/984934 2001-10-31
US09/984,934 US6504742B1 (en) 2001-10-31 2001-10-31 3-D memory device for large storage capacity

Publications (1)

Publication Number Publication Date
CN1417861A true CN1417861A (zh) 2003-05-14

Family

ID=25531039

Family Applications (1)

Application Number Title Priority Date Filing Date
CN02148159A Pending CN1417861A (zh) 2001-10-31 2002-10-31 用于大存储容量的3－d存储设备

Country Status (6)

Country Link
US (1) US6504742B1 (enExample)
EP (1) EP1308958B1 (enExample)
JP (1) JP2003209222A (enExample)
KR (1) KR100895073B1 (enExample)
CN (1) CN1417861A (enExample)
DE (1) DE60208310T2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104584133A (zh) * 2012-08-29 2015-04-29 美光科技公司 存储器阵列平面选择

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WO2003073335A1 (en) 2002-02-28 2003-09-04 Riken Method and program for converting boundary data into in-cell shape
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US7129744B2 (en) * 2003-10-23 2006-10-31 Viciciv Technology Programmable interconnect structures
US7312109B2 (en) * 2002-07-08 2007-12-25 Viciciv, Inc. Methods for fabricating fuse programmable three dimensional integrated circuits
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US7112994B2 (en) 2002-07-08 2006-09-26 Viciciv Technology Three dimensional integrated circuits
US6992503B2 (en) * 2002-07-08 2006-01-31 Viciciv Technology Programmable devices with convertibility to customizable devices
US6747478B2 (en) * 2002-07-08 2004-06-08 Viciciv Field programmable gate array with convertibility to application specific integrated circuit
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US7064579B2 (en) * 2002-07-08 2006-06-20 Viciciv Technology Alterable application specific integrated circuit (ASIC)
US6856030B2 (en) * 2002-07-08 2005-02-15 Viciciv Technology Semiconductor latches and SRAM devices
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US7394680B2 (en) * 2003-03-18 2008-07-01 Kabushiki Kaisha Toshiba Resistance change memory device having a variable resistance element with a recording layer electrode served as a cation source in a write or erase mode
US7400522B2 (en) * 2003-03-18 2008-07-15 Kabushiki Kaisha Toshiba Resistance change memory device having a variable resistance element formed of a first and second composite compound for storing a cation
WO2004084229A1 (en) 2003-03-18 2004-09-30 Kabushiki Kaisha Toshiba Programmable resistance memory device
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JP4381743B2 (ja) 2003-07-16 2009-12-09 独立行政法人理化学研究所 境界表現データからボリュームデータを生成する方法及びそのプログラム
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KR100564611B1 (ko) * 2004-02-14 2006-03-29 삼성전자주식회사 하드 디스크 드라이브의 완충 구조체
US7112815B2 (en) 2004-02-25 2006-09-26 Micron Technology, Inc. Multi-layer memory arrays
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US7359279B2 (en) * 2005-03-31 2008-04-15 Sandisk 3D Llc Integrated circuit memory array configuration including decoding compatibility with partial implementation of multiple memory layers
JP4783100B2 (ja) 2005-09-12 2011-09-28 独立行政法人理化学研究所 境界データのセル内形状データへの変換方法とその変換プログラム
KR100855861B1 (ko) * 2005-12-30 2008-09-01 주식회사 하이닉스반도체 비휘발성 반도체 메모리 장치
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US7692951B2 (en) * 2007-06-12 2010-04-06 Kabushiki Kaisha Toshiba Resistance change memory device with a variable resistance element formed of a first and a second composite compound
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104584133A (zh) * 2012-08-29 2015-04-29 美光科技公司 存储器阵列平面选择
US9543003B2 (en) 2012-08-29 2017-01-10 Micron Technology, Inc. Memory array plane select
CN104584133B (zh) * 2012-08-29 2017-06-20 美光科技公司 存储器阵列平面选择

Also Published As

Publication number Publication date
US6504742B1 (en) 2003-01-07
DE60208310D1 (de) 2006-02-02
DE60208310T2 (de) 2006-07-27
EP1308958A2 (en) 2003-05-07
JP2003209222A (ja) 2003-07-25
EP1308958A3 (en) 2003-05-14
KR20030036028A (ko) 2003-05-09
KR100895073B1 (ko) 2009-04-27
EP1308958B1 (en) 2005-12-28

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WD01 Invention patent application deemed withdrawn after publication