CN1328709A - 运用共面波导和bga1/0的宽带rf端口结构 - Google Patents

运用共面波导和bga1/0的宽带rf端口结构 Download PDF

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CN1328709A
CN1328709A CN99809178A CN99809178A CN1328709A CN 1328709 A CN1328709 A CN 1328709A CN 99809178 A CN99809178 A CN 99809178A CN 99809178 A CN99809178 A CN 99809178A CN 1328709 A CN1328709 A CN 1328709A
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circuit package
substrate
described substrate
encapsulation
metallization
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D·F·杜里埃特
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MICRO-SUBSTRATE Co Ltd
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MICRO-SUBSTRATE Co Ltd
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Abstract

MMIC封装包括迹线图案(30,36,38),与所有过渡(70,72)处的阻抗匹配以增强信号传输并避免反射。

Description

运用共面波导和BGA I/O的宽带RF端口结构
发明背景
发明领域
本发明涉及微波电路(特别是在频带从20GHz或更高开始的范围内)封装件的领域。
现有技术
在个人通信业务的市场日益发展的今天，需要用于单片微波集成电路(MMIC)的廉价、宽带、表面装贴可靠和用户友好的封装件和其它器件。已在23、28、32和38Ghz的频率下应用此类技术，而且在未来的两年内可达到工业生产。还在60、70GHz或更高频率的情况下，应用此类技术。该应用的基础是砷化镓MMIC芯片。运用复杂的高度可靠的高成本封装来封装这种IC装置，上述封装设计用于少批量组装。
现有封装是表面安装的，但是大多有引线，并采用昂贵的材料。广泛的运用包括玻璃与金属密封件、多层陶瓷结构、机械加工金属壳或衬底、昂贵的合金(Cu-Mo，Kovar，CuW和其它)和相对厚的金电镀。
现有技术的封装将下列结构中的几种的组合用于它们的设计和构成：带状线、微带、共轴、伪同轴和共面波导传输线结构。因此，获得所需带宽的封装主要是经验猜测的结果(educated guessing)，而不是真正设计的结构。在授予C.Mattei等人的美国专利、授予P.T.Ho等人的美国专利号4,276,558、授予L.J.Moser的美国专利号5,014,115和授予Y.Kosugi等人的美国专利号5,450,046中描述了这些封装的例子。如今可用的一些真正的宽带封装(频率上至40Ghz，如同Dielectric Laboratories，Inc.生产的DiPak型号20001或者StratEdge的型号SEC-580234和SEC-580231)，构成复杂且昂贵。DLI的封装需要在母PC板上做一个洞，以及从包含IC的封装到母板表面的丝键合或带状连接。如熟悉本技术领域的人员已知，丝键合很脆弱，并需要保护它不受环境损坏。此外，必须精确地控制丝键合的长度以用于高频操作。上述事项都使得整个组件的成本提高。此外，传统附着和构成的丝键合使得电磁场分布和RF电流结构不连续。在现有技术的封装中需要“解除(tuned-out)”这些不连续以消除信号反射和损耗，否则它们会破坏封装的性能。
StratEdge封装具有用于安装的大接头或要求从封装到母PC板的丝键合。此外，这些封装占据大量母PC板的面积，这是不希望的。
由于所需的制造材料和精度，目前的宽带封装设计无助于高产量、标准化、小型化和可便携性同时保持低成本。
其它有限带宽的封装(诸如，Microsubstrates公司的Via/Pak 224Z，218Z和220A以及Kyocera公司的产品)，其特征与DL1和StratEdge的封装类似。
将MMIC从高成本的专业应用移到更主流的商业应用，现有的封装是远远不够的，因为单独封装和设有MMIC之后的封装的成本高、组装困难而且测试困难。必须克服上述缺点以满足现在对于微波无线应用(诸如PCS和LMDS)对低成本、小尺寸和便携性的要求。
本发明消除或大大缓解了上述封装的缺点和限制。
发明概述
本发明的MMIC封装克服或缓解了现有技术的上述和其它缺点和缺陷。
本发明的一个目的是提供一种有效的、损耗最小的MMCI封装以及与母PC板的连接。本发明采用共面波导RF端口结构，其中可预测它的性能(通过电磁计算机建模)并定义它的设计原则。
本发明的另一个目的是提供一种微波电路的低成本、表面安装的可靠封装，其上带宽频率主要受制于现有制造技术和工艺的能力。
本发明的再一个目的是提供一种微波电路封装，它的焊球格阵列(ballgrid array)或凸格阵列(bump grid array)(BGA)格式在大批量制造环境中有利于机械组装。
本发明的最后一个目的是提供一种微波电路封装，与现有技术的封装相比，它的尺寸小，而且重量轻。
熟悉本技术领域的人员通过阅读下列详细描述以及附能够理解本发明的上述和其它特征及优点。
附图描述
现在，参照附图，其中相同标号表示同样的元件：
图1是在PC板上带有MMIC芯片的封装衬底的分解示意图。
图2A是示出场线的本发明的共面波导结构的侧视图。
图2B是图2A结构的透视图。
图2C是本发明原理的示意透视图，其中不改变材料的介电常数。
图3示出本发明实际封装的透视图。
图4是对图3沿着剖面线4-4所得的剖面图。
图5是本发明一较佳实施例的透视图。
图5A是图5沿着剖面线5A-5A所得的剖面图。
图5B是图5沿着剖面线5B-5B所得的剖面图。
图5C是图5沿着剖面线5C-5C所得的剖面图。
图5D是图5沿着剖面线5D-SD所得的剖面图。
图5E是图5PC板的俯视图。
图5F是图5封装的仰视图。
图5G是图5封装的俯视图。
图6是材料介电常数变化的本发明原理的示意透视图。
图7是示出封装的介电常数高于PC板的情况的本发明的透视图。
图8是示出封装的电介常数低于PC板的情况的本发明的透视图。
图9示出MMIC装在凹处的本发明的实施例。
图9A是图9沿着剖面线9A-9A所得的剖面图。
图10A示出本发明封装的MMIC侧。
图10B示出本发明封装的PC板侧。
图10C是图10B沿着剖面线10C-10C的剖面图。
图11A是本发明另一个实施例的俯视图。
图11B是图11A实施例的仰视图。
图11C是图11A的侧视图。
图12是计算机模拟图11A-11C所示的封装得到的S11、S21对频率的布局的示图。
较佳实施例的详细描述
本发明针对将MMIC连接到母PC板，其中通过对在这两者之间传输的微波信号呈电气透明的方法来连接。获得电气透明度(electrical transparency)要求匹配母板中的传输路径的阻抗，上述路径通过在母板和封装衬底之间的I/O连接、通过衬底本身到其中安装MMIC的表面并通过连接(例如，丝键合、倒焊晶片(flip chip))到MMIC。通过提供其阻抗在所有过渡区(transitionarea)中都匹配的共面波导结构，获得电气透明度并因而实现本发明的目的。
在图1中示意地示出过渡区，其中10表示母板，12表示第一过渡区，14表示封装衬底，16表示第二过渡区(通过封装14)；18表示第三过渡区，20表示MMIC(单片微波集成电路)。
参照图2A、2B和2C示出的平面共面波导。图2B所示与本发明的封装相关。
在图2B中，中心道(center trace)30是信号导体，而在其另一侧的金属化(metalization)36、38是接地面。信号导体30与接地面导体36和38隔开，以控制电路的电感和电容。通过控制导体之间的间隔来控制那些参数是控制电路阻抗的一个因素，当然其最终目的是提供从MMIC到母PC板和背后的经匹配的阻抗通道。
在各导体(信号和地)中的RF电流在间隔44、46附近的窄区域中流动。对于信号导体30用标号32、34和对于各接地面导体36和38用标号40、42表示这些区域。在间隔44、46中，用箭头50和52表示空间电场结构。间隔44、46实质上是金属化中的间隙(gap)，它暴露了电介质材料。这导致电容和电感并当它通过时改变在导体30、36以及30、38之间产生的电场。
参照图2C，将平面共面波导的概念应用于多层结构。因为需要PC板10、封装14和MMIC20，所以多层结构对于MMIC封装是很典型的。工业上，这些元件由不同的制造商或部门制造。因此，MMIC不能简单地直接连接到母PC板。有大量过渡区(如图1和2所示)以及不同的材料特性待处理，而且截面尺寸对于保持阻抗匹配很关键且复杂。
图2C广泛和示意地示出了本发明不改变材料的介电常数的原理。如图所示，过渡区1和2是理想的、零厚度的导电材料层。这在实践中特别难实现，因为过渡区1在母PC板和封装衬底之间，过渡区2在封装衬底内发生。过渡区1的导体结构用于桥接母PC板和封装衬底之间的间隙(充斥着空气)，因此需要大的物理强度。图3和4示出本发明的实际实施例，其中以过渡区1薄而宽的导电短线(stub)以及在充斥着导电材料的封装衬底中窄而宽的槽来代替薄导电材料层。该结构十分接近于理想状态，是一较佳结构。
图3和4示出了母板60和目标10的介电常数相同且波导结构的两个过渡区十分接近于理想状态的情况。值得注意的是，在图3的表示中，使得过渡区理想的一个因素是充斥着导电材料的槽70和短线72，它们使与其接触的导体的宽度匹配(在母板上的30、36、38；在封装下侧的80、76、78；和在封装衬底60顶面上的90、86和88)。在过渡区接近于理想之处，例如信号导体90的长度可以很短。没有理想结构，必须保持某一Δl长度(如下讨论)以重新建立和稳定共面波电场结构。在该图中，介电常数没有变化使得可运用笔直的共面波导结构。
图3示出丝键合10，它比传统的丝键合更少电弧得多。这还大大减少了电场结构的畸变。在另一个实施例中，如下所述(参照图9)，可将芯片20理想地设置在与芯片一样高的凹口(recess)中，这使得芯片的顶面与衬底的顶面一样高。将芯片桥接到衬底60顶面的丝键合实际上可以是笔直的，这样便减小了电感。
在另一个较佳实施例中(图5-5G)，用焊球或焊台来代替短线72。焊球(或焊台)和槽偏离了图2C的理想结构；它们在电场(和磁场)空间结构中引入了轻微的不连续，即，轻微的阻抗失配。通过延迟中央导体30，当它从信号焊球和信号槽较佳的地露出一小段小于待发送最高频率波长的1/4长度时，可补偿该不连续。在图5中该特性标以Δl。
已知在沿着z方向传播TEM(横向电磁)模的任一传输线或波导结构中，可用下列等式描述特征阻抗： Z n = F ( x , y ) μ ‾
其中F(x，y)是依赖于波导剖面几何图形的横坐标的标量函数，而μ和ε分别是传播介质的磁导率和介电常数。实际上在所有情况下，自由空间的磁导率μ＝μo。因此，波导的特征阻抗与传播介质的介电常数的平方根成反比变化。
为了匹配建立在不同介电常数的材料上的两部分波导的阻抗，需要用等于介电常数之比的平方根的标量因子来调节剖面尺寸。于是，如果封装衬底是氧化铝，介电常数大约9，而且母PC板是由PTFE材料构成，介电常数大约为3，则母PC板波导剖面几何面积大于封装衬底的1.732倍(3的平方根)。
图5示出的丝键合100比传统丝键合少电弧得多。这还大大减小了电场结构的畸变。在另一个实施例中，如下所述(图9和9A)，可将芯片20理想地设置在最好与芯片一样高的凹口中。这使得芯片的顶面与衬底的顶面一样高。实际上，将芯片桥接到衬底60顶面的丝键合可以是笔直的，而且减小了电感。
参照图5和5A-G的实施例，示出本发明另一实施例的RF端口。较佳的是，封装衬底60是由全部烧结的高氧化铝材料(大约99.6％)构成。最好以二氧化碳或YAG激光在烧结的氧化铝中钻出狭槽70。通过现有技术用导电合成材料(诸如，铜-钨)填充狭槽。
使衬底的热膨胀系数与填充狭槽材料的热膨胀系数匹配以保持两种材料之间的密封性从而禁止杂质元素从外界进入封装是十分重要的。
通过利用汽相沉积或溅射的金属薄膜(诸如，钛和镍或其它适当的金属组合)使封装衬底金属化，可建立共面波导结构，从而能够良好地粘合在封装衬底上并具有良好的导电性。用已知的光致抗蚀剂-蚀刻工艺或者通过物理掩膜和金属汽相沉积产生电路图案。最好用薄金层来涂覆电路图案而为微波信号提供高导电性，这有益于降低功率损耗。该结构还可通过丝网印刷和烧结厚膜导电胶(paste)或油墨(ink)构成。
由通过焊锡或适当导电材料附在母板上的导电焊球或焊台将其面波导从封装的底表面连接到母板的共面波导。利用锡焊或铜焊(所用的材料的熔点高于用来将焊球连接到母板的焊锡的熔点)把焊球本身附在封装的底波导结构上。
母板本身由氧化铝、聚四氟乙烯合成物或其它绝缘材料构成，其损耗正切接近封装的频带宽度的0.0004。
图5至5G示出本发明的封装的较佳实施例的详细结构，具体如下：图5示出了在母PC板10上的共面波导的接地面38、36，其开口130延伸超过信号导体30的末端。在封装的共面波导结构下方没有母板接地面。该特征在封装结构中消除了由于存在接地面而引起的寄生阻抗。
图6示意示出本发明的共面波导电路如何补偿在每层封装中以及母PC板上的材料的介电常数的变化。为了简化由该附图提供的原理，已用在本发明的各层上简单延伸的金属化替代任何类种类的通道。于是，该附图特别适于示出信号导体30和间隙44和46的宽度变化，从而补偿第一层60和第二层62的材料的不同介电常数。通过对介电常数较低的材料扩充信号导体30和间隙44和46，整个阻抗在过渡区内保持匹配。
图7示出在母板上的共面波导结构，其中中心导体30宽度和在中心导体30和接地导体36、38之间的间隔大于封装底波导结构上的相应特征。特定结构避免阻抗在母板的介电常数低于封装衬底材料的介电常数时发生变化。一般，聚四氟乙烯合成物的介电常数是2.2-4，而氧化铝在9和10之间。在微波工程中已知以TEM模式操作的传输线(或波导)的特征阻抗与传播介质的介电常数的平方根成反比。结果，为了使封装衬底中的特征阻抗保持与母板中的相同，在母板中的共面波导的截面尺寸需要放大，如图7所示。当封装衬底的介电常数小于母板材料的介电常数时，情况相反，如图8所示。此外，在信号路径中插入另一个过渡区之前，需要提供某一波导长度来重新建立TEM传播模式。这在图5中所示，并将它标为Δl。Δl的长度小于导体中最高传播频率的波长的1/4。
图9示出本发明的一个实施例，其中如上所述采用共面波导结构，但是通过将芯片20放在凹口110中，还降低了封装的电感。通过如此放置凹口，丝键合100实际上是笔直的，如图9A所示。封装具有垂直长度更小的附加优点。
在本发明的另一个特定实施例中，图10A-C示出带有三个RF端口和三个DC端口的封装。图10A示出封装的MMIC侧，图10B示出封装的PC板侧。所有的焊球或焊台间隔与Δl的布局设计都避免了阻抗失配。
下面是根据本发明设计封装的一般规则：
由RF和DC端口的数量、要安装在封装上的MMIC的尺寸以及其它元件(分立的或集成的，诸如电容器、电阻器、电感器)所需的任何附加封装表面积确定整个封装的尺寸。
一般用于工业的封装RF端口特征阻抗是50欧姆。然而，还可用其它值。最佳的是，衬底材料大约是99.6％(或更高)氧化铝。要求是机械和热强度、电绝缘特性和低介电损耗。
根据期望的特征阻抗，需要在与狭槽的最小宽度、电路构图分辨率(线宽和间隔)、实际上可生产的焊球/焊台的最小直径相关的制造能力同共面波导的截面尺寸之间折中。由机械强度和成本之间的折中结果限定封装衬底厚度。一般最佳的是使衬底厚度最小，而且一般廉价地生产面板格式(例如，2”×2”衬底)的封装，但是当衬底做得越薄，则因薄衬底破坏而发生损耗的机会大大增加。于是，由于破坏所致的损耗使面板处理获得的成本优势无效。
一旦定义了RF端口的截面几何图形(信号导体宽度和间隔到接地导体的宽度)，如下加入其它参数：连接其波导结构的信号和接地导体处的封装的底侧和顶侧的狭槽的宽度，DC偏置的其它接地焊球和热学管理焊球。假设，导电结构具有无限的导电率，而且假设没有辐射损耗。于是，例如以SONETT软件包或其它市售的3-D电磁建模软件。对上述结构进行FEM建模，获得S11、S21参数的频率响应。如上所述，由于寄生谐振，使得在延伸到可接受限度以外的S11和S21对频率曲线中存在倾角和尖峰(dip and spike)。为了去除倾角和尖峰，必须改变焊球、狭槽和其它结构元件的大小和位置，直至获得满意的S11和S21曲线。已发现，在由模型预测的性能和用网络分析仪(设有适当设计的测试装置(fixture))测试的实际性能之间有着密切的联系。测试时实际封装由于辐射损耗、制造不完美等因素而表现出不太令人满意的性能，因此还需进一步调节。
为了获得成功的封装设计不能过分强调它，更加有效的是在建立和测试任何物理原型之前，用大量的FEM计算机建模来优化该设计。
图11A、11B和11C示出了实际操作封装设计，其频率性能频带从DC到45Ghz。选择共面波导结构的截面尺寸来产生50欧姆的特征阻抗。通过在衬底材料(99.6％氧化铝)、衬底厚度(保持尽可能高从而能够以2”×2”面板格式制造破坏最小)、现有激光器钻孔能力(0.004”宽的狭槽)和焊球大小(直径0.015”)处理能力之间小心折衷，可获得这些参数。这些参数和其它参数(诸如导体层厚度)以及热学管理中焊球群(claster)被输入有限元模型中并进行优化，以去除S11(回程损耗)和S21(插入损耗)对频率的曲线中的峰值和谷值。在封装的整个带宽内，这些参数的通常可接受值是：S11＝-1.0dB最大值(绝对值)，S21＝-15.0dB最小值(绝对值)。通过大量费时的计算机FEA电磁建模，可运用SONNET(市售的EM建模软件包)，获得优化。图12示出根据图11的建模封装的S11、S21对频率的曲线。
由于实际结构近似于理想的共面波导结构，可使封装性能的频率上限最大。显而易见的是，这有赖于可获得的材料性能和制造能力，即，较小厚度的衬底强度、更窄狭槽的衬底钻孔能力、用窄而宽的短线(stub)代替圆焊台以及使得实际结构在几何和材料性能上更接近理想结构的任何其它特征。
虽然上面示出和描述了较佳实施例，但是可进行各种修正和替换，而不偏离本发明的教义和范围。因此，应理解，通过举例描述本发明，并不是对它进行限制。

Claims (20)

1.一种电路封装，其特征在于，包括：
单片微波集成电路；
与所述电路电气连通的衬底；和
在所述衬底的至少一个主要表面上构图的金属化，所述金属化经构图成为共面波导。
2.如权利要求1所述的电路封装，其特征在于，所述封装还包括：
至少一个导电直通结构穿过所述衬底延伸，以将所述衬底至少一个主表面上的所述金属化电气连接到所述衬底的另一个主表面上的金属化。
3.如权利要求2所述的电路封装，其特征在于，所述金属化包括接地面和信号迹线，其中根据所述封装衬底的介电常数以及至少一个过渡，来调节每个信号迹线的长度、在所述信号迹线和所述接地面之间的未金属化间隔以及每个信号迹线的宽度。
4.如权利要求1所述的电路封装，其特征在于，所述衬底为陶瓷。
5.如权利要求4所述的电路封装，其特征在于，在将导电结构安装在所述衬底上之前烧制陶瓷。
6.如权利要求1所述的电路封装，其特征在于，所述衬底包括至少一个导电填充的狭槽。
7.如权利要求1所述的电路封装，其特征在于，把所述衬底可电气连接到具有至少一个导电短线的PC板。
8.如权利要求6所述的电路封装，其特征在于，所述至少一个狭槽是多个短线。
9.如权利要求7所述的电路封装，其特征在于，所述至少一个短线是多个短线。
10.如权利要求3所述的电路封装，其特征在于，当所述介电接触变低时，所述间隔和所述信号迹线变宽。
11.如权利要求3所述的电路封装，其特征在于，当所述介电接触变大时，所述间隔和所述信号迹线变窄。
12.如权利要求1所述的电路封装，其特征在于，由丝键合把所述芯片电气连接到所述衬底，所述丝键合避免电弧以减小阻抗。
13.如权利要求1所述的电路封装，其特征在于，所述衬底还包括用于至少一个MMIC的至少一个凹口，所述至少一个凹口的尺寸能够基本上容纳所述至少一个MMIC。
14.一种用来制造电路封装的方法，其特征在于，包括：
烧制衬底材料；
在所述衬底中产生直通结构特征；
用导电材料填充所述结构特征；
以选中的图案对所述衬底进行金属化，所述图案限定一共面波导；
把芯片电气附到所述衬底上；
把板连接器印刷在所述衬底上；
15.一种如权利要求14所述的用来制造电路封装的方法，其特征在于，所述直通结构特征是其大小基本上等于所述衬底上的金属化迹线的狭槽。
16.一种如权利要求14所述的用于制造电路封装的方法，其特征在于，所述板连接器是短线。
17.一种如权利要求14所述的用于制造电路封装的方法，其特征在于，所述板连接器是焊球。
18.一种用于制造如权利要求14所述的电路封装的方法，其特征在于，所述板连接器是焊台。
19.如权利要求1所述的电路封装，其特征在于，用至少一个导电焊球可将所述衬底电气连接到PC板。
20.如权利要求1所述的电路封装，其特征在于，用至少一个导电焊台可将所述衬底电气连接到PC板。
CN99809178A 1998-05-26 1999-05-13 运用共面波导和bga1/0的宽带rf端口结构 Pending CN1328709A (zh)

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CN102712520B (zh) * 2010-01-29 2016-06-01 E·I·内穆尔杜邦公司 由低温共烧陶瓷材料制造高频接收和/或发射装置的方法以及由其制造的装置
CN102544666A (zh) * 2010-10-21 2012-07-04 Jds尤尼弗思公司 宽带非共面馈通
CN102544666B (zh) * 2010-10-21 2016-06-15 朗美通运营有限责任公司 宽带非共面馈通
CN110120574A (zh) * 2018-02-06 2019-08-13 通用汽车环球科技运作有限责任公司 具有用于射频装置的共面波导至共面波导耦合器的窗组件
CN110120574B (zh) * 2018-02-06 2022-03-22 通用汽车环球科技运作有限责任公司 具有用于射频装置的共面波导至共面波导耦合器的窗组件
CN109449552A (zh) * 2018-12-18 2019-03-08 合肥本源量子计算科技有限责任公司 一种直流信号与微波信号合成装置
CN112563230A (zh) * 2020-11-20 2021-03-26 扬州船用电子仪器研究所(中国船舶重工集团公司第七二三研究所) 一种具有高频互联功能的bga陶瓷封装结构

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WO1999062135A1 (en) 1999-12-02
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