CN1312533C - 蚀刻方法及使用蚀刻方法的电路装置的制造方法 - Google Patents

蚀刻方法及使用蚀刻方法的电路装置的制造方法 Download PDF

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Publication number
CN1312533C
CN1312533C CNB2004100575819A CN200410057581A CN1312533C CN 1312533 C CN1312533 C CN 1312533C CN B2004100575819 A CNB2004100575819 A CN B2004100575819A CN 200410057581 A CN200410057581 A CN 200410057581A CN 1312533 C CN1312533 C CN 1312533C
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resist
residual region
conductive pattern
etching
conductive foil
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CN1591191A (zh
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森真也
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Sanyo Electric Co Ltd
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Sanyo Electric Co Ltd
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    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
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    • H05K2203/1476Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/202Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using self-supporting metal foil pattern

Abstract

一种提高蚀刻因数的蚀刻方法及使用该方法的电路装置的制造方法。本发明的蚀刻方法具有如下特征,首先,在作为被蚀刻材料的导电箔(11)表面涂敷抗蚀剂(10)。然后,通过使用曝光掩模14有选择地使抗蚀剂(10)曝光,从而有选择地使抗蚀剂变质。由此,形成剖面下部比上部大的残留区域的非曝光区域(10A)。然后,使用溶液清除除去残留区域的抗蚀剂(10),将残留区域作为掩模,蚀刻导电箔。

Description

蚀刻方法及使用蚀刻方法的电路装置的制造方法
技术领域
本发明涉及一种蚀刻方法及使用蚀刻方法的电路装置的制造方法,特别是涉及一种提高蚀刻因数的蚀刻方法及使用该方法的电路装置的制造方法。
背景技术
参照图11说明现有的蚀刻方法。
参照图11(A),在衬底102的表面形成有导电箔101。然后,在导电箔表面涂敷蚀刻用抗蚀剂100,以覆盖导电箔101的表面。
参照图11(B),通过曝光掩模(未图示)有选择地使抗蚀剂100曝光。在此,抗蚀剂100是阴型抗蚀剂,在对应作为导电图案残留的区域的抗蚀剂100上有选择地照射光线103。
参照图11(C),通过使用化学药剂溶化,有选择地使先前工序中照射光线的位置以外区域的抗蚀剂100剥离。然后,参照图11(D),以残留的抗蚀剂100为掩模,进行蚀刻。其结果是,有选择地除去导电箔101,形成导电图案103。在此,由于蚀刻采用在大致各向同性下进行的湿蚀法,故导电图案103的剖面形成圆锥形状。
参照图11(E)说明蚀刻因数。在此,设导电图案103侧面在最内侧侵蚀的位置和抗蚀剂上侧端部的距离为a1。另外,设导电箔101在纵向方向侵蚀的深度(即,在此是导电图案103的厚度)为t。在该条件下,蚀刻因数Ef由(Ef=t/a1)表示。即表示,若该蚀刻因数值大,则被蚀刻的材料的侧面腐蚀量小,可以进行精细加工。另外,这样的蚀刻方法应用于印刷线路板或电路装置等的制造方法中。
发明内容
但是,在所述的蚀刻方法中,有蚀刻因数值变小的问题。即,进行蚀刻而产生的向侧面方向的侵蚀大,导电图案的剖面形成下部扩展的形状。这阻碍了导电图案的细微化。另外,导电图案的剖面变小,有电流容量变小的问题。
本发明是鉴于以上问题点而开发的,其主要目的在于,提供提高蚀刻因数的蚀刻方法及使用该方法的电路装置的制造方法。
本发明的蚀刻方法具有如下工序:在被蚀刻材料表面形成抗蚀剂的工序;通过使用曝光掩模有选择地曝光所述抗蚀剂,而有选择地使所述抗蚀剂变质,形成剖面下部比上部大的残存区域的工序;使用溶液清除除去所述残留区域的所述抗蚀剂的工序;以所述残留区域为掩模,蚀刻所述被蚀刻材料的工序,所述残留区域的侧面包含相对于所述被蚀刻材料的表面大致垂直的垂直面和以下部扩展的方式从所述垂直面向外侧延伸的倾斜面。
另外,在本发明的蚀刻方法中,所述抗蚀剂是阴型抗蚀剂,通过使光线照射对应该阴型抗蚀剂的所述残留区域的区域,由透过所述阴型抗蚀剂并由所述被蚀刻材料表面反射的所述光线使所述残留区域的剖面下部比其上部大。
另外,在本发明的蚀刻方法中,所述抗蚀剂是阳型抗蚀剂,通过使光线照射该阳型抗蚀剂的去除区域,并且照射所述去除区域周边部的所述光线在所述抗蚀剂途中衰减,使所述残留区域的剖面下部比其上部大。
本发明电路装置的制造方法具有如下工序:准备导电箔的工序;在所述导电箔表面形成抗蚀剂的工序:通过使用曝光掩模选择地曝光所述抗蚀剂,而有选择地使所述抗蚀剂变质,形成剖面下部比上部大的残存区域的工序;使用溶液清除除去所述残留区域的所述抗蚀剂的工序;以所述残留区域为掩模,蚀刻所述导电箔,形成导电图案的工序;在所述导电图案上配置电路元件的工序;形成覆盖所述电路元件的密封树脂的工序,所述残留区域的侧面包含相对于所述被蚀刻材料的表面大致垂直的垂直面和以下部扩展的方式从所述垂直面向外侧延伸的倾斜面。
另外,在本发明的电路装置的制造方法中,通过所述蚀刻在所述导电图案相互之间形成比所述导电箔浅的分离槽,在形成所述密封树脂的工序中,将所述密封树脂填充入所述分离槽内,并直至填充入所述分离槽内的所述密封树脂露出,除去所述导电箔背面。
另外,在本发明的电路装置的制造方法中,所述抗蚀剂是阴型抗蚀剂,通过使光线照射对应该阴型抗蚀剂的所述残留区域的区域,由透过所述阴型抗蚀剂并由所述导电箔表面反射的所述光线使所述残留区域的剖面下部比其上部大。
另外,在本发明的电路装置的制造方法中,所述抗蚀剂是阳型抗蚀剂,通过使光线照射该阳型抗蚀剂的去除区域,并且照射所述去除区域周边部的所述光线在所述抗蚀剂途中衰减,使所述残留区域的剖面下部比其上部大。
另外,在本发明的电路装置的制造方法中,所述导电箔含有通过绝缘层层积的多层导电箔,并形成多层的所述导电图案。
附图说明
图1是表示本发明蚀刻方法的流程图;
图2(A)~图2(C)是表示本发明蚀刻方法的剖面图;
图3(A)~图3(C)是表示本发明蚀刻方法的剖面图;
图4(A)~图4(C)是表示本发明蚀刻方法的剖面图;
图5(A)~图5(C)是表示本发明电路装置的制造方法的剖面图;
图6(A)~图6(C)是表示本发明电路装置的制造方法的剖面图;
图7(A)~图7(C)是表示本发明电路装置的制造方法的剖面图;
图8(A)~图8(D)是表示本发明电路装置的制造方法的剖面图;
图9(A)~图9(D)是表示本发明电路装置的制造方法的剖面图;
图10(A)~图10(B)是表示本发明电路装置的制造方法的剖面图;
图11(A)~图11(E)是表示现有的蚀刻方法的剖面图。
具体实施方式
(说明蚀刻方法的第一实施例)
首先,参照图1的流程图说明本发明蚀刻方法的概要。
首先,在步骤S1中,收入被蚀刻的材料(被蚀刻材料)。在此,收入的材料采用由金属构成的导电箔、通过绝缘层层积导电箔的层积片、在表面粘附有导电箔的衬底等。然后,在步骤S2中,作为前处理,除去附着在被蚀刻材料表面的尘埃或油脂成分。
在步骤S3中,在被蚀刻材料表面形成抗蚀剂。该抗蚀剂的形成可通过液状抗蚀剂涂敷或片状抗蚀剂(DFR)的叠片来进行。在此使用的抗蚀剂可为阴型抗蚀剂或阳型抗蚀剂的任何一种。在步骤S4中,有选择地进行涂敷的抗蚀剂的曝光。然后,在步骤S5中,使用蚀刻剂有选择地进行抗蚀剂的蚀刻,之后,在步骤S6中,进行抗蚀剂的硬化。在此,省略进行抗蚀剂硬化的步骤S6也可构成本发明。
在步骤S7中,使用抗蚀剂液进行将残留的抗蚀剂作为蚀刻掩模使用的被蚀刻材料的蚀刻。然后,在步骤S8中,进行使用溶液的抗蚀剂的剥离,在步骤S9中,进行被蚀刻材料的水洗干燥并完成蚀刻工序。在此,步骤S9的工序也可编入步骤S8中同时地进行。
该流程图右侧所示的流程表示用于所述的步骤S5的曝光掩模的制造工序的流程图。在步骤S10中,得到用户的型号和图样后,进行电路的设计。在步骤S11中,使用CAD(Computer Aided Desigh)等根据电路进行导电图案的设计。在步骤S12中,使用绘图装置绘制导电图案。在步骤S13中,透过对应导电图案的区域或除去导电图案的区域,形成曝光掩模。
以上是本发明蚀刻工序的概略。其次,参照图2~图4详细说明图案形成抗蚀剂的工序(步骤S5~步骤S6)。首先,参照图2及图3说明使抗蚀剂曝光的工序。
参照图2说明进行作为阴型抗蚀剂的抗蚀剂10曝光的方法。阴型抗蚀剂由溶于碱溶液的材料构成,照射光线的部分具有不溶性的性质。
参照图2(A),在衬底12表面形成有作为被蚀刻材料的导电箔11,在导电箔11表面涂敷有抗蚀剂10。在此,采用阴型抗蚀剂作为抗蚀剂10,也可以采用阳型抗蚀剂代替阴型抗蚀剂。
参照图2(B),使用曝光掩模14,有选择地使抗蚀剂10曝光。具体地说,使对应作为导电图案而残留的区域的抗蚀剂10曝光,其它区域遮光。即,将抗蚀剂10的曝光区域10B保留,由显影的工序除去非曝光区域10A。除去非曝光区域10A的具体方法是,首先,通过将抗蚀剂10浸入显影液中,使非曝光区域10A膨润,然后,使用水压除去膨润的非曝光区域10A。
曝光掩模14具有作为基材的玻璃和形成于该玻璃表面上的曝光图案15。在此,基材也可以采用由树脂等构成的薄膜状薄板。即,形成曝光图案15,以对应有选择地剥离的区域。因此,通过将这样的结构的曝光掩模14置于抗蚀剂10上方并自上方照射光线13,可仅在形成导电图案的区域的抗蚀剂10上有选择地照射光线13。在此,曝光图案相互之间分开的距离为L1。
图2(C)是图2(B)的放大图,表示曝光区域10B的具体的剖面形状。向抗蚀剂10的曝光区域10B照射的光线13的一部分透过抗蚀剂10到达导电箔11的表面。然后,光线13通过导电箔11的表面反射。特别是在作为曝光区域10B周边部的区域A1,面向外侧,向斜上方反射光线13。由反射的光线13的分量也使区域A1曝光。因此,曝光区域10B的剖面具有其下部比上部更大的下部扩展的剖面。也就是说,曝光区域10B的剖面的下底的长度比上底长。
使区域A1曝光的具体方法是用于增加通过抗蚀剂10的分量,而增强光线13的强度的方法。通过该方法,可使更多的光线13的分量透过抗蚀剂10并由导电箔11表面反射,使区域A1曝光。另外,可通过采用对于光线13具有高透过性的材料作为抗蚀剂10,来达到相同的效果。
其次,参照图3详细说明采用阳型抗蚀剂作为抗蚀剂10时的曝光方法。阳型抗蚀剂具有对显影液不溶解的性质,曝光的区域变质从而溶于显影液中。
参照图3(A),在形成于衬底12表面的导电箔11的表面涂敷阳型抗蚀剂10。
参照图3(B),使用曝光掩模14进行抗蚀剂10的曝光。在所述的图2(B)及其说明中,使预定残留的抗蚀剂10的区域曝光,在此,使除去的区域的抗蚀剂10曝光。即,使未形成导电图案的区域的抗蚀剂10曝光变质。因此,在曝光掩模14上形成与预定形成的导电图案相同形状的曝光图案15。
参照图3(C)详细说明非曝光区域10A。在此,将未照射光线13的非曝光区域10A作为蚀刻掩模保留。因此,在部分地除去的区域的抗蚀剂10(曝光区域10B)上照射光线13。在曝光区域10B的周边部,光线13未到达抗蚀剂10的下部。即,曝光区域10B周边部的下方未曝光、变质。因此,非曝光区域10A的剖面形状和图2(C)所示的曝光区域10B相同。即,非曝光区域10A的剖面的下部比上部大。
具体地说,未使区域A1曝光的方法是将光线13的照射量减少的方法。由此,特别是在曝光区域10B的周边部减少光线13的照射,可减少到达区域A1的光线13的量。另外,其它方法有将抗蚀剂10的遮光性增大的方法,该方法也可以达到所述的效果。另外,将曝光时间缩短也可以达到所述效果。
在所述说明中,主要通过显影条件来说明形成具有褶边的剖面形状的抗蚀剂的方法。但是,改变其它蚀刻条件也可以形成具有褶边的剖面形状的抗蚀剂。作为其它方法,考虑改变显影液浓度的第一方法和改变显影液的种类的第二方法。
作为改变显影液浓度的第一方法,具体地说,是使在抗蚀剂10的显影中使用的显影液的浓度比通常的浓度更浓的方法。通常的显影液是向纯水中以1%的比例溶入碳酸钠(Na2CO3)的溶液或向纯水中以1%的比例溶入有机胺的溶液。通过使该浓度变浓,可急剧地融化或膨润抗蚀剂10。因此,可将残留的抗蚀剂10的剖面形状形成下部扩展的形状。
改变显影液的种类的第二方法是代替碳酸钠使用有机胺系溶液的方法。有机胺系的水溶液比碳酸钠的水溶液侵蚀性强。因此,抗蚀剂10的剖面形状可形成下部扩展的剖面形状。
参照图4详细说明显影工序。
参照图4(A),通过进行显影而形成抗蚀剂10的图案。具体地说,通过使曝光的抗蚀剂10显影,而使对应预定形成导电图案的区域的抗蚀剂10残留,而除去其它区域的抗蚀剂10。其可通过将抗蚀剂10浸渍入碱性溶液中进行。因此,在图2(B)所示的抗蚀剂10中残留曝光区域10B,在图3(B)所示的抗蚀剂10中残留非曝光区域10A。
其次,参照图4(B),将残留的抗蚀剂10作为蚀刻掩模使用,通过进行导电箔导11的蚀刻形成图案6。在此,利用在各向同性下进行的湿蚀法形成图案16。因此,将各图案16分离。
参照图4(C)说明由所述工序形成的图案的剖面形状。利用湿蚀法形成的图案16的侧面构成圆锥结构。即,图案16具有下底比上底长的矩形形状的剖面。在此,设抗蚀剂10的上部端部和图案16的上部端部的距离为a2。然后,设自图案16下端至图案上端的距离(厚度)为t。这样,蚀刻因数Ef由(Ef=t/a2)表示。
在此,当观察抗蚀剂10的剖面时,在其下部形成有下部扩展的区域A1。即,当与图11(E)的现有例比较时,抗蚀剂10的下侧端部,仅向外部伸出下部扩展的区域A1的宽度d。因此,抗蚀剂上侧端部和图案16上侧端部的距离a2仅缩小区域A1的宽度d。因此,在此的蚀刻因数Ef得到对应d的宽度的增加的数值。即,通过各向同性蚀刻将图案16的侧部与现有例相同程度地形成圆锥形状。但是,通过区域A1的伸出可使抗蚀剂10的上侧端部和图案10的上侧端部的相对横向的距离接近。其可使蚀刻因数提高,并可提高细微化。
通常提高细微化是通过进行曝光图案14的曝光掩模15的细微化来进行。具体地说,在抗蚀剂10为阴型时,通过将曝光图案的宽度L2变窄来达到其细微化。因此,在利用该方法而推行细微化中,用于改善曝光图案16的描绘装置需要大量的成本。所述的本发明的方法不需要那样大量的成本即可推行细微化。即,通过在不改变曝光图案15的宽度的同时在抗蚀剂10下部形成区域A1来使图案16相互之间的间隔变窄。另外,由于可将图案16的剖面积增大,故可将电流容量增大。
(说明电路装置制造方法的第二实施例)
以下,参照图5介绍多种使用所述的蚀刻方法制造的电路装置。参照图5说明本发明的电路装置20的结构。图5(A)~图5(C)是各形态电路装置的剖面图。
参照图5(A),本发明的电路装置20A由以下部分构成:导电图案21;通过焊锡固定于导电图案21上的电路元件22;作为电连接导电图案21和外部的连接装置的外部电极27。
导电图案21由铜等金属构成,使其背面露出并装入密封树脂28中。另外,各导电图案21通过分离槽29电分离,在该分离槽29中填充有密封树脂28。导电图案21的侧面形成弯曲状,提高导电图案21和密封树脂28的结合。
分离槽29具有电分离各导电图案21的功能。另外,该分离槽通过所述的蚀刻方法形成。因此,相对其深度方向的长度可将宽度变窄。即,可将导电图案21相互之间的间隔变窄。另外,由于将导电图案21的宽度加宽可增大剖面面积,故可增大电路容量。
在此,电路元件22由半导体元件22A及芯片元件22B构成。另外,电路元件可采用LSI芯片、裸晶体管芯片、二极管等有源元件,还可采用芯片电阻、芯片电容等无源元件。具体的安装结构为半导体元件22A的背面固定于由导电图案21形成的焊盘上。而且,半导体元件22A的表面电极和导电图案21介由金属细线25电连接。芯片元件22B的两端电极通过焊锡固定在导电图案21上。
密封树脂28由通过注射模具形成的热塑性树脂或通过转换模具形成的热硬性树脂构成。而且,密封树脂28具有密封整体的作用,同时还具有机械地支承整体的作用。外部电极27由焊锡构成,并形成在导电图案21的背面。
参照图5(B),该图所示的电路装置20B的基本结构和所述的电路装置20A相同,不同点是具有支承衬底31。
支承衬底31采用放热性优良、机械强度好的材料。在此,可采用金属衬底、印刷衬底、挠性衬底、复合衬底等。另外,采用由金属等导电性材料构成的衬底时,在其表面设置绝缘层来达到与导电图案21的绝缘。
第一导电图案21A及第二导电图案21B形成在支承衬底31的表面及背面。然后,贯穿支承衬底31,将第一导电图案21A和第二导电图案21B电连接。另外,在第二导电图案21B上形成外部电极27。在此,由于第一及第二导电图案21A、21B通过所述的蚀刻方法形成,故可将图案之间的宽度变窄,并可促进细微化。
参照图5(C),在电路装置20C中,导电图案21具有多层的布线结构。具体地说,由第一导电图案21A和第二导电图案21B构成的两层导电图案通过由树脂构成的绝缘层32层积。在此,也可进一步构成三层以上的布线结构。然后,贯穿绝缘层32,将第一导电图案21A和第二导电图案21B电连接。在此,第一及第二导电图案21A、21B也可以利用所述的蚀刻方法形成。因此,可将图案之间的宽度变窄,并可促进细微化。
以下,参照图6以后的附图,说明由图5说明的结构的电路装置的制造方法。首先,参照图6~图7说明图5(A)所示的结构的电路装置20A的制造方法。
首先,参照图6(A),准备由铜等金属构成的导电箔30。然后,如图6(B)所示,在形成导电图案的位置形成抗蚀剂PR。然后,通过由湿蚀法除去从抗蚀剂PR露出的导电箔30的表面,从而形成分离槽29。通过形成分离槽29,使各导电图案21形成凸状。在此,因为抗蚀剂PR具有所述下部扩展的剖面形状,故可提高蚀刻因数。
参照图6(C),通过焊锡等接合材料将半导体元件22A及芯片元件22B固定在希望的导电图案21上。另外,介由金属细线25将半导体元件22A的表面电极及导电图案21电连接。
其次,参照图7(A),形成密封树脂28,以填充分离槽29并覆盖电路元件。形成该密封树脂28可通过使用热硬性树脂的转换模具或使用热塑性树脂的注射模具进行。
其次,参照图7(B),通过自背面全面地除去导电箔30,使背面露出填充入分离槽29内的密封树脂28。然后,将各导电图案21电分离。另外,通过形成抗蚀剂26及外部电极27,完成图7(C)所示的电路装置。
参照图8~图10说明图5(C)所示的电路装置20C的制造方法。首先,参照图8(A),准备通过绝缘层22层积第一导电箔33及第二导电箔34的层积片。
其次,参照图8(B),通过有选择地除去第一导电箔33形成通孔35。其可通过使用抗蚀剂10的湿蚀法进行。在此使用的抗蚀剂10通过所述的蚀刻方法形成,并具有下部扩展的剖面形状。因此,可形成更细微的通孔35,并可进一步减小通孔35占据的面积。因此,可使用其它区域作为形成导电图案的区域,并可提高布线密度。另外,可使装置整体的小型化。
接着,参照图8(C),通过除去通孔35下方部分的绝缘层22,使通孔35到达第二导电箔34的表面。除去该绝缘层22可使用二氧化碳激光进行。之后,通过剥离抗蚀剂10,得到图8(D)所示的剖面结构。然后,参照图9(A),通过构成由铜等金属构成的电镀膜,在通孔35中形成连接部35电连接第一导电箔33和第二导电箔34。
参照图9(B),为蚀刻第一导电箔33及第二导电箔34,在两导电箔的表面有选择地形成抗蚀剂10。由于形成该抗蚀剂10采用第一实施方式说明的方法,故其具有下部扩展的剖面形状。
参照图9(C),通过湿蚀法形成第一导电图案21A及第二导电图案21B。如上所述,由于抗蚀剂10具有下部扩展的剖面形状,故可形成细微化的导电图案。通过除去抗蚀剂10得到图9(D)所示的剖面形状。
其次,参照图10(A),在第一导电图案21A上固定半导体元件22A及芯片元件22B。然后,参照图10(B),形成覆盖半导体元件22A及芯片元件22B的密封树脂28。另外,通过进行背面的处理,完成图5(C)所示的电路装置。
根据本发明,形成具有下部扩展的剖面形状的抗蚀剂,使用该抗蚀剂为蚀刻掩模进行非蚀刻材料的湿蚀刻。因此,可改善蚀刻因数,还可使通过蚀刻形成的导电图案的细微化。

Claims (8)

1、一种蚀刻方法,其特征在于,包括:在被蚀刻材料表面形成抗蚀剂的工序;通过使用曝光掩模有选择地曝光所述抗蚀剂,从而有选择地使所述抗蚀剂变质,形成剖面下部比上部大的残存区域的工序;使用溶液清除除去所述残留区域的所述抗蚀剂的工序;将所述残留区域作为掩模,蚀刻所述被蚀刻材料的工序,所述残留区域的侧面包含相对于所述被蚀刻材料的表面大致垂直的垂直面和以下部扩展的方式从所述垂直面向外侧延伸的倾斜面。
2、如权利要求1所述的蚀刻方法,其特征在于,所述抗蚀剂是阴型抗蚀剂,通过使光线照射对应该阴型抗蚀剂的所述残留区域的区域,由透过所述阴型抗蚀剂并由所述被蚀刻材料表面反射的所述光线使所述残留区域的剖面下部比其上部大。
3、如权利要求1所述的蚀刻方法,其特征在于,所述抗蚀剂是阳型抗蚀剂,通过使光线照射该阳型抗蚀剂的去除区域,并且照射所述去除区域周边部的所述光线在所述抗蚀剂途中衰减,使所述残留区域的剖面下部比其上部大。
4、一种电路装置的制造方法,其特征在于,包括:准备导电箔的工序;在所述导电箔表面形成抗蚀剂的工序;通过使用曝光掩模有选择地曝光所述抗蚀剂,而有选择地使所述抗蚀剂变质,形成剖面下部比上部大的残存区域的工序;使用溶液清除除去所述残留区域的所述抗蚀剂的工序;以所述残留区域为掩模,蚀刻所述导电箔,形成导电图案的工序;在所述导电图案上配置电路元件的工序;形成覆盖所述电路元件的密封树脂的工序,所述残留区域的侧面包含相对于所述被蚀刻材料的表面大致垂直的垂直面和以下部扩展的方式从所述垂直面向外侧延伸的倾斜面。
5、如权利要求4所述的电路装置的制造方法,其特征在于,通过所述蚀刻在所述导电图案相互之间形成比所述导电箔浅的分离槽,在形成所述密封树脂的工序中,将所述密封树脂填充入所述分离槽内,并直至填充入所述分离槽内的所述密封树脂露出,除去所述导电箔背面。
6、如权利要求4所述的电路装置的制造方法,其特征在于,所述抗蚀剂是阴型抗蚀剂,通过使光线照射对应该阴型抗蚀剂的所述残留区域的区域,由透过所述阴型抗蚀剂并由所述导电箔表面反射的所述光线使所述残留区域的剖面下部比其上部大。
7、如权利要求4所述的电路装置的制造方法,其特征在于,所述抗蚀剂是阳型抗蚀剂,通过使光线照射该阳型抗蚀剂的去除区域,并且照射所述去除区域周边部的所述光线在所述抗蚀剂途中衰减,使所述残留区域的剖面下部比其上部大。
8、如权利要求4所述的电路装置的制造方法,其特征在于,所述导电箔含有通过绝缘层层积的多层导电箔,并形成多层的所述导电图案。
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