JP2006073984A - 抵抗内蔵型プリント基板およびその製造方法 - Google Patents
抵抗内蔵型プリント基板およびその製造方法 Download PDFInfo
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- H01C17/06—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base
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- H01C17/06513—Precursor compositions therefor, e.g. pastes, inks, glass frits characterised by the resistive component
- H01C17/0652—Precursor compositions therefor, e.g. pastes, inks, glass frits characterised by the resistive component containing carbon or carbides
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- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/167—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/0502—Disposition
- H01L2224/05023—Disposition the whole internal layer protruding from the surface
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05568—Disposition the whole external layer protruding from the surface
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09509—Blind vias, i.e. vias having one side closed
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09645—Patterning on via walls; Plural lands around one hole
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- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0047—Drilling of holes
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/005—Punching of holes
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
【解決手段】回路パターンが形成された多数の回路層と、前記多数の回路層間にそれぞれ位置する多数の絶縁層と、閉曲線の断面を有し、前記閉曲線の断面が前記多数の回路層の一回路層からほかの回路層まで伸び、前記閉曲線断面の内部空間が抵抗物質で充填され、前記閉曲線断面の一側とこれと対向する前記閉曲線断面の他側に対応する内壁が導電性物質で鍍金されている内蔵型抵抗とを含んでなる。
【選択図】図5
Description
110、210、310 原板
111、211、311 絶縁樹脂層
112、112′、212、212′、312、312′ 銅箔層
220、220′、320、320′、420、420′、520、520′ 絶縁層
230、230′、330、330′ 銅箔
140、140′、240、240′、340、340′、440、440′、540、540′ 銅鍍金層
150、250、350 抵抗物質
160、160′、260a、260a′、260b、260b′、360a、360a′、360b、360b′ ドライフィルム
1100、1200、1300、1300′、1400、1400′ 内蔵型抵抗
A1、A2、A3、A4、A5 ビアホール
B1、B2、B3、B4、B5 抵抗物質充填部
C、C′ ビアホールのウィンドウ
Claims (12)
- 回路パターンが形成された多数の回路層と、
前記多数の回路層間にそれぞれ位置する多数の絶縁層と、
閉曲線の断面を有し、前記閉曲線の断面が前記多数の回路層の一回路層からほかの回路層まで伸び、前記閉曲線断面の内部空間が抵抗物質で充填され、前記閉曲線断面の一側とこれと対向する前記閉曲線断面の他側に対応する内壁が導電性物質で鍍金されている内蔵型抵抗とを含んでなることを特徴とする抵抗内蔵型プリント基板。 - 前記内蔵型抵抗の閉曲線が断面トラック形状であり、前記トラック形状において、対向する断面半円形の弧部に対応する前記内蔵型抵抗の内壁が導電性物質で鍍金されていることを特徴とする請求項1に記載の抵抗内蔵型プリント基板。
- 前記内蔵型抵抗の閉曲線が断面亜鈴形状であり、前記亜鈴形状において、対向する断面円形の弧部に対応する前記内蔵型抵抗の内壁が導電性物質で鍍金されていることを特徴とする請求項1に記載の抵抗内蔵型プリント基板。
- 前記内蔵型抵抗の閉曲線の断面が半円の突出した長方形であり、前記半円の直径は半円が突出した前記長方形の辺より小さく、前記半円が突出した長方形において、互いに反対側に位置する前記半円に対応する前記内蔵型抵抗の内壁が導電性物質で鍍金されていることを特徴とする請求項1に記載の抵抗内蔵型プリント基板。
- 前記抵抗物質がカーボン系レジスタペーストであることを特徴とする請求項1ないし4のいずれか1項に記載の抵抗内蔵型プリント基板。
- 前記導電性物質が銅(Cu)であることを特徴とする請求項1ないし4のいずれか1項に記載の抵抗内蔵型プリント基板。
- (A)原板に多数のビアホールを形成し、前記原板の外層および前記ビアホールの内壁に銅鍍金層を形成する段階と、
(B)前記多数のビアホールのうち、少なくとも二つのビアホール間を除去して抵抗物質充填部を形成し、前記抵抗物質充填部に抵抗物質を充填する段階と、
(C)前記銅鍍金層の形成された原板の外層に所定の回路パターンを形成する段階とを含んでなることを特徴とする抵抗内蔵型プリント基板の製造方法。 - 前記(B)段階の後、(D)前記多数のビアホールにそれぞれ充填された前記抵抗物質が均一な抵抗値を有するように、前記原板の外層より突出した前記抵抗物質を除去する段階をさらに含むことを特徴とする請求項7に記載の抵抗内蔵型プリント基板の製造方法。
- 前記(B)段階において、前記多数のビアホールの少なくとも二つのビアホール間を除去して抵抗物質充填部を形成する過程が、CNCドリル(Computer Numerical Control drill)方式、ルータドリル(router drill)方式および金型パンチング方式の少なくとも一つの方式を用いて、前記多数のビアホールの少なくとも二つのビアホール間を除去することで、抵抗物質充填部を形成することを特徴とする請求項7に記載の抵抗内蔵型プリント基板の製造方法。
- 前記(B)段階において、前記抵抗物質に抵抗物質を充填する過程が、スクリーン印刷方式により前記抵抗物質充填部に抵抗物質を充填することを特徴とする請求項8に記載の抵抗内蔵型プリント基板の製造方法。
- 前記(D)段階が、バフを用い、前記原板の外層より突出した前記抵抗物質を除去することを特徴とする請求項9に記載の抵抗内蔵型プリント基板の製造方法。
- 前記抵抗物質がカーボン系レジスタペーストであることを特徴とする請求項7ないし11のいずれか1項に記載の抵抗内蔵型プリント基板の製造方法。
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KR1020040069626A KR100598274B1 (ko) | 2004-09-01 | 2004-09-01 | 저항 내장형 인쇄회로기판 및 그 제조 방법 |
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WO2012140964A1 (ja) * | 2011-04-14 | 2012-10-18 | 株式会社村田製作所 | 電子部品内蔵フレキシブル多層基板 |
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US20060213686A1 (en) * | 2004-12-28 | 2006-09-28 | Shin-Hsien Wu | Cut Via Structure For And Manufacturing Method Of Connecting Separate Conductors |
KR100762447B1 (ko) * | 2006-03-23 | 2007-10-02 | 주식회사 코리아써키트 | 임베디드 레지스터 인쇄회로기판의 제조방법 |
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KR100771307B1 (ko) | 2006-08-18 | 2007-10-29 | 삼성전기주식회사 | 인쇄회로기판 |
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JP2000340956A (ja) | 1999-05-31 | 2000-12-08 | Matsushita Electric Ind Co Ltd | 多層配線基板 |
JP3459380B2 (ja) | 1999-06-30 | 2003-10-20 | 日本特殊陶業株式会社 | プリント配線板の製造方法及びマスク |
JP2001015920A (ja) | 1999-06-30 | 2001-01-19 | Toshiba Corp | 多層プリント配線板及びその製造方法 |
US6541137B1 (en) * | 2000-07-31 | 2003-04-01 | Motorola, Inc. | Multi-layer conductor-dielectric oxide structure |
US6284982B1 (en) * | 2000-08-18 | 2001-09-04 | Ga-Tek Inc. | Method and component for forming an embedded resistor in a multi-layer printed circuit |
JP2002064274A (ja) | 2000-08-21 | 2002-02-28 | Toppan Printing Co Ltd | ビアホール構造とその形成方法およびこれを用いた多層配線基板 |
US7260890B2 (en) * | 2002-06-26 | 2007-08-28 | Georgia Tech Research Corporation | Methods for fabricating three-dimensional all organic interconnect structures |
JP4126985B2 (ja) | 2002-07-29 | 2008-07-30 | 凸版印刷株式会社 | 受動素子内蔵プリント配線板及びその製造方法 |
KR100754065B1 (ko) * | 2003-11-05 | 2007-08-31 | 삼성전기주식회사 | 매립된 저항을 갖는 인쇄회로기판 제조 방법 |
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2004
- 2004-09-01 KR KR1020040069626A patent/KR100598274B1/ko not_active IP Right Cessation
- 2004-12-22 US US11/022,074 patent/US7277005B2/en not_active Expired - Fee Related
- 2004-12-22 JP JP2004371951A patent/JP2006073984A/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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WO2012140964A1 (ja) * | 2011-04-14 | 2012-10-18 | 株式会社村田製作所 | 電子部品内蔵フレキシブル多層基板 |
Also Published As
Publication number | Publication date |
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KR20060020908A (ko) | 2006-03-07 |
US20060049913A1 (en) | 2006-03-09 |
KR100598274B1 (ko) | 2006-07-07 |
US7277005B2 (en) | 2007-10-02 |
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