CN1305119C - 成膜方法和成膜装置 - Google Patents

成膜方法和成膜装置 Download PDF

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CN1305119C
CN1305119C CNB028164822A CN02816482A CN1305119C CN 1305119 C CN1305119 C CN 1305119C CN B028164822 A CNB028164822 A CN B028164822A CN 02816482 A CN02816482 A CN 02816482A CN 1305119 C CN1305119 C CN 1305119C
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circulus
process chamber
excite
film formation
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三好秀典
杉浦正仁
柏木勇作
香川惠永
太田与洋
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Abstract

将由分子内具有环状结构的化合物构成的处理气体导入至处理室(12)内。另一方面，利用激发器(34)激发氩等激发用气体，并导入至处理室(12)内，激发处理气体。被激发的处理气体堆积在被处理基板(19)上，形成在膜中具有环状结构的多孔质低介电常数膜。

Description

成膜方法和成膜装置
技术领域
本发明涉及用于形成具有规定的介质特性的膜的成膜方法和成膜装置。
背景技术
近来，以半导体装置的高速化和小型化要求为背景，希望半导体元件作成多层及线路作得很细。例如，对于0.15μm以下的设计规则来说，具有多层结构的线路的信号传播速度延迟，不能达到所希望的高速化。为了防止随着线路的微细化而造成延迟增大，使用电介质常数低的层间绝缘膜是有效的。
从这样的观点出发，研究目前各种绝缘膜形成材料。其中，通过在膜中形成原子水平的空孔，实现比材料固有的介电常数低的介电常数的多孔质膜引人注目。
作为形成多孔质低介电常数膜的方法，开发了以具有环状结构的原料作为出发物质、形成绝缘膜的方法。环状结构由于其内部本质上有空孔，可以在维持环状结构的状态下，通过使多个原料分子结合，形成多孔质膜。这种方法例如在A.Grill等人在Mat.Res.Soc.Symp.Proc.Vol.565(107)1999年发表的文章中作了说明。
在这种方法中，具有环状结构的原料，例如利用热灯丝或作为平行平板型的等离子体，直接被激发，进行膜的形成反应。
例如，在使用环状硅氧烷分子作原料的情况下，通过使构成环状部分的硅原子的侧链部分活性化，例如，通过使甲基的碳-氢键分离，而互相结合。由于甲基的碳-氢键比硅-碳或硅-氧键的分解能低。因此，在环状结构分解时优先分解。这样，在维持环状结构的状态下，可形成膜。
但是，如上所述，在作为平行平板型的等离子体直接激发的情况下，赋予原料的激发能比较大。由于这样，在原料激发时，不仅是所希望的活性部分，而且必要的环状结构容易被破坏，因此，使形成的膜中的环状结构减少。环状结构越少，则膜的空孔度越低，得不到所希望的低的介电常数。
这样，在目前的直接激发具有环状结构的出发原料而形成膜的方法中，激发时环状结构容易丧失，因此，难以得到所希望的低的介电常数，这是一个问题。
发明内容
考虑到上述的问题，本发明的目的是要提供一种可以形成介电常数低的绝缘膜的成膜方法和成膜装置。
为了达到上述目的，本发明的第一个观点的成膜方法的特征在于，其包括：
将被处理基板配置在处理室内的工序；
将包含具有环状结构的物质的处理气体、导入上述处理室内的处理气体导入工序；和
将用于激发上述处理气体用的激发用气体以激发状态导入至上述处理室内的激发用气体导入工序。
可以在上述激发用气体导入工序中，导入上述激发用气体的等离子体。
还可以具有在上述被处理基板上施加偏压的工序。
为了达到上述目的，本发明的第二个观点的成膜装置的特征在于，其包括：
在内部配置被处理基板的处理室；
将包含具有环状结构的物质的处理气体、导入上述处理室内的处理气体导入部；和
将用于激发上述处理气体的激发用气体以激发状态导入至上述处理室内的激发用气体导入部。
还可以具有设置于上述处理室的外部并生成上述激发用气体的等离子体的等离子体生成部。
还可以具有用于在上述被处理基板上施加偏压的电压施加部。
上述处理气体，可以由含有至少是环状硅氧烷结构、环状硅氨烷结构或有机环状结构中的任何一种的物质构成，作为环状结构。
上述激发用气体可以含有氩、氖、氙、氢、氮、氧和甲烷中至少任一种。
附图说明
图1是表示本发明的实施方式的成膜装置的结构的图。
具体实施方式
以下，参照附图来说明本发明实施方式的成膜方法和制造装置。
在本实施方式中，以采用由环状硅化合物构成的出发物质、在半导体基板等被处理基板上形成多孔质硅绝缘膜的情况作为例子来说明。
图1表示本实施方式的成膜装置11的结构。
如图1所示，本实施方式的成膜装置11具有处理室12、排气部13、处理气体供给部14、激发气体供给部15和系统控制器100。
处理室12形成为大致圆筒形，其内部表面由经过氧化铝膜处理的铝等构成。
在处理室12的大致中央，从底部立起一个大致为圆筒形的载物台16。
在载物台16的上部配置静电夹具17。静电夹具17的结构是，用氧化铝等介电体17b覆盖钨等的电极板17a。
介电体17b内部的电极板17a与直流电源18连接，施加规定电压的直流电压。被处理基板19放置在静电夹具17上。根据施加在电极板17a上的电压，在介电体17b的表面上产生电荷，另一方面，在介电体17b上的被处理基板19的背面，产生与上述电荷性相反的电荷。由此，在介电体17b和被处理基板19之间形成静电力(库仑力)，被处理基板19被吸附保持在介电体17b上。
电极板17a还与高频电源20连接，施加规定频率(例如2MHz)的高频电压。在电极板17a上施加规定的偏压例如-300V～-20V左右的电压。在此，偏压是为了将处理活性种有效地吸附在被处理基板19上而施加的。
在载物台16的内部，埋入由电阻体等构成的加热器21。加热器21，接受从未图示的加热器电源供给的电力，将载物台16上的被处理基板19加热至规定温度。
加热温度设定为可抑制在被处理基板19的表面和所形成的膜的界面附近产生的热应力、可促进在基板表面产生的膜形成的必要的温度。例如，加热温度可设定在从室温至400℃的温度范围内。根据所使用的材料、膜厚等，温度可进行适当地改变。
此时，当加热温度太高时，膜中的环状结构分解，当加热温度过低时，由于热应力的原因，会在形成于半导体基板的表面附近的膜中产生裂纹等。
排气部13具有真空泵22，将处理室12内减压至规定的真空度。真空泵22通过流量调节阀24，与设置在处理室12底部的排气口23连接。流量调节阀24由APC等构成，利用其开度调节处理室12内的压力。真空泵22例如可根据所希望的压力范围从回转泵、油扩散泵、涡轮分子泵、分子阻力泵等中选择任何一种，或者将它们组合构成。
另外，真空泵22与除害装置25连接，将排出的气体中的有害物质进行无害化处理后排出。
在处理室12的顶部设置贯通顶部的处理气体供给口26。处理气体供给口26与后述的处理气体供给部14连接，处理气体通过处理气体供给口26供给至处理室12内。
处理气体供给口26与设置在处理室12的顶部的喷头27连接。喷头27具有中空部27a和多个气体孔27b。
中空部27a设置在喷头27的内部，接受从处理气体供给口26供给的处理气体。气体孔27b与中空部27a连通，设置成朝向载物台16。从处理气体供给口26供给的处理气体，在中空部27a中扩散，从多个气体孔27b向着被处理基板19喷出。
处理气体供给部14具有原料供给源28、供给控制部29和气化室30。
原料供给源28供给由具有环状结构的硅化合物构成的出发原料。作为可以使用的硅化合物，例如可举出硅氧烷化合物、硅氨烷化合物和在硅烷中结合有机环基构成的硅烷化合物等。
环状硅氧烷化合物是构成硅氧烷骨架的硅具有甲基或乙烯基作为侧链的化合物。作为环状硅氧烷化合物来说，可举出六乙基环三硅氧烷、六甲基环三硅氧烷、八苯基环四硅氧烷、四乙基环四硅氧烷、八甲基环四硅氧烷、1，3，5-三甲基-1，3，5-三乙烯基环三硅氧烷，1，3，5，7-四甲基环四硅氧烷、1，3，5，7-四乙烯基-1，3，5，7-四甲基环四硅氧烷。
环状硅氨烷化合物是构成硅氨烷骨架的硅具有甲基或乙烯基作为侧链的化合物。作为环状硅氨烷化合物来说，可举出1，1，3，3，5，5-六甲基环三硅氨烷、1，2，3，4，5，6-六甲基环三硅氨烷、八甲基环四硅氨烷、1，3，5，7-四乙基-2，4，6，8-四甲基环四硅氨烷、1，3，5，7-四乙烯基-2，4，6，8-四甲基环四硅氨烷、1，2，3-三乙基-2，4，6-三甲基环三硅氨烷、1，2，3-三乙烯基-1，3，5-三甲基环三硅氨烷。
硅烷化合物，除了有机环基以外，还有以甲基、乙烯基等作为侧链并可以摇动的化合物。作为硅烷化合物来说，例如可举出(环己烯氧基)三甲基硅烷、环戊基三甲氧基硅烷、二甲基硅-11-冠-4、二甲基硅-14-冠-5、二甲基硅-17-冠-6、二甲基硅-20-冠-7、1，1-二甲基-1-硅-2-氧杂环己烷、苯乙基三甲氧基硅烷。
作为这些以外的环状硅化合物来说，例如可举出3-苯基庚甲基三硅氧烷、二乙烯基硅氧烷苯并环丁烯(DVS-BCB)。
甲基的碳-氢键或乙烯基的碳-碳双键，与构成环状结构的硅-氧键、硅-氮键、硅-碳键相比较，分离能量较低。因此，通过赋予较低的激发能量，可以减少环状结构的分解，并可以激发甲基、乙烯基等。借助于已激发的甲基、乙烯基等，原料互相结合，由此可形成较多地维持环状结构的多孔质低介电常数的膜。
如后所述，在本实施方式中，通过与激发气体的等离子体接触，间接地激发原料(处理气体)。因此，可以以比较低的能量激发由上述材料构成的处理气体，形成环状结构含有率高的多孔质膜。
再者，所形成的膜的空孔度由原料的分子结构(特别是环状结构)决定。因此，通过适当地选择原料，可以得到具有所希望的低介电特性的绝缘膜。
供给控制部29控制从原料供给源28供给的原料物资。上述的环状硅化合物，通常在大气环境下为液体或固体。供给控制部29在原料为固体的情况下可以使用规定形式的定量供料器等，而在原料为液体的情况下，可以使用齿轮泵等。供给控制部29，每单位时间，将规定量的原料供给至后述的气化室30中。
气化室30具有加热器、加热灯等加热机构，由可加热内部的容器构成。气化室30的内部加热至由原料供给部供给的固体或液体的原料进行气化的温度(沸点或升华温度)以上的温度。气化室30通过质量流量控制器(MFC)31，与处理气体供给口26连接。在气化室30中，原料(环状硅化合物)被气化，由MFC31控制为规定的流量，供给至处理室12内。
在处理室12的侧壁上，设置激发气体供给口32。激发气体供给口32，例如设置有两个，在处理室12的侧壁上相对置。再者，激发气体供给口32也可设置三个以上。激发气体供给口32分别与后述的激发气体供给部15连接。
激发气体供给部15具有激发气体源33和激发器34。
激发气体源33，将用于激发(活性化)上述出发物质气体的激发气体供给至处理室12内。作为激发气体来说，只要能激发所使用的处理气体的物质就可以，可从氩(Ar)、氖(Ne)、氙(Xe)、氢(H2)、氮(N2)、氧(O2)、甲烷(CH4)等中选择。
激发器34通过MFC35与激发气体源33连接。激发器34具有图中没有示出的等离子体发生机构，在其内部，使通过的激发气体活性化，产生等离子体。具有激发器34的等离子体生成机构例如可以生成磁控管型、ECR型、ICP型、TCP型、螺旋波型等的等离子体。
激发器34的排气端与激发气体供给口32连接，生成的激发气体等离子体，通过激发气体供给口32，供给至处理室12内。等离子体含有自由基、电离离子等的高能量活性种。
成膜处理时，将处理气体和激发气体等离子体供给至处理室12内。作为处理气体的环状硅化合物，被激发气体的等离子体中所含的自由基等活性种激发，如以下所详细说明的那样，在被处理基板19的表面上形成聚合膜。
系统控制器100是具有MPU(微处理部件)、存储器等的微型计算机控制装置。系统控制器100将根据处理顺序控制处理装置的动作的程序，存储在存储器中，根据该程序将控制信号传送至处理装置的排气部13、处理气体供给部14和激发气体供给部15等各部分。
下面，说明上述结构的成膜装置11的动作。在以下所示的例子中，以使用化学式1所示的八甲基环四硅氧烷作为出发原料、形成硅绝缘膜的情况进行说明。另外，对使用Ar作为激发气体的情况进行说明。
(化学式1)
首先，将被处理基板19放置在载物台16上，由静电夹具17固定。然后，系统控制器100利用排气部13将处理室12内调整至规定的压力例如1.3Pa～1.3kPa(10mTorr～10Torr)左右。
另一方面，系统控制器100利用加热器21将被处理基板19加热至规定温度例如100℃左右，将偏压施加在被处理基板19上。
接着，系统控制器100开始从处理气体供给部14和激发气体供给部15将处理气体和激发气体供给至处理室12内。各气体按规定流量供给至处理室12内。当然，从处理气体供给源将八甲基环四硅氧烷气体供给至处理室12内。
接着，系统控制器100将激发器34接通。由此，将激发气体即Ar的等离子体供给至处理室12内。在所生成的等离子体中含有Ar自由基、Ar离子等的高能量活性种。
这些活性种在处理室12内与处理气体(八甲基环四硅氧烷)混合，与处理气体分子等进行冲突，将该处理气体分子活性化(激发)。通过与激发气体等离子体的接触，在处理室12内生成处理气体的自由基、离子等。
在处理期间，利用电极板17a将规定的偏压例如-100V左右施加在被处理基板19上，所生成的处理气体的离子等的活性种，被吸附在被处理基板19的表面上。通过吸附在被处理基板19的表面上并且进行加热，可进行如下所示的在被处理基板19的表面上形成膜的反应。
首先，通过与Ar自由基等活性种的接触，主要激发八甲基环四硅氧烷分子中的键分离能量低的键。即，分子侧链甲基的碳-氢键最容易被激发(容易分离)，生成例如下述化学式2所示的八甲基环四硅氧烷的自由基。另外，还生成氢的正离子与甲基结合的正离子等。
(化学式2)
所生成的八甲基环四硅氧烷的自由基等的活性种，利用偏压吸附在被处理基板19的表面上。所吸附的活性种，主要与被激发的侧链部分结合，形成例如化学式3所示的聚合体。
(化学式3)
Figure C0281648200131
通过侧链彼此结合，如化学式3所示的那样，在膜中保持环状结构的状态下形成膜。在环状结构的内部有空孔。另外，由于利用环状结构的立体障碍的大小，在其周围形成空孔，因此，所形成的膜的空孔度高，可构成多孔质低介电常数的膜。
如上所述，通过激发环状硅化合物，可以形成多孔质膜。这里，处理气体是利用在处理室12的外部生成的激发用气体的等离子体、“间接地”被激发的。
因此，赋予处理气体的激发能量较低，可抑制侧链部分以外的激发。即，例如与在处理室12内部生成并激发处理气体的等离子体的情况相比，可以抑制环状结构的分解和破坏，在所形成的膜中，可以保持更多的环状结构。这样，可以形成介电常数更低的多孔质绝缘膜。
如上所述，进行膜形成反应，在被处理基板19的表面上形成规定厚度的膜。系统控制器100，在形成具有所希望的膜厚例如400nm(4000
Figure C0281648200132
)左右的绝缘膜的时间内，结束成膜处理。系统控制器100断开激发器34，接着，停止向处理室12供给处理气体。然后，在规定时间内，用没有激发的激发气体清洗处理室12内，停止偏压的施加加热器21的加热。最后，将被处理基板19从处理室12搬出，以上就结束成膜工序。
如上所述，在本实施方式中，通过与在处理室12外部激发的激发用气体相接触混合，可间接地激发由环状化合物构成的处理气体。这样，间接地激发处理气体，可用较低的激发能量进行激发。
因为激发能量低，所以可以抑制环状结构的破坏，并同时进行膜形成反应。由此，可以形成膜中环状结构含有较多的所谓低介电常数多孔质膜。
本发明不限于上述实施方式，其应用及变形等可任意进行。
在上述实施方式中，在载物台16中埋入加热器21，加热被处理基板19。但是，加热方法不限于此，也可以使用热壁型、灯加热型等任意的加热方法。
在上述实施方式中，激发气体是作为等离子体激发的。但是，激发气体的激发方法不限于此，例如，将用热灯丝等激发的激发气体导入处理室12内也可以。
在上述实施方式中，使用环状硅氧烷化合物、环状硅氨烷化合物或结合有环状有机基的硅烷化合物，形成至少包含硅和碳的膜(SiC、SiCN、SiOC等)。但是，所用的物质和膜种，不限于上述例子。
例如，使用上述硅烷类化合物和氟类气体(例如CF4、CClF3、SiF4等)，使用含有氧的气体的等离子体进行活性化，由此，可以形成膜中有环状结构的SiOF膜。另外，本发明对于SiN、SiOCN、SiON或SiOx膜的成膜也适用。
产业上的可利用性
本发明在半导体装置等电子器件的制造中是有用的。
本发明基于在2001年8月30日提出的日本国发明专利申请2001-261443号，包括其说明书、权利要求书、说明书附图和说明书摘要。本说明书中包含了上述申请公开的全部，以供参考。

Claims (16)

1.一种成膜方法，其特征在于：包括：
将被处理基板(19)配置在处理室(12)内的工序；
将包含具有环状结构的物质的处理气体导入至所述处理室(12)内的处理气体导入工序；
在离开所述处理室(12)的位置激发用于激发所述处理气体的激发用气体、并将该激发状态的激发用气体导入至所述处理室(12)内的激发用气体导入工序；和
在所述处理室(12)内、利用所述激发用气体间接地激发所述处理气体的间接激发工序。
2.如权利要求1所述的成膜方法，其特征在于：在所述激发用气体导入工序中，导入所述激发用气体的等离子体。
3.如权利要求1所述的成膜方法，其特征在于：还包括在所述被处理基板(19)上施加偏压的工序。
4.如权利要求2所述的成膜方法，其特征在于：还包括在所述被处理基板(19)上施加偏压的工序。
5.一种成膜装置，其特征在于：包括：
在内部配置被处理基板(19)的处理室(12)；
将包含具有环状结构的物质的处理气体导入至所述处理室(12)内的处理气体导入部(26)；
将用于激发所述处理气体的激发用气体激发成规定激发状态的、离开所述处理室(12)地配置的激发器(34)；和
将利用所述激发器(34)激发的所述激发用气体以能够间接地激发所述处理气体的激发状态导入至所述处理室(12)内的激发用气体导入部(32)。
6.如权利要求5所述的成膜装置，其特征在于：所述激发器(34)具有等离子体发生机构，由该等离子体发生机构激发所述激发用气体。
7.如权利要求5所述的成膜装置，其特征在于：还包括用于在所述被处理基板(19)上施加偏压的电压施加部(20)。
8.如权利要求6所述的成膜装置，其特征在于：还包括用于在所述被处理基板(19)上施加偏压的电压施加部(20)。
9.如权利要求5所述的成膜装置，其特征在于：所述处理气体，作为环状结构，至少由含有环状硅氧烷结构、环状硅氨烷结构或有机环状结构中的任意一种的物质构成。
10.如权利要求6所述的成膜装置，其特征在于：所述处理气体，作为环状结构，至少由含有环状硅氧烷结构、环状硅氨烷结构或有机环状结构中的任意一种的物质构成。
11.如权利要求7所述的成膜装置，其特征在于：所述处理气体，作为环状结构，至少由含有环状硅氧烷结构、环状硅氨烷结构或有机环状结构中的任意一种的物质构成。
12.如权利要求8所述的成膜装置，其特征在于：所述处理气体，作为环状结构，至少由含有环状硅氧烷结构、环状硅氨烷结构或有机环状结构中的任意一种的物质构成。
13.如权利要求5所述的成膜装置，其特征在于：所述激发用气体包含氩、氖、氙、氢、氮、氧和甲烷中的至少任一种。
14.如权利要求6所述的成膜装置，其特征在于：所述激发用气体包含氩、氖、氙、氢、氮、氧和甲烷中的至少任一种。
15.如权利要求7所述的成膜装置，其特征在于：所述激发用气体包含氩、氖、氙、氢、氮、氧和甲烷中的至少任一种。
16.如权利要求8所述的成膜装置，其特征在于：所述激发用气体包含氩、氖、氙、氢、氮、氧和甲烷中的至少任一种。
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Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI282124B (en) * 2002-11-28 2007-06-01 Tosoh Corp Insulating film material containing an organic silane compound, its production method and semiconductor device
WO2005053009A1 (ja) * 2003-11-28 2005-06-09 Nec Corporation 多孔質絶縁膜及びその製造方法並びに多孔質絶縁膜を用いた半導体装置
TW200527536A (en) 2004-02-13 2005-08-16 Matsushita Electric Ind Co Ltd Method for forming organic/inorganic hybrid insulation film
US7129187B2 (en) * 2004-07-14 2006-10-31 Tokyo Electron Limited Low-temperature plasma-enhanced chemical vapor deposition of silicon-nitrogen-containing films
US8513448B2 (en) 2005-01-31 2013-08-20 Tosoh Corporation Cyclic siloxane compound, a material for forming Si-containing film, and its use
EP1845100A4 (en) 2005-01-31 2010-06-02 Tosoh Corp CYCLIC SILOXANE COMPOUND, FILMOGENIC MATERIAL CONTAINING SILICON AND USE THEREOF
FR2887891B1 (fr) * 2005-07-01 2007-09-21 Commissariat Energie Atomique Materiau a base de polysiloxane et a faible hysteresis de mouillage et procede de depot d'un tel materiau.
JP2007165717A (ja) * 2005-12-15 2007-06-28 Tokyo Electron Ltd 成膜方法及び成膜装置
WO2007080944A1 (ja) * 2006-01-13 2007-07-19 Tokyo Electron Limited 多孔質膜の成膜方法およびコンピュータ可読記録媒体
US8790785B2 (en) 2006-07-21 2014-07-29 Renesas Electronics Corporation Method of forming a porous insulation film
JP4743229B2 (ja) * 2008-05-29 2011-08-10 国立大学法人東北大学 中性粒子を用いた半導体装置の成膜方法
TW201131651A (en) 2009-10-05 2011-09-16 Univ Tohoku Low dielectric constant insulating film
JP5164078B2 (ja) * 2009-10-05 2013-03-13 国立大学法人東北大学 低誘電率絶縁膜
JP5164079B2 (ja) * 2009-10-21 2013-03-13 国立大学法人東北大学 低誘電率絶縁膜の形成方法
US10832904B2 (en) 2012-06-12 2020-11-10 Lam Research Corporation Remote plasma based deposition of oxygen doped silicon carbide films
US10325773B2 (en) 2012-06-12 2019-06-18 Novellus Systems, Inc. Conformal deposition of silicon carbide films
US9234276B2 (en) 2013-05-31 2016-01-12 Novellus Systems, Inc. Method to obtain SiC class of films of desired composition and film properties
US9371579B2 (en) * 2013-10-24 2016-06-21 Lam Research Corporation Ground state hydrogen radical sources for chemical vapor deposition of silicon-carbon-containing films
JP6345010B2 (ja) * 2014-07-10 2018-06-20 キヤノン株式会社 インクジェット記録ヘッド用基板の製造方法
US20160314964A1 (en) 2015-04-21 2016-10-27 Lam Research Corporation Gap fill using carbon-based films
US10840087B2 (en) 2018-07-20 2020-11-17 Lam Research Corporation Remote plasma based deposition of boron nitride, boron carbide, and boron carbonitride films
WO2020081367A1 (en) 2018-10-19 2020-04-23 Lam Research Corporation Doped or undoped silicon carbide deposition and remote hydrogen plasma exposure for gapfill

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09223693A (ja) * 1995-12-11 1997-08-26 Sony Corp シリコン化合物系絶縁膜の成膜方法
CN1164125A (zh) * 1996-02-20 1997-11-05 株式会社日立制作所 等离子体处理方法和装置

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4863755A (en) * 1987-10-16 1989-09-05 The Regents Of The University Of California Plasma enhanced chemical vapor deposition of thin films of silicon nitride from cyclic organosilicon nitrogen precursors
US4883686A (en) * 1988-05-26 1989-11-28 Energy Conversion Devices, Inc. Method for the high rate plasma deposition of high quality material
WO2004089046A1 (ja) * 1991-11-05 2004-10-14 Nobumasa Suzuki 無端環状導波管を有するマイクロ波導入装置及び該装置を備えたプラズマ処理装置
US5976992A (en) * 1993-09-27 1999-11-02 Kabushiki Kaisha Toshiba Method of supplying excited oxygen
JPH07115091A (ja) * 1993-10-18 1995-05-02 Sony Corp 半導体装置における絶縁膜形成方法及びｃｖｄ装置
JP2899600B2 (ja) * 1994-01-25 1999-06-02 キヤノン販売 株式会社 成膜方法
US5846649A (en) * 1994-03-03 1998-12-08 Monsanto Company Highly durable and abrasion-resistant dielectric coatings for lenses
US5888593A (en) * 1994-03-03 1999-03-30 Monsanto Company Ion beam process for deposition of highly wear-resistant optical coatings
DE19581590T1 (de) * 1994-03-25 1997-04-17 Amoco Enron Solar Erhöhung eines Stabilitätsverhaltens von Vorrichtungen auf der Grundlage von amorphem Silizium, die durch Plasmaablagerung unter hochgradiger Wasserstoffverdünnung bei niedrigerer Temperatur hergestellt werden
KR100207444B1 (ko) * 1995-03-14 1999-07-15 윤종용 반도체 장치의 고유전막/전극 및 그 제조방법
US6143081A (en) * 1996-07-12 2000-11-07 Tokyo Electron Limited Film forming apparatus and method, and film modifying apparatus and method
US6028012A (en) * 1996-12-04 2000-02-22 Yale University Process for forming a gate-quality insulating layer on a silicon carbide substrate
US6303523B2 (en) * 1998-02-11 2001-10-16 Applied Materials, Inc. Plasma processes for depositing low dielectric constant films
US6413583B1 (en) * 1998-02-11 2002-07-02 Applied Materials, Inc. Formation of a liquid-like silica layer by reaction of an organosilicon compound and a hydroxyl forming compound
US6660656B2 (en) * 1998-02-11 2003-12-09 Applied Materials Inc. Plasma processes for depositing low dielectric constant films
US6583048B2 (en) * 2001-01-17 2003-06-24 Air Products And Chemicals, Inc. Organosilicon precursors for interlayer dielectric films with low dielectric constants
US6936551B2 (en) * 2002-05-08 2005-08-30 Applied Materials Inc. Methods and apparatus for E-beam treatment used to fabricate integrated circuit devices
US7867923B2 (en) * 2007-10-22 2011-01-11 Applied Materials, Inc. High quality silicon oxide films by remote plasma CVD from disilane precursors

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09223693A (ja) * 1995-12-11 1997-08-26 Sony Corp シリコン化合物系絶縁膜の成膜方法
CN1164125A (zh) * 1996-02-20 1997-11-05 株式会社日立制作所 等离子体处理方法和装置

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