CN1254858C - 具有集成电路的电子芯片组件及其制造方法 - Google Patents
具有集成电路的电子芯片组件及其制造方法 Download PDFInfo
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- CN1254858C CN1254858C CNB018130070A CN01813007A CN1254858C CN 1254858 C CN1254858 C CN 1254858C CN B018130070 A CNB018130070 A CN B018130070A CN 01813007 A CN01813007 A CN 01813007A CN 1254858 C CN1254858 C CN 1254858C
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- Die Bonding (AREA)
Abstract
本发明涉及一种电子芯片组件及其制造方法,半导体芯片(1)中具有集成电路(6)并且半导体芯片(1)的活性表面(3)上具有各接触面(2),在集成电路(6)的各接触面(2)上具有一种由压合接触材料构成的接触层(7),并且其突出于集成电路(6)最上方的非导电层的位准之上,半导体芯片(1)的活性表面被一种适应于该接触层高度的可熔合粘合层(9)覆盖。
Description
技术领域
本发明涉及一种具有集成电路的电子芯片组件及其制造方法。
背景技术
集成电路可使用于许多情况中,其中在极端情况下须对在半导体芯片以及外部电路载体的接触连接面之间的连接位置的品质与可靠性设定不同的要求,例如,其应如何用在电信中,航空和宇航中,交通技术中和医药技术中。具有集成电路(其在高温或低温时不一定具有抗温度切换性或在高温时不一定具有储存性)的芯片组件属于“低技术”芯片组件,必须用廉价的方法取代其应用在传统芯片组件中的高成本的连接技术。
发明内容
本发明的目的是使连接技术简化并且在连接芯片组件及芯片载体时使成本下降。
本发明的一个技术方案是一种具有集成电路的电子芯片组件,其在半导体芯片的活性表面上具有各接触面,各接触面使集成电路与电路载体连接,一最上方的非导电层被淀积在该半导体芯片的活性表面上,所述接触面被该最上方的非导电层围住并与该最上方的非导电层隔开,所述接触面的位准低于该最上方的非导电层,其特征在于,具有一压合接触面并包括一压合接触材料的接触层被淀积在集成电路的接触面上,该压合接触面大于半导体芯片的活性表面上的接触面,该压合接触面突出于集成电路的最上方的非导电层的位准之上,该半导体芯片的活性表面被一种适应该接触层位准的可熔合的粘合层覆盖,该可熔合的粘合层在所述压合接触面之间具大于所述压合接触面上的厚度。
本发明的另一个技术方案是一种电子芯片组件的制造方法,其特征在于以下各步骤:选择性地将一种由压合接触材料构成的接触层施加于具有许多集成电路的半导体芯片的接触面上,用以制成加高的压合接触面,其中,该压合接触面被淀积在集成电路的接触面上,该压合接触面大于半导体芯片的活性表面上的接触面;将一种适应接触层高度的可熔合性粘合层施加于半导体芯片的表面上。将半导体芯片划分成单个的电子芯片组件,其具有已划分的集成电路的压合接触面,该可熔合性粘合层在所述压合接触面之间具有大于所述压合接触面上的厚度。
根据本发明,电子芯片组件在半导体芯片中具有一种集成电路,其在其活性表面上具有一接触面,各接触面使集成电路与外部的电路载体连接。因此,各接触面相对于集成电路最上方的非导电层的高度具有一种接触层,其通过压接接触材料而构成且突出于最上方的非导电层的高度上方。此外,庄少半导体芯片的活性表面(其未被接触面占用)被一种可熔合的粘合层(其根据接触层的高度而调整)覆盖。
具有此种构造的电子芯片组件的优点是:其不需要其它额外的外壳就可以向外输送并且在电子芯片组件的压合接触面与外部电路载体的接触连接面之间形成一种压合接触面时可直接安装在外部电路载体上。其它的优点是:通过另一接触层可同时将多个集成电路的各接触面直接制造在半导体芯片上并且在加工步骤中在半导体芯片(其包含许多集成电路和许多电子芯片组件)处于未切割状态时,同样可以施加一种经过调整的可熔合粘合层。最后,更重要的优点是:其不需要外壳即可上市,使买主可在外部电路载体的造型中以及在设有电子芯片组件的很平坦的电路载体形式中自由地进行设定。此外,在本发明中设有压合接触面的电子芯片组件可形成于外部可绕性电路载体上,这是因为对于半导体芯片和电路载体的热膨胀特性的适应性来说,本发明的压合接触技术允许一种广泛的容许度。
在本发明的实施例中,外部电路载体是一种作为消费品的安全芯片载体。这种安全芯片载体设有集成安全电路,以便通过所谓日期对该消费品进行辨认,进行后勤管理并且确保不会被不合法地取出。由于这种已受安全保护的消费品大量地储存在空调中,进行管理并且出售,则在安全芯片载体上的电子芯片组件中,由于可以用低成本制造方式制造安全芯片载体与子芯片组件之间的电性连接位,而使消费品价格降低。
在本发明的其它实施例中,外部电路载体是一种具有天线功能的芯片载体用以在接近机动车及/或大厦时起控制作用。本发明的芯片组件的这种应用所具有的优点是:电子芯片组件不需要特殊的外壳形式就可以适应任意形式的芯片载体,大厦或机动车锁头或其它设有天线的介入控制组件。
在本发明的其它实施例中,外部电路载体是一种可用于辨认,记帐,电话及/或银行自动卡的芯片载体。在此实施例中,电子芯片组件同样具有的优点是:其不具有外壳组件并且因此可简易并节省空间地粘合在各卡上或安装在各卡上的适当凹口中。此外,在此实施例中特别可以使电子芯片组件实现一种可变化的压合接触方式。
在本发明的其它实施例中,外部电路载体是一种用来控制玩具及/或控制各模型的芯片载体,在本发明的此应用中,特别可以实现一种制造电子芯片组件的物美价廉的方式并可对其进一步进行加工。每一个电子芯片组件可以是一种组构的一部分,并通过这些部分组成玩具和模型,这是因为此可熔合的粘合层使得这种用于组构的电子芯片组件可操控,可替换并且可多次使用。
在本发明的其它实施例中,此粘合层在压合接触之间所具有的厚度比在压合接触面上具有的厚度还大。这种厚度上的差别在涂布该粘合层时可通过半导体芯片上所选取的涂布技术实现,特别是当使用顺砌涂层法将粘合层以形成薄膜用的媒体来形成时更是如此。压合接触面与半导体芯片其余表面区之间的粘合层具有不同的厚度的优点是:可继续加工和使用电子芯片组件,使较小的加热即是以在使用一种很小压力的情况下利用该压合接触面来推入一种极薄的粘合层。
根据该待粘合表面和由该粘合层所裸露的表面而特别选取该粘合层材料,使得在熔化状态时,此粘合层可以连接此集成电路的具有非导电性的最上层以及接触连接面外部的电路载体的表面区域并且在熔液状态时,使电子芯片组件的压合接触面以及接触连接面不与电路载体连接。对于电子芯片组件与外部电路载体的材料来说,在调整此粘合层材料的连接特性时,最好在熔液状态中使粘合层区域从压合接触面和接触连接面的区域分开,其方式是使粘合材料(其是可连结的)向后拉至表面区。
为了改良各压合接触面的接触量,在本发明的其它实施例中各压合接触面可具有一种粗糙度。可以利用该压合接触材料的制造或沉积形成这种粗糙度或通过其它粗糙步骤实现,此步骤对于整个半导体芯片来说,可有利地同时使压合接触面从用于粘合的粘合剂中松开。
在本发明的另一实施例中,压合接触面的压合接触材料是一种具有延展性的导电金属合金。金属合金的延展性可确保:压合接触面可适应于外部电路载体的接触连接面表面。接触连接面在制造电路载体后被粗糙化时此种延展性将特别有利,使得在压合接触时可将具有延展性的导电金属材料加工成电路载体的接触连接面的粗糙表面。
在本发明的另一实施例中,压合接触材料是一种可抗氧化的金属合金。此金属合金可确保:压合接触面在其电性接触过程中不会受氧化影响,而是在可接触的各组件之间确保可长时间电性接触。压合接触面的压合接触材料在另一实施例中可为镍-金-合金。其中金的成份可带来所需要的抗氧化性,镍的成份可带来所期望的压合接触固定性。以银为主的压合接触材料所具有的优点是:银在空气中不会与氧或水分子发生反应,但会在正常大气环境中形成亚硫酸银(其具有导电性,这不同于大部分的金属氧化物)。在使用一种以铟为主的压合接触材料时所具有的优点是:可形成一种导电性很小的氧化铟,因此在操作期间此压合接触区本身不会由于大气中的氧而发生劣化。
在本发明的其它实施例中,压合接触面超过此位于集成电路最上方的非导电层1.5至8μm。利用此集成电路的此种接触面的升高可以确保:在粘合此电子芯片组件时可实现这种外部电路载体的接触连接面所需的可靠压合接触面。此粘合层的厚度应至少等于此接触层的厚度并且将此粘合层安置在压合接触面之间。当粘合层厚度小于接触层厚度时会导致以下危险性:粘合材料的集成不足以使芯片组件与电路载体相连,因此在压合接触面与接触连接面之间不能确保一种可靠的接触作用。
只要此粘合材料超过该压合接触面的厚度并且其部分定位在压合接触面上,则在电子芯片组件与外部电路载体相接触时,此粘合材料会受压合接触面排挤并且部分填入外部电路载体的接触连接面之间的中间空间中。此实施例中的电子芯片组件所具有的优点是:必须测定此粘合材料的体积过剩量,使位于芯片组件最上方的非导电层与电路载体的表面(其未被接触连接面占用)之间的中间空间的一部分可由粘合材料连结,于是在熔液状态中,当粘合材料冷却时可在电子芯片组件的压合接触面和芯片载体的接触面之间获得强固的接触区。在本实施例中期望该粘合材料层的水平高度不等于压合接触面的高度增加,从而确保电子芯片组件及电路载体之间的上述中间空间可被填入。
在本发明的一种实施例中,粘合材料由热塑型塑料构成,但最好是由对酞酸乙二酯构成,其熔化体积大于固态的粘合材料的体积,使用于强固的粘合材料中所产生的应力通过有利的方式又使电子芯片组件被拉至外部电路载体,因此可确保各压合接触面及接触连接面之间具有强固的压合接触作用。
本发明制造电子芯片组件的方法所具有的特征是以下各步骤:
--在具有许多集成电路的半导体芯片的接触面上选择性地应用一种由压合接触材料构成的接触层,以制成各个已加高的压合接触面,
--在半导体芯片的表面上应用一种适应于接触层高度的可熔合粘合层,
--将半导体芯片分成各个电子芯片组件,其已分离的集成电路中具有压合接触面。
此方法的优点是:在将芯片划分成各个电子芯片组件之前进行主要的步骤,即,选择性地施加一种接触层并且施加电子芯片组件所需的粘合层。此外,通过此方法可使芯片组件与外部电路载体实现压合接触式连接,其不需连结过程或焊接过程。因此可熔合粘合层在较低温度时可在二个组件之间形成一种接触式连接,而不需很大的费用。此外,将可熔合的粘合材料作为薄的粘合层使用,这样可使接触时间较短。
当可熔合的粘合材料应用在芯片复合物中的芯片上时,可在成本上特别有利地同时制造很多芯片。因此,本方法相对于熟知接触方法来说,可更快速并且成本更有利地制成具有较小高度的芯片连接区。本发明因此可简单并且成本有利地在芯片平面上施加该粘合材料且可通过使用处于熔液状态的粘合材料而获得极短的接触时间。
通过下述其它步骤实现芯片组件的压合接触面与外部电路载体相接触:
--使电子芯片组件相对于电路载体的接触连接面与压合接触面相对准,
--通过加热及加压脉冲使芯片组件与外部电路载体压合接触。
此接触方法的优点是:在接触步骤期间热负载在时间上及空间上会受到限制,使芯片组件及电路载体只受到最小的热负载。因此,芯片组件由接触印模所容纳,定位并且压合在安装位置上,施加一种强烈的短加热脉冲(其足以熔化此粘合层),使压合接触面穿过一种用于连结此压合接触面的粘合材料的可能已经存在的粘合材料层,在其余区域中在芯片组件及电路载体之间形成一种整面的粘合作用。
对此粘合材料(其在熔液状态中未连结各金属表面且在熔液状态中由于其表面张力而以连结力向后拉至电子芯片组件的非金属表面上)来说,借助于外部电路载体上的接触印模直接在设置电子芯片组件之后进行一种强固的接触作用,此时不会干扰压合接触面上的粘合材料残留物。
可通过红外线光束实现加热脉冲,其特别是可穿过这些由硅构成的电子芯片组件,其具有颜料粉或填料粉用以传送及接收该可熔合粘合材料的热量,这些粉可吸收紫外线,使得只有粘合材料层可被局部性加热及液化。
可由微波脉冲来实现施加该加热脉冲的其它方法,其通过接触印模的微波耦合件直接作用于粘合材料层上,其中可使用一种用于吸收微波的粘合材料。
在本方法的其它步骤中选择性地通过无电流式沉积来施加该接触层。此无电流式沉积液价格较低并且可以确保:压合接触加高区只生长在芯片的导电接触面的金属表面上,半导体芯片的其余表面区可通过无电流式沉积的移动而保持空的状态。
其它较佳的选择性地施加接触层的方法是使用大量的电解液,但此技术只适用于较低温时可熔化的接触材料。此大量电解液材料具有铟合金,其具有的另外优点是:所形成的氧化铟仍保持导电性并且因此特别适用于压合接触区中。
在其它步骤中,通过镍-金-合金的无电流式沉积,选择性地施加较高的压合接触面,其由于含有金(gold)而特别具有抗氧化的作用。
通过屏蔽来施加或沉积可实现选择性地施加该压合接触材料的其它步骤。此屏蔽可由具有适当开口的金属箔构成,其中各开口用于压合接触材料的蒸发或溅射。此外,选择性地施加也可通过下述方式实现:首先在半导体芯片上沉积此压合接触材料的封闭层,然后通过适当的屏蔽技术进行一种选择性蚀刻(最好是电浆蚀刻)。但也可使用湿式化学蚀刻方法,其可以去除这些未由屏蔽覆盖的全部金属面。在本方法中此屏蔽本身由微影术施加的光阻层构成。可通过溅射,蒸镀或电浆沉积可实现此压合接触材料的整面施加。
选择性地施加此压合接触材料或接触层所用的不同方法的优点是:对每一种应用情况来说,可根据压合接触面(其施加在电子芯片组件上)的大小来使用适当的最佳方法。由于制成较高的压合接触面所需的成本随压合接触面的增大而减少,所以在半导体芯片上在足够大的间距中配置此集成电路的小微观接触面是有利的,因此可在芯片表面上安置大面积的廉价压合接触面(其与集成电路的小微观接触面电连接)。所谓大面积,此处是指边长大于25μm的在微观时变成较小的面积,其只能借助光显微镜测量。
在本方法中通过层压粘合材料箔来实现一种由上述粘合材料所构成的粘合层的施加。如果粘合材料箔的材料不是用来连结金属性表面的,则在已层压的粘合材料层的熔液状态中加热时,金属性压合接触面会裸露出来,而粘合材料可集中在各压合接触面之间。
在本方法的其它步骤中可溅射该粘合层,其中使用于粘合层的粘合材料溶解在溶剂中,并且在溶剂蒸发后使粘合材料均匀地在半导体芯片上分布成一种粘合层。也可在粘合材料处于熔液状态时进行粘合层的溅射,此时粘合层凝固在芯片表面上。最好通过上述两种方式,利用溶剂中已稀释的粘合材料来施加一种粘合层。在溅射此粘合层时,首先使压合接触面上及中间空间中的粘合层厚度相同,因此在向外部载体上施加电子芯片组件时,此压合接触面必须穿过此粘合层。
可通过浸水涂层法或粘合材料的离心法在压合接触面上的粘合层以及中间空间中的粘合层之间形成不同厚度。在此情况中在涂布该粘合材料层时此粘合材料溶解于溶剂中。
施加此粘合层时所具有的特殊优点是可形成一种顺砌层,其中施加此种形成该膜所用的介质并且通过顺砌层可使压合接触面上的粘合层比中间空间中的薄很多。最后,在本方法的其它步骤中通过膜形成所用的介质来设置一种粉层,此时在施加此种粉时对芯片进行加热,使此种用于形成膜的介质扩大成粘合层。
本发明中如果半导体芯片以压合接触面以及至少一种介于其间的粘合层所制成,则可将此芯片切割成各个半导体芯片组件并且在下一步骤中不须封入外壳中即可根据客户的需求而存入库房。
附图说明
现在参考附图中的实施例来描述本发明。其中:
图1为半导体芯片的部分横切面,其具有许多电子芯片组件所需的集成电路。
图2为在向外部电路载体施加芯片组件之前此电子芯片组件的横切面。
图3为在芯片组件和集成电路之间达成一种压合接触时外部电路载体的横切面,其具有已施加的电子芯片组件。
具体实施方式
图1是半导体芯片17的横切面部分,其具有许多集成电路,其中只显示了3个。芯片组件的各组件(例如,压合接触面10)的长度已经比实际放大很多以便说明本发明。此情况也适用于图2和3。
图1中显示了一种半导体芯片17,其在其活性区中埋着各个集成电路6,图1只显示了3个;这些集成电路6在半导体芯片17的活性表面上具有许多接触面2,其由最上方的非导电层5围绕或保持裸露。半导体芯片17上的接触面2之位准比最上方的非导电层5的高度位准还低。在接触面2上配置一种压合接触面10,其平面延伸度比半导体芯片1上的接触面2还大并且比最上方的非导电层5还高。此金属性压合接触面10比最上方的非导电层5的位准还高出1.5至8μm。半导体芯片17的整个活性表面8被粘合层9覆盖,以11表示此粘合层9在压合接触面10之间所具有的厚度,其比接触面10上的厚度12还大。可通过选择适当施加粘合层的方法来实现在粘合层9的半导体芯片17的不同区域中具有的不同厚度11和12。在本实施例中,在利用压合接触材料加高接触面2之后,通过离心法将粘合层施加在半导体芯片的表面上。
通过镍-金-合金的选择式无电流式沉积法将压合接触面10的压合接触材料形成在芯片上。粘合层9由热塑性塑胶所形成的可熔合的粘合材料所构成且可具有填料,此填料可通过红外线及/或微波能量来促进加热作用,因此,经过短时间的加热脉冲可使粘合层9转换成熔液状态。此种转换可通过粘合材料的不同连结特性在金属性的非导电基础上实现,使粘合材料可集中在压合接触面之间并且自动使金属表面裸露。
在半导体芯片17(其具有许多集成电路6)上施加此种由压合接触面及粘合材料所构成的层结构之后,在图1中的破折线上将芯片划分成各个电子芯片组件16且将其储存以作进一步使用,此时不需芯片外壳。
图2是在外部电路载体5上施加芯片组件16之前电子芯片组件16的横切面。电路载体4具有金属导电轨19,其与接触连接面13电相连。外部芯片载体4由隔离材料构成,其部分表面已金属化。如图2所示,芯片组件16的压合接触面安置在芯片载体的接触连接面13的对面。
根据图1构成芯片组件16,且利用相同的参考符号表示相同的组件及组件,因此不需对相同的参考符号再作说明。可以借助于未显示的接触印模将电子芯片组件16固定在外部电路载体5的上方。所构成的接触印模应具有一种脉冲加热源,其可提供一种短时间的加热脉冲使芯片组件16上的粘合材料层9熔化。在本实施例中必须测定外部电路载体5的非金属面表面区18,其可容纳此粘合层9中过剩的粘合材料。
图3是图2中所示的外部电路载体4的横切面,其以压合接触的形式形成于芯片组件16和集成电路4之间,并具有已经施加完成的电子芯片组件16。中间空间14在向电路载体4上施加芯片组件16之后以粘合材料的形式填入,且用来连接各非金属面的粘合材料15可以使电子芯片组件16的压合接触面10能可靠地与外部电路载体4的接触连接面13接触,粘合材料15的连接特性可在芯片模组16的周围以圆形方式使粘合材料边缘形成一种凹入外形20。
由于已凝固的粘合材料15相对于处于熔液相(phase)时的合材料15在体积上产生收缩,因此在粘合材料15凝固之后,可将各压合接触面10压制在电路载体4的接触连接面13上,从而形成可靠的电连接。芯片可以是消费品的识别组件及安全组件的一部分或是一种电路组件(其具有一种用于介入控制的天线功能)或一种用于IC(其用来提高不同文件的安全性,使之不易伪造)的电路载体或一种用于芯片卡的Ics电路载体或一种玩具中的Ics。这类应用的优点是:只需要一种粘合步骤就可以使芯片组件与电路载体电连接并且同时可实现一种特别小的构造上的高度。
所属技术领域的专家都了解:不仅将粘合材料15施加于电子芯片组件上,而且还将其施加于其它接触偶对(partner)上或电路载体上,并可以借助于接触印模,以图样的方式同时实现各种接触作用以取代各个接触。制造这种芯片的压合接触材料不局限于通过无电流方式沉积的镍金合金,还可以使用其它压合接触材料来实现本发明的目的。
Claims (31)
1.一种具有集成电路(6)的电子芯片组件,其中,在半导体芯片(1)的活性表面(3)上具有各接触面(2),各接触面(2)使集成电路(6)与电路载体(4)连接,一最上方的非导电层(5)被淀积在该半导体芯片(1)的活性表面(3)上,所述接触面(2)被该最上方的非导电层(5)围住并与该最上方的非导电层(5)隔开,所述接触面(2)的位准低于该最上方的非导电层(5),其特征在于,具有一压合接触面(10)并包括一压合接触材料的接触层(7)被淀积在集成电路(6)的接触面(2)上,该压合接触面(10)大于半导体芯片(1)的活性表面(3)上的接触面(2),该压合接触面(10)突出于集成电路(6)的最上方的非导电层(5)的位准之上,该半导体芯片(1)的活性表面被一种适应该接触层位准的可熔合的粘合层(9)覆盖,该可熔合的粘合层(9)在所述压合接触面(10)之间具大于所述压合接触面上的厚度(11)。
2.如权利要求1所述的电子芯片组件,其特征在于,该外部电路载体(4)是用于消费品的安全芯片载体。
3.如权利要求1所述的电子芯片组件,其特征在于,该外部电路载体(4)是一种具有天线功能的芯片载体,用以对机动车和/或大厦进行各种介入时的控制。
4.如权利要求1所述的电子芯片组件,其特征在于,该外部电路载体(4)是一种用于辨认、记忆及/或芯片卡的芯片载体。
5.如权利要求1所述的电子芯片组件,其特征在于,该外部电路载体(4)是一种用于控制玩具和/或模型的芯片载体。
6.如权利要求1-5中任一所述的电子芯片组件,其特征在于,位于压合接触面(10)之间的粘合层(9)所具有的厚度(11)比压合接触面(10)上的还大。
7.如权利要求1-5中任一所述的电子芯片组件,其特征在于,粘合层(9)在熔合状态时可以使集成电路(6)的非导电最上层(5)和电路载体(4)的非导电表面区(18)相连接,并且使压合接触面(10)以及接触连接面(13)不与电路载体(4)连接。
8.如权利要求1-5中任一所述的电子芯片组件,其特征在于,压合接触面(10)具有粗糙性。
9.如权利要求1-5中任一所述的电子芯片组件,其特征在于,用于压合接触面(10)的压合接触材料是一种具有可延展性的导电性金属合金。
10.如权利要求1-5中任一所述的电子芯片组件,其特征在于,压合接触材料是一种具有抗氧化性的金属合金。
11.如权利要求1-5任一所述的电子芯片组件,其特征在于,用于压合接触面(10)的压合接触材料为镍-金合金。
12.如权利要求1-5任一所述的电子芯片组件,其特征在于,该压合接触面(10)比位于集成电路(6)最上方的非导电层(5)还高出1.5到8μm。
13.如权利要求1-5任一所述的电子芯片组件,其特征在于,粘合层(9)的厚度至少等于接触层(7)的厚度。
14.如权利要求1-5任一所述的电子芯片组件,其特征在于,只要粘合材料(15)的厚度超过该压合接触面(10)的厚度并且固定在压合接触面(10)上,则此粘合材料(15)的一部分就可填入位于外部电路载体(4)的各接触连接面(13)(在与电子芯片组件(16)接触后)与外部电路载体(4)之间的中间空间(14)中。
15.如权利要求1-5任一所述的电子芯片组件,其特征在于,粘合材料(15)是一种热塑性塑胶。
16.一种电子芯片组件(16)的制造方法,其特征在于以下各步骤:
-选择性地将一种由压合接触材料构成的接触层(7)施加于具有许多集成电路(6)的半导体芯片(17)的接触面(2)上,用以制成加高的压合接触面(10),其中,该压合接触面被淀积在集成电路(6)的接触面(2)上,该压合接触面(10)大于半导体芯片(1)的活性表面(3)上的接触面(2);
-将一种适应接触层(7)高度的可熔合性粘合层(9)施加于半导体芯片(17)的表面上。
-将半导体芯片(17)划分成单个的电子芯片组件(16),其具有已划分的集成电路(6)的压合接触面(10),该可熔合性粘合层(9)在所述压合接触面(10)之间具有大于所述压合接触面上的厚度(11)。
17.一种电子芯片组件(16)的压合接触面(10)的接触方法,此电子芯片组件(16)是按照权利要求16的方法制成的,并且其具有外部电路载体(4),其特征在于以下各步骤:
-利用各压合接触面(10)使电子芯片组件(16)对准电路载体(4)的接触连接面(13)。
-借助于加热和加压脉冲使芯片组件(16)与外部电路载体(4)实现压合接触。
18.如权利要求16或17所述的方法,其特征在于,此接触层(7)选择性地通过无电流沉积形成,最好用镍-金合金制成。
19.如权利要求16或17所述的方法,其特征在于,选择性地通过大量电解液技术来施加此接触层(7)。
20.如权利要求16或17所述的方法,其特征在于,选择性地通过使用屏蔽来施加此接触层。
21.如权利要求16或17所述的方法,其特征在于,以平面的方式涂布此接触层(7),然后通过屏蔽技术选择性地进行电浆蚀刻。
22.如权利要求21所述的方法,其特征在于,利用溅射法以平面的方式涂布该接触层(7)。
23.如权利要求21所述的方法,其特征在于,利用蒸镀技术以平面的方式涂布该接触层(7)。
24.如权利要求21所述的方法,其特征在于,利用电浆沉积法以平面的方式涂布该接触层(7)。
25.如权利要求16或17所述的方法,其特征在于,对该粘合层(9)进行层压。
26.如权利要求16或17所述的方法,其特征在于,对该粘合层(9)进行溅射。
27.如权利要求16或17所述的方法,其特征在于,对该粘合层(9)进行离心分离。
28.如权利要求16或17所述的方法,其特征在于,通过浸入涂层法来施加该粘合层(9)。
29.如权利要求16或17所述的方法,其特征在于,利用顺砌涂层法,通过形成一种用于膜的介质来施加该粘合层(9)。
30.如权利要求16或17所述的方法,其特征在于,利用粉末涂层法,通过形成一种用于膜的介质来施加该粘合层(9)。
31.如权利要求16或17所述的方法,其特征在于,在半导体芯片(17)切割之后,将芯片组件(16)存入库存中。
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JP3470789B2 (ja) * | 1996-11-15 | 2003-11-25 | 日本特殊陶業株式会社 | 配線基板及びその製造方法 |
DE1025587T1 (de) * | 1997-07-21 | 2001-02-08 | Aguila Technologies Inc | Halbleiter-flipchippackung und herstellungsverfahren dafür |
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JP3326382B2 (ja) * | 1998-03-26 | 2002-09-24 | 松下電器産業株式会社 | 半導体装置の製造方法 |
US6265776B1 (en) * | 1998-04-27 | 2001-07-24 | Fry's Metals, Inc. | Flip chip with integrated flux and underfill |
WO2000002243A1 (fr) * | 1998-07-01 | 2000-01-13 | Seiko Epson Corporation | Dispositif a semi-conducteur, procede de fabrication associe, carte imprimee et dispositif electronique |
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JP2000164639A (ja) * | 1998-11-30 | 2000-06-16 | Nec Kansai Ltd | 半導体装置およびその製造方法 |
US8178435B2 (en) * | 1998-12-21 | 2012-05-15 | Megica Corporation | High performance system-on-chip inductor using post passivation process |
US6710454B1 (en) * | 2000-02-16 | 2004-03-23 | Micron Technology, Inc. | Adhesive layer for an electronic apparatus having multiple semiconductor devices |
DE10046296C2 (de) | 2000-07-17 | 2002-10-10 | Infineon Technologies Ag | Elektronisches Chipbauteil mit einer integrierten Schaltung und Verfahren zu seiner Herstellung |
-
2000
- 2000-07-17 DE DE10046296A patent/DE10046296C2/de not_active Expired - Fee Related
-
2001
- 2001-06-07 AU AU2001270467A patent/AU2001270467A1/en not_active Abandoned
- 2001-06-07 CN CNB018130070A patent/CN1254858C/zh not_active Expired - Fee Related
- 2001-06-07 DE DE10192774T patent/DE10192774D2/de not_active Expired - Fee Related
- 2001-06-07 JP JP2002513013A patent/JP2004504723A/ja active Pending
- 2001-06-07 WO PCT/DE2001/002098 patent/WO2002007209A1/de not_active Application Discontinuation
- 2001-06-07 EP EP01949241A patent/EP1301942A1/de not_active Withdrawn
- 2001-07-10 TW TW090116849A patent/TW507338B/zh not_active IP Right Cessation
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2003
- 2003-01-17 US US10/347,324 patent/US6969917B2/en not_active Expired - Fee Related
Also Published As
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JP2004504723A (ja) | 2004-02-12 |
CN1443365A (zh) | 2003-09-17 |
US20030127750A1 (en) | 2003-07-10 |
DE10192774D2 (de) | 2003-10-09 |
US6969917B2 (en) | 2005-11-29 |
WO2002007209A1 (de) | 2002-01-24 |
EP1301942A1 (de) | 2003-04-16 |
TW507338B (en) | 2002-10-21 |
DE10046296C2 (de) | 2002-10-10 |
DE10046296A1 (de) | 2002-02-07 |
AU2001270467A1 (en) | 2002-01-30 |
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