CN1235276C - 电路装置的制造方法 - Google Patents

电路装置的制造方法 Download PDF

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Publication number
CN1235276C
CN1235276C CNB2003101195850A CN200310119585A CN1235276C CN 1235276 C CN1235276 C CN 1235276C CN B2003101195850 A CNB2003101195850 A CN B2003101195850A CN 200310119585 A CN200310119585 A CN 200310119585A CN 1235276 C CN1235276 C CN 1235276C
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China
Prior art keywords
wiring layer
conductive wiring
circuit arrangement
manufacture method
conducting film
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Expired - Fee Related
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CNB2003101195850A
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CN1505124A (zh
Inventor
臼井良辅
水原秀树
五十岚优助
坂本则明
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Northeast Sanyo Semi-Conductive Co Ltd
Sanyo Electric Co Ltd
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Northeast Sanyo Semi-Conductive Co Ltd
Sanyo Electric Co Ltd
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Publication of CN1505124A publication Critical patent/CN1505124A/zh
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Abstract

一种电路装置的制造方法，通过向在导电配线层上形成的外敷层树脂照射等离子体，提高外敷层树脂和密封树脂层的粘附。设置介由层间绝缘层(22)层积的第一导电膜(23A)及第二导电膜(23B)。通过选择地除去第一导电膜形成第一导电配线层(12A)，并由外敷层树脂(18)覆盖第一导电配线层。通过在外敷层树脂(18)上照射等离子体进行其表面的粗糙化。形成密封树脂(17)，以覆盖粗糙化的外敷层树脂(18)表面及电路元件(13)。

Description

电路装置的制造方法
技术领域
本发明涉及电路装置的制造方法，特别是涉及使用等离子体提高构成电路装置的要素相互之间的粘附性的电路装置的制造方法。
背景技术
近年来，IC封装向便携设备或小型、高密度安装设备的采用得到发展，现有的IC封装和其安装理念发生了很大改变。有作为绝缘树脂板的一例采用作为柔性板的聚酰亚胺树脂板的半导体装置的技术(例如，参照专利文献1)。
图13是显示采用柔性板50衬底作为附加衬底的半导体装置。图13(A)是该半导体装置的平面图，图13(B)是图13(A)A-A线的剖面图。以下说明该半导体装置的制造方法。
首先，在柔性板50上介由粘结剂粘结铜箔图案51，并准备。该铜箔图案51因安装的半导体元件为晶体管、IC其图案不同，但一般形成有焊盘51A、岛51B。另外，符号52是为从柔性板50背面取出电极的开口部，所述铜箔图案51露出。然后，该柔性板50被运送到装片机，安装半导体元件53。其后，该柔性板50被运送到引线连接器，利用金属细线54电连接焊盘51A和半导体元件53的焊盘。
最后，如图13(A)，在柔性板50表面设置密封树脂层55进行密封。在此进行传递模模制，以覆盖焊盘51A、岛51B、半导体元件53及金属细线54，其后，如图13(B)所示，设置焊锡或焊球等连接装置56，使其通过焊锡反射炉介由开口部52形成和焊盘51A融接的球状焊锡56。其后，在柔性板50上以矩阵状形成半导体元件53，切割而一个个地分离。
但是，参照图13说明的半导体的制造方法由于采用柔性板50，因而具有种种问题。即，由于具有柔性板50自身具有的程度的厚度，因此，装置的薄型化有限，具有在制造工序中在柔性板50上产生裂纹、或在柔性板50产生挠曲等诸多问题。
为解决如上的问题，提出了不需要柔性板50等这样的附加衬底的薄型电路装置及其制造方法(例如，参照专利文献2)。
参照图14说明该电路装置60的概要。电路装置60具有不需要柔性板等附加衬底的结构。而且，通过蚀刻在绝缘性树脂62表背面以片状连接的导电膜，实现由第一导电配线层63及第二导电配线层64构成的多层配线结构。第一导电配线层63及第二导电配线层64利用层间绝缘层62绝缘，并利用多层连接装置72在规定的位置电连接。另外，在第二导电配线层64的规定位置形成外部电极74，这形成和安装衬底等的连接电极。在第一导电配线层63上除构成焊盘的位置外由外敷树脂76涂敷，介由绝缘粘结剂68固定半导体元件67，且半导体元件67的电极和第一导电配线层63利用金属细线71电连接。密封树脂层73密封半导体元件67及金属细线71并具有进行整体的机械性支撑的作用。
所述的电路装置60具有不需要柔性板等附加衬底的结构，由此，具有装置整体薄型化等优点。
另外，进行在由金属构成的图案表面黏附的污染物的除去等的技术有等离子体照射的技术。参照图15说明在安装半导体装置的引线架上照射等离子体，除去表面黏附的污染物的方法。
参照图15(A)说明经过进行引线架加工的工序及元件安装工序等的引线架110的构成。在接合面状形成的岛114上安装半导体元件112，并包围岛114设置多条引线111。另外，引线111与半导体元件112表面设置的电极对应，介由金属细线113将各电极和引线电连接。
参照图15(B)说明进行等离子体照射的工序。首先，在密闭的容器内部载置引线架110，其次，在内部容器内导入气体，通过放电生成等离子体气体。而后，在等离子体气体中存在的自由基或离子通过与引线架110表面碰撞进行引线架110表面的清洗。
专利文献1
特开2000-133678号公报(第五页、图2)
专利文献2
特愿2001-185420(图1)
发明内容
但是，在所述的电路装置60中，具有如下问题，覆盖第一导电配线层的外敷树脂76和密封树脂层73的粘附性不充分，使用状态下的温度变化产生的热应力会在两者的界面之间产生裂纹。另外，还具有以下问题，自外敷树脂76和密封树脂层73的界面，外气中包含的水分等会进入电路装置内部。
另外，在利用图15所示的等离子体照射进行的引线架的清洗方法中，由于加工成形成岛114或引线111这样复杂的形状，故会因等离子体照射在引线架110上产生局部的电位增加。由此，具有通过引线架局部的电位差介由金属细线113在半导体元件112上流入电流，在半导体元件表面形成的CMOS等元件会被击穿的问题。另外，由于在等离子体照射的工序中引线架110会形成高温，而具有引线变形，金属细线113断线的问题。
本发明是鉴于这样的问题而开发的，本发明的目的在于，提供一种利用等离子体照射，提高构成电路装置的元件相互之间的粘附力的电路装置的制造方法。
本发明提供一种电路装置的制造方法，其包括：设置介由层间绝缘层多层层积的导电膜的工序；选择地除去表面的所述导电膜，形成导电配线层的工序；在所述层间绝缘层上形成通孔，通过在所述通孔上形成连接装置将所述导电配线层和背面的所述导电膜电连接的工序；固定电路元件，并和所述导电配线层电连接的工序；包括所述电路元件在所述导电配线层上照射等离子体的工序；覆盖所述电路元件形成第一树脂层的工序。通过等离子体照射，使导电配线层粗糙化，可提高导电配线层和树脂部件的粘附。
另外，在导电配线层上形成树脂时，通过使树脂粗糙化，可提高树脂层和树脂的粘附性。另外，由于导电配线层被电连接，故利用等离子体照射在树脂上充电的电压介由导电配线层和导电膜逸出外部。从而，可抑制在照射等离子体的工序中局部的电位差的产生，故可抑制半导体元件等电路元件被击穿。
附图说明
图1是说明本发明电路装置制造方法的剖面图；
图2是说明本发明电路装置制造方法的剖面图；
图3是说明本发明电路装置制造方法的剖面图；
图4是说明本发明电路装置制造方法的剖面图；
图5是说明本发明电路装置制造方法的剖面图；
图6是说明本发明电路装置制造方法的剖面图；
图7是说明本发明电路装置制造方法的剖面图(A)、剖面图(B)；
图8是说明本发明电路装置制造方法的剖面图(A)、平面图(B)；
图9是说明本发明电路装置制造方法的剖面图；
图10是说明本发明电路装置制造方法的剖面图；
图11是说明本发明电路装置制造方法的平面图；
图12是说明本发明电路装置制造方法的剖面图；
图13是说明现有的电路装置制造方法的平面图(A)、剖面图(B)；
图14是说明现有的电路装置制造方法的剖面图；
图15是说明现有的电路装置制造方法的平面图(A)、剖面图(B)。
具体实施方式
本发明电路装置的制造方法包括如下工序；设置介由层间绝缘层22多层层积的导电膜23的工序；选择地除去表面导电膜23，形成导电配线层12的工序；在层间绝缘层22上形成通孔31，并通过通孔31上形成的连接装置14将导电配线层12和背面的导电膜23电连接的工序；固定电路元件13，并使其和背面的导电配线层12电连接的工序；在包括电路元件13的导电配线层12上照射等离子体的工序；为覆盖电路元件13形成密封树脂层17的工序。下面说明上述各工序。
本发明的第一工序是，如图1～图3所示，准备介由层间绝缘层22多层层积的导电膜23，选择地除去导电膜23，形成导电配线层12，并在层间绝缘层22上形成通孔31，在通孔31上形成连接装置14，由此将导电配线层12和导电膜23电连接。
在本工序中，首先，设置第一导电膜23A及第二导电膜23B介由层间绝缘层22层积的绝缘板21。在此，作为层间绝缘层22的材料列举如玻璃环氧树脂、树脂系树脂或液晶聚合物。在绝缘板21的表面，实际整个区域形成第一导电膜23A，在背面也实际整个区域形成第二导电膜23B。层间绝缘层22的材料可采用热塑性树脂或热硬性树脂。另外，第一导电膜23A及第二导电膜23B最好为以Cu为主材料的材料或公知的引线架的材料，通过镀敷法、蒸镀法或喷射法被覆盖在层间绝缘层22上，也可以黏附利用辊轧法或镀敷法形成的金属箔。另外，绝缘板21也可以利用模铸法形成。以下简单地叙述其制造方法。首先，在平膜状第一导电膜23A上涂敷糊状绝缘性树脂，在平膜状的第二导电膜23B上也涂敷糊状绝缘性树脂。而后，在使两者的树脂半硬化后粘贴即可完成绝缘板21。
在涂敷膏状物质形成板的模铸法的情况下，其膜厚为10um～100um程度。另外，在作为板形成时，市售的最小膜厚为25um，考虑导热性，在其中也可以混入填料。作为材料考虑玻璃、氧化硅、氮化铝、Si的碳化物、氮化硼等。
参照图2，然后，在绝缘板21的规定位置，在第一导电膜23A及层间绝缘层22上形成通孔31，选择地露出第二导电膜23B。具体地说，仅露出形成第一导电膜23A的通孔31的部分，利用光致抗蚀剂覆盖整个面。而后，介由该光致抗蚀剂蚀刻第一导电膜23A。由于第一导电膜23A以Cu为主材料，故蚀刻液使用氯化铁或氯化铜，进行化学蚀刻。通孔31的开口直径根据光刻法的析像度而变化，在此为50um～100um左右。另外，在该蚀刻时，第二导电膜23B利用粘结性板等盖住，保护不受蚀刻液影响。但是，若第二导电膜23B自身足够厚，具有在蚀刻后也能保持平坦性的膜厚，则即使稍微被蚀刻也没关系。
然后，在清除光致抗蚀剂后，以第一导电膜23A为掩膜，利用激光去除通孔31正下方的层间绝缘层22，在通孔31的底部露出第二导电膜23B。作为激光最好使用二氧化碳气激光。另外，在利用激光蒸发绝缘树脂后，在开口部底部具有残渣时，用过锰酸钠或过硫酸氨等湿式腐蚀，将该残渣除去。
其次，参照图3，在包括通孔31的第一导电膜23A整个面上形成作为进行第二导电膜23B和第一导电膜23A的电连接的多层连接装置14的镀膜。该镀膜通过无电解镀敷和电解电镀两种方法形成，在此，利用无电解镀敷至少在包括通孔31的第一导电膜23A的整个面上形成约2um的Cu。由此，使第一导电膜23A和第二导电膜23B电导通，故再次以第一及第二导电膜23A、23B为电极，进行电解电镀，镀敷约20um的Cu。由此，通孔31被埋入Cu，形成多层连接装置14。在此，镀膜采用了Cu，但也可以采用Au、Ag、Pd等。另外，也可以使用掩膜进行局部镀敷。
其次，参照图3，将第一导电膜23A蚀刻为规定的图案，形成第一导电配线层12A。在第一导电膜23A上由规定图案的光致抗蚀剂覆盖，形成图11所示的配线，这种情况下，利用化学蚀刻形成焊盘部及由此向中央延伸的第一导电配线层12A。由于第一导电膜23A以Cu为主材料，故蚀刻液使用氯化铁或氯化铜即可。
本发明的第二工序是，如图4及图5所示，露出形成焊盘的位置，由外敷层树脂18覆盖表面的导电配线层12。参照图4，外敷层树脂18利用网印使由溶剂溶解后的环氧树脂等附着并热硬化。或黏附由树脂构成的干膜。在此使用的树脂可使用热硬性树脂或热塑性树脂。另外，作为外敷层树脂18的材料可使用感光性树脂或非感光性树脂。另外，为了露出形成焊盘的位置的导电配线层，其上部的外敷层树脂被局部除去。
其次，如图5所示，考虑其接合性，在焊盘上形成有Au、Ag等的镀膜。该镀膜被以外敷层树脂18为掩膜选择性地利用无电解镀敷附着在焊盘上，或以第二导电膜23B作为电极通过电解电镀附着。
本发明的第三工序是，参照图6，在外敷层树脂18上固定电路元件13，并使其和导电配线层12电连接。
在此，电路元件13为半导体元件，且在裸芯片的状态下，介由绝缘性粘接树脂等装在外敷层树脂18上。电路元件13和其下的第一导电配线层12A用外敷层树脂18电绝缘，故第一导电配线层12A即使在电路元件13之下也可以自由地配线，可实现多层配线结构。
另外，电路元件13的各电极焊盘通过金属细线15被连接在作为周边设置的第一导电配线层12A的一部分的焊盘上。在此，电路元件13也可以利用倒装法安装。此时，在电路元件13的各电极焊盘表面设有焊球或补片，在第一导电配线层12A的表面，在对应焊球的位置的部分设有和焊盘相同的电极。
本发明的第四工序是，参照图7，在包括电路元件13的外敷层树脂18表面照射等离子体，将在外敷层树脂18上充电的电压介由导电膜23自导电配线层12逸出，同时，将外敷层树脂18的表面粗糙化的工序。图7(A)是显示进行等离子体照射的概要的图，图7(B)是显示在一个搭载部15上进行等离子体照射的情况的剖面图。
参照图7(A)，等离子体清洗机30具有：在密封容器34内部设置的上段电极31；与上段电极31相对设置，在上部载置绝缘板21的下段电极31。另外，设置有向容器内部供给气体的注入口35和进行其排气的排气口36。上段电极31和下段电极32的任意一方和高频电源连接，未和电源连接的电极被接地。
进行导电箔表面污染物的等离子体清洗具有化学蚀刻和物理蚀刻两种方法。在化学蚀刻中包括DP(Direct Plazma)或PE(Plazma Etching)，气体可使用氧气。在物理、化学蚀刻中包括RIE(Peactive Ion Etching)，气体可使用氩气、氖气或氦气等惰性气体。在化学蚀刻中可使用化学效果进行有机污染物的除去及表面的粗糙化，在物理蚀刻中可利用喷射效果进行有机及无机污染物的除去及表面的粗糙化。在本发明中可使用任何一种方法。另外，也可以使用臭氧进行等离子体照射。
参照图7(B)详细说明利用等离子体进行的表面粗糙化。在本发明中，等离子体照射在绝缘板21的整个区域上进行。具体地说，使通过放电生成的等离子体33中的离子在绝缘板21的整个表面上碰撞。从而，离子在外敷层树脂18、电路元件13及金属细线15上碰撞，在这些表面上形成微细的凹凸，而被粗糙化。另外，在这些表面黏附的有机性或无机性污染物被除去。
另外，第一导电配线层12A利用作为最下层导电膜的第二导电膜23B电气上形成一体。从而，即使被暴露在等离子体的影响下，在外敷层树脂18上蓄积的电荷产生的电压也可以介由第一导电配线层12A及第二导电膜逸出至外部。由此，即使电路元件13是容易被电压击穿的CMOS等也可将给予电路元件13的损伤抑制到最小。
另外，利用使用氯气的RIE进行等离子体照射时，将氦气的离子能设定在40eV～100eV的范围内。由此，表面黏附物被除去，可进行表面适度的粗糙化和清洗。
另外，也可以将上述的DP和RIE组合进行等离子体照射。此时，在进行使用氧气的DP后，进行使用惰性气体的RIE。由此可利用RIE适度地除去进行DP在表面形成的氧化膜。
绝缘板21利用最下层的第二导电膜23B机械性支撑。从而，即使通过本工序绝缘板21被加热，由于绝缘板21均匀地进行热膨胀，也可防止第一导电配线层12A局部的热膨胀或变形。从而，可抑制因第一导电配线层12A的膨胀或变形引起的金属细线15的弯曲或折断。
下面说明在第一导电配线层12A由外敷层树脂18覆盖的状态下进行等离子体照射的优点。第一导电配线层12A包括其角部，被利用外敷层树脂18覆盖。从而，通过进行等离子体照射可防止自第一导电配线层12A的角部产生瞬态放电。由此，可防止因瞬态放电的集中使作为导电配线层12A的材料的铜蒸发。另外，也可防止由蒸发的材料使等离子体清洗机30内污染的问题。
本发明的第五工序是，参照图8，覆盖电路元件13及外敷层树脂18的表面形成密封树脂层17的工序。
绝缘板21被设置在模制装置上，进行树脂模制。作为模制方法可以是传递模模制、注入模模制、涂敷、浸渍等。在本发明中，通过使用热塑性树脂的传递模模制进行树脂密封。外敷层树脂18由于在前工序中其表面被粗糙化，故外敷层树脂18的表面和密封树脂层17的粘附性被提高。
参照图8(A)，在本工序中，在模制腔的下模上，绝缘板21必须平直地接触，厚的第二导电膜23B作该工作。而且，自模制腔取出后，直至密封树脂层17的收缩完全完成，仍利用第二导电膜23B继续维持封装的平坦性。即，本工序之前的绝缘板21的机械支撑作用由第二导电膜23B担当。
然后，参照图8(B)，在本工序中，在绝缘板21上形成以矩阵状固定多个电路元件13的模块，该模块由一个模制模型共同模制。在同图中，在一片绝缘板21上分开设置多个(在此为四个)模块，各模块由一个密封树脂层17树脂密封。从而，使用一个模型即可模制多个电路装置，可节省根据制造的电路装置的大小及形状重新制造模型的成本，另外，可减少使用的树脂量。
另外，在本工序中，在模制腔的下模型上，虽然绝缘板21必须平直地接触，但厚的第二导电膜23B做该工作。而且，自模制腔取出后，直至密封树脂层17的收缩完全完成，仍由第二导电膜23B维持封装的平坦性。即，本工序之前，绝缘板21的机械支撑的作用由第二导电膜23B担当。
本发明的第六工序是，参照图9，通过选择地除去第二导电膜23B形成第二导电配线层12B。
第二导电膜23B由规定图案的光致抗蚀剂覆盖，并利用化学蚀刻形成第二导电配线层12B。例如，如图11所示，第二导电配线层12B以一定间隔配列，分别介由多层连接装置14和第一导电配线层12A电连接，来实现多层配线结构。
其次，第二导电配线层15露出形成外部电极16的部分，对利用溶剂溶解的环氧树脂等进行网印，由外敷层树脂18覆盖大部分。其次，利用焊锡的回流在该露出部分同时形成外部电极16。最后，由于在绝缘板21上多个电路装置以矩阵状形成，故将密封树脂层17及绝缘板21切割，将这些分离为一个个电路装置。
另外，第二导电膜23B也可以整面地除去。此时，自层间绝缘层11的背面露出多层连接装置14，并在露出的多层连接装置14上形成外部电极。
参照图10及图11说明由上述工序制造的电路装置10的结构。电路装置10包括如下结构：第一导电配线层12A及第二导电配线层12B，其介由层间绝缘层11层积；外敷层树脂18，其覆盖所述第一导电配线层12A；电路元件13，其固定在外敷层树脂18上，并与第一导电配线层12A电连接；密封树脂层17，其覆盖电路元件13；多层连接装置14，其在规定的位置贯通层间绝缘层11并将所述两导电配线层12相互之间连接；外部电极16，其设置在第二导电配线层12B的规定位置。以下说明上述的构成要素。
第一导电配线层12A及第二导电配线层12B通过蚀刻层间绝缘层11表背面形成的导电膜而形成。作为导电膜的材料，最好是以Cu为主材料的材料或公知的引线架的材料，通过镀敷法、蒸镀法或喷射法覆盖在层间绝缘层11上，也可以粘贴利用压延法或镀敷法形成的金属箔。另外，第一导电配线层12A及第二导电配线层12B由外敷层树脂18覆盖。
层间绝缘层11具有绝缘第一导电配线层12A和第二导电配线层12B的作用，作为两导电配线层12之间的层来设置。层间绝缘层11的材料采用具有高温时软化的特性的热塑性树脂或热硬性树脂。
外敷层树脂18由热硬性树脂或热塑性树脂构成，覆盖第一导电配线层12A的大部分。另外，作为进行和电路元件13连接的焊盘的位置的外敷层树脂18被部分地除去，形成导电膜。在此，外敷层树脂18的表面由进行所述等离子体照射的工序粗糙化，粗糙化的外敷层树脂18的表面和密封树脂层17的粘附牢固。
电路元件13介由绝缘性粘结剂固定在第一导电配线层12A上，和第一导电配线层12A介由金属细线15电连接。在本实施例中，作为电路元件13，固定了两个半导体元件。另外，电路元件13也可采用半导体元件以外的电路元件，也可以采用片状电容、片状电阻或晶体管芯片等作为电路元件13。
多层连接装置14将第一导电配线层12A和第二导电配线层12B通过在规定位置贯通层间绝缘层11而连接。作为多层配线装置14，具体地适用铜镀膜。另外，也可以是金、银、钯等的镀膜。
密封树脂层17覆盖第一导电配线层12A及电路元件13。该密封树脂层17也兼有机械地支撑完成的电路装置整体的作用。另外，密封树脂层17由利用传递膜形成的热硬性树脂形成。
外部电极16被设置在第二导电配线层12B的规定位置。即，第二导电配线层12B的大部分被外敷层树脂18覆盖，在露出的第二导电配线层12B上设置由焊锡等焊剂形成的外部电极16。
参照图11说明本发明电路装置10的平面结构的一例。首先，实线显示的图案是第一导电配线层12A，虚线显示的图案是第二导电配线层12B。第一导电配线层12A形成焊盘，包围电路元件13，局部配置为两段，与具有多焊盘的电路元件13相对应。第一导电配线层12A由金属细线15和电路元件13的对应电极焊盘连接，多个形成精细图案的第一导电配线层12A被延伸在电路元件13之下，由黑实心园显示的多层连接装置14和第二导电配线层12B连接。
如果是这样的结构，即使是具有200个以上焊盘的半导体元件，也可以利用第一导电配线层12A的精细图案，由多层配线结构延伸至规定的第二导电配线层12B，可自第二导电配线层12B上设置的外部电极向外部电路进行连接。
另外，参照同图，在周边部的第一导电配线层12A上安装电路元件13A。在此，作为电路元件13A可采用片状电阻或片状电容等无源元件和裸的晶体管芯片或二极管等有源元件。这样，通过在最外周部安装电路元件13A可提高装置整体的安装密度。
参照图12说明具有三层配线结构的电路装置10的构成。参照同图说明的电路装置的基本结构和参图10说明的相同。其不同点在于导电配线层12。在此形成由第一导电配线层12A、第二导电配线层12B及第三导电配线层12C构成的三层配线结构。另外，作为最上层导电图案的第一导电配线层12A大部分被外敷层树脂18覆盖。而后，通过在外敷层树脂18的表面实施等离子体处理，其表面形成粗糙面，从而提高外敷层树脂18和密封树脂层17的粘附性。
根据本发明电路装置的制造方法，由于在把整体的导电配线层12利用最下层导电膜23电气地形成一体的状态下进行等离子体清洗，故可使因等离子体的影响在外敷层树脂18上产生的电压介由导电膜逸出至外部。从而，可抑制因等离子体影响产生的电位差给予电路元件13的损伤。
另外，通过进行等离子体照射，覆盖导电配线层12的外敷层树脂18表面被粗糙化，故可提高外敷层树脂18和密封树脂层17的粘附性。
另外，形成导电配线层12的绝缘板21由最下层导电膜23机械支撑，即使因照射等离子体而被加热整体也是均匀地进行热膨胀，故可防止因局部的导电配线层12热变形引起的金属细线15的弯曲或折断。
依照本发明可使用等离子体照射提高构成电路装置的要素相互之间的粘附力，提高电路装置的可靠性。

Claims (13)

1、一种电路装置的制造方法，其特征在于，其包括如下工序：设置介由层间绝缘层多层层积的导电膜的工序；选择地除去表面的所述导电膜，形成导电配线层的工序；在所述层间绝缘层上形成通孔，通过在所述通孔上形成连接装置将所述导电配线层和背面的所述导电膜电连接的工序；固定电路元件，并和所述导电配线层电连接的工序；包括所述电路元件在所述导电配线层上照射等离子体的工序；形成第一树脂层，以覆盖所述电路元件的工序。
2、如权利要求1所述的电路装置的制造方法，其特征在于，所述导电配线层除形成焊盘的位置之外，由第二树脂层覆盖。
3、如权利要求2所述的电路装置的制造方法，其特征在于，在照射所述等离子体的工序中，在所述第二树脂层表面也照射所述等离子体，使向所述第二树脂层充电的电压自所述导电配线层介由所述导电膜逸出，同时使所述第二树脂层表面粗糙化。
4、如权利要求1所述的电路装置的制造方法，其特征在于，利用在所述通孔上形成由镀膜构成的连接装置将所述导电配线层和所述导电膜电连接。
5、如权利要求1所述的电路装置的制造方法，其特征在于，使用氧气或臭氧进行所述等离子体照射。
6、如权利要求1所述的电路装置的制造方法，其特征在于，使用惰性气体氩气、氖气或氦气进行所述等离子体照射。
7、如权利要求6所述的电路装置的制造方法，其特征在于，在使用氩气的所述等离子体照射时，氩气的离子能在40eV～100eV的范围内。
8、如权利要求1所述的电路装置的制造方法，其特征在于，在使用氧气进行所述等离子体照射后，使用惰性气体氩气、氖气或氦气进行等离子体照射。
9、如权利要求1所述的电路装置的制造方法，其特征在于，所述导电膜由以铜为主材料的金属构成。
10、如权利要求1所述的电路装置的制造方法，其特征在于，所述电路元件是半导体元件，并介由金属细线和所述导电配线层电连接。
11、如权利要求1所述的电路装置的制造方法，其特征在于，所述电路元件是利用倒装法安装的半导体元件。
12、如权利要求11所述的电路装置的制造方法，其特征在于，所述电路元件介由焊剂和所述导电配线层电连接。
13、如权利要求1所述的电路装置的制造方法，其特征在于，在所述等离子体照射后，通过选择地除去背面的所述导电膜形成导电配线层。
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