CN1202726A - 一种半导体器件的制造方法 - Google Patents
一种半导体器件的制造方法 Download PDFInfo
- Publication number
- CN1202726A CN1202726A CN98102216A CN98102216A CN1202726A CN 1202726 A CN1202726 A CN 1202726A CN 98102216 A CN98102216 A CN 98102216A CN 98102216 A CN98102216 A CN 98102216A CN 1202726 A CN1202726 A CN 1202726A
- Authority
- CN
- China
- Prior art keywords
- dielectric film
- etching
- film
- raceway groove
- insulation layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 59
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 27
- 238000005530 etching Methods 0.000 claims abstract description 59
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 40
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 40
- 238000001039 wet etching Methods 0.000 claims abstract description 18
- 239000000758 substrate Substances 0.000 claims abstract description 7
- 230000004888 barrier function Effects 0.000 claims description 59
- 238000009413 insulation Methods 0.000 claims description 58
- 238000000034 method Methods 0.000 claims description 39
- 238000005229 chemical vapour deposition Methods 0.000 claims description 17
- 230000003647 oxidation Effects 0.000 claims description 14
- 238000007254 oxidation reaction Methods 0.000 claims description 14
- 238000005498 polishing Methods 0.000 claims description 10
- 238000002955 isolation Methods 0.000 abstract description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 10
- 230000015572 biosynthetic process Effects 0.000 description 10
- 229910052710 silicon Inorganic materials 0.000 description 9
- 239000010703 silicon Substances 0.000 description 9
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 8
- 238000009792 diffusion process Methods 0.000 description 8
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 6
- 229910052581 Si3N4 Inorganic materials 0.000 description 6
- 230000000694 effects Effects 0.000 description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 6
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000001259 photo etching Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 238000005452 bending Methods 0.000 description 2
- 230000000994 depressogenic effect Effects 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 230000008030 elimination Effects 0.000 description 1
- 238000003379 elimination reaction Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
Abstract
Description
Claims (13)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP172866/97 | 1997-06-13 | ||
JP9172866A JP3063686B2 (ja) | 1997-06-13 | 1997-06-13 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1202726A true CN1202726A (zh) | 1998-12-23 |
CN100334707C CN100334707C (zh) | 2007-08-29 |
Family
ID=15949761
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB981022162A Expired - Fee Related CN100334707C (zh) | 1997-06-13 | 1998-06-03 | 一种半导体器件的制造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US6197657B1 (zh) |
JP (1) | JP3063686B2 (zh) |
KR (1) | KR100307651B1 (zh) |
CN (1) | CN100334707C (zh) |
GB (1) | GB2326282B (zh) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102148181A (zh) * | 2010-02-10 | 2011-08-10 | 上海宏力半导体制造有限公司 | 浅沟槽隔离结构形成方法 |
CN104332410A (zh) * | 2014-11-05 | 2015-02-04 | 上海华力微电子有限公司 | 一种鳍式场效应晶体管的制造方法 |
CN104347427A (zh) * | 2014-11-05 | 2015-02-11 | 上海华力微电子有限公司 | 一种鳍式场效应晶体管的制造方法 |
CN104362097A (zh) * | 2014-11-05 | 2015-02-18 | 上海华力微电子有限公司 | 一种鳍式场效应晶体管的制造方法 |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000323563A (ja) * | 1999-05-14 | 2000-11-24 | Nec Corp | 半導体装置の製造方法 |
US7033876B2 (en) * | 2001-07-03 | 2006-04-25 | Siliconix Incorporated | Trench MIS device having implanted drain-drift region and thick bottom oxide and process for manufacturing the same |
US7291884B2 (en) * | 2001-07-03 | 2007-11-06 | Siliconix Incorporated | Trench MIS device having implanted drain-drift region and thick bottom oxide |
US7009247B2 (en) * | 2001-07-03 | 2006-03-07 | Siliconix Incorporated | Trench MIS device with thick oxide layer in bottom of gate contact trench |
US20060038223A1 (en) * | 2001-07-03 | 2006-02-23 | Siliconix Incorporated | Trench MOSFET having drain-drift region comprising stack of implanted regions |
KR100489525B1 (ko) * | 2002-04-16 | 2005-05-16 | 동부아남반도체 주식회사 | 스페이서 형성 시 디보트 형상 방지방법 |
KR100476934B1 (ko) * | 2002-10-10 | 2005-03-16 | 삼성전자주식회사 | 트렌치 소자분리막을 갖는 반도체소자 형성방법 |
US7037794B2 (en) * | 2004-06-09 | 2006-05-02 | International Business Machines Corporation | Raised STI process for multiple gate ox and sidewall protection on strained Si/SGOI structure with elevated source/drain |
DE102011005719A1 (de) * | 2011-03-17 | 2012-09-20 | Globalfoundries Dresden Module One Llc & Co. Kg | Erhöhte Integrität von Metallgatestapeln mit großem ε durch Reduzieren von STI-Absenkungen durch Abscheiden eines Füllmaterials nach der STI-Herstellung |
JP2014063895A (ja) * | 2012-09-21 | 2014-04-10 | Asahi Kasei Electronics Co Ltd | 半導体装置の製造方法 |
CN105869991B (zh) * | 2015-01-23 | 2018-05-11 | 上海华力微电子有限公司 | 用于改善SiGe厚度的均匀性的方法和系统 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0055521B1 (en) * | 1980-11-29 | 1985-05-22 | Kabushiki Kaisha Toshiba | Method of filling a groove in a semiconductor substrate |
US5229316A (en) | 1992-04-16 | 1993-07-20 | Micron Technology, Inc. | Semiconductor processing method for forming substrate isolation trenches |
JP3311044B2 (ja) * | 1992-10-27 | 2002-08-05 | 株式会社東芝 | 半導体装置の製造方法 |
US5433794A (en) * | 1992-12-10 | 1995-07-18 | Micron Technology, Inc. | Spacers used to form isolation trenches with improved corners |
US5358891A (en) | 1993-06-29 | 1994-10-25 | Intel Corporation | Trench isolation with planar topography and method of fabrication |
US5387540A (en) * | 1993-09-30 | 1995-02-07 | Motorola Inc. | Method of forming trench isolation structure in an integrated circuit |
JPH07176607A (ja) | 1993-12-21 | 1995-07-14 | Toshiba Corp | 半導体装置の製造方法 |
JPH08330410A (ja) | 1995-05-31 | 1996-12-13 | Sony Corp | 素子分離方法、素子分離構造、及び半導体装置 |
US5933748A (en) | 1996-01-22 | 1999-08-03 | United Microelectronics Corp. | Shallow trench isolation process |
KR100216267B1 (ko) * | 1996-12-26 | 1999-08-16 | 구본준 | 트렌치 격리구조를 갖는 반도체 장치 제조방법 |
JPH118295A (ja) | 1997-06-16 | 1999-01-12 | Nec Corp | 半導体装置及びその製造方法 |
-
1997
- 1997-06-13 JP JP9172866A patent/JP3063686B2/ja not_active Expired - Fee Related
-
1998
- 1998-06-03 CN CNB981022162A patent/CN100334707C/zh not_active Expired - Fee Related
- 1998-06-11 GB GB9812639A patent/GB2326282B/en not_active Expired - Fee Related
- 1998-06-11 US US09/095,497 patent/US6197657B1/en not_active Expired - Lifetime
- 1998-06-11 KR KR1019980021618A patent/KR100307651B1/ko not_active IP Right Cessation
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102148181A (zh) * | 2010-02-10 | 2011-08-10 | 上海宏力半导体制造有限公司 | 浅沟槽隔离结构形成方法 |
CN102148181B (zh) * | 2010-02-10 | 2014-10-22 | 上海华虹宏力半导体制造有限公司 | 浅沟槽隔离结构形成方法 |
CN104332410A (zh) * | 2014-11-05 | 2015-02-04 | 上海华力微电子有限公司 | 一种鳍式场效应晶体管的制造方法 |
CN104347427A (zh) * | 2014-11-05 | 2015-02-11 | 上海华力微电子有限公司 | 一种鳍式场效应晶体管的制造方法 |
CN104362097A (zh) * | 2014-11-05 | 2015-02-18 | 上海华力微电子有限公司 | 一种鳍式场效应晶体管的制造方法 |
CN104332410B (zh) * | 2014-11-05 | 2017-12-22 | 上海华力微电子有限公司 | 一种鳍式场效应晶体管的制造方法 |
Also Published As
Publication number | Publication date |
---|---|
GB9812639D0 (en) | 1998-08-12 |
CN100334707C (zh) | 2007-08-29 |
KR100307651B1 (ko) | 2001-11-30 |
JPH118296A (ja) | 1999-01-12 |
GB2326282B (en) | 2001-01-31 |
GB2326282A (en) | 1998-12-16 |
JP3063686B2 (ja) | 2000-07-12 |
KR19990006860A (ko) | 1999-01-25 |
US6197657B1 (en) | 2001-03-06 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C06 | Publication | ||
PB01 | Publication | ||
ASS | Succession or assignment of patent right |
Owner name: NEC ELECTRONICS TAIWAN LTD. Free format text: FORMER OWNER: NIPPON ELECTRIC CO., LTD. Effective date: 20030615 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20030615 Address after: Kanagawa, Japan Applicant after: NEC Corp. Address before: Tokyo, Japan Applicant before: NEC Corp. |
|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C56 | Change in the name or address of the patentee |
Owner name: RENESAS ELECTRONICS CORPORATION Free format text: FORMER NAME: NEC CORP. |
|
CP01 | Change in the name or title of a patent holder |
Address after: Kanagawa, Japan Patentee after: Renesas Electronics Corporation Address before: Kanagawa, Japan Patentee before: NEC Corp. |
|
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20070829 Termination date: 20140603 |