JP5288814B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP5288814B2 JP5288814B2 JP2008016207A JP2008016207A JP5288814B2 JP 5288814 B2 JP5288814 B2 JP 5288814B2 JP 2008016207 A JP2008016207 A JP 2008016207A JP 2008016207 A JP2008016207 A JP 2008016207A JP 5288814 B2 JP5288814 B2 JP 5288814B2
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- insulating film
- sti
- film
- etching
- semiconductor substrate
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- 239000004065 semiconductor Substances 0.000 title claims description 26
- 238000004519 manufacturing process Methods 0.000 title claims description 10
- 238000005530 etching Methods 0.000 claims description 37
- 239000000758 substrate Substances 0.000 claims description 31
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 claims description 16
- 238000000034 method Methods 0.000 claims description 15
- 229910000147 aluminium phosphate Inorganic materials 0.000 claims description 8
- 239000000126 substance Substances 0.000 claims description 4
- 238000001039 wet etching Methods 0.000 claims description 4
- 238000001312 dry etching Methods 0.000 claims description 2
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 19
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 15
- 239000010410 layer Substances 0.000 description 11
- 239000000463 material Substances 0.000 description 11
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 10
- 229920005591 polysilicon Polymers 0.000 description 10
- 238000001020 plasma etching Methods 0.000 description 9
- 230000007423 decrease Effects 0.000 description 5
- 239000012535 impurity Substances 0.000 description 5
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 5
- 239000011229 interlayer Substances 0.000 description 4
- DDFHBQSCUXNBSA-UHFFFAOYSA-N 5-(5-carboxythiophen-2-yl)thiophene-2-carboxylic acid Chemical compound S1C(C(=O)O)=CC=C1C1=CC=C(C(O)=O)S1 DDFHBQSCUXNBSA-UHFFFAOYSA-N 0.000 description 3
- 229910017855 NH 4 F Inorganic materials 0.000 description 3
- 239000000428 dust Substances 0.000 description 3
- 238000002955 isolation Methods 0.000 description 3
- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823481—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
Description
Claims (4)
- 半導体基板上にパターニングされた第1の絶縁膜をマスクとして、前記半導体基板にトレンチを形成し、
前記トレンチ内に第2の絶縁膜を埋め込み、平坦化し、
前記第1の絶縁膜をエッチングすることにより前記第1の絶縁膜の上部を選択的に除去し、前記半導体基板上に残される前記第1の絶縁膜の下部の上面から前記第2の絶縁膜の側面の一部を露出させ、
前記第1の絶縁膜の下部の上面から露出する前記第2の絶縁膜の側面を含む前記第2の絶縁膜の一部を等方的に除去し、
前記第1の絶縁膜の下部を選択的に除去したのちに、
前記第2の絶縁膜の上面が前記半導体基板表面から所定の高さとなり、少なくとも前記半導体基板表面から突出する前記第2の絶縁膜の側面の全面に最小テーパ角が90°以上のテーパが形成されるように、残された前記第2の絶縁膜の一部を、さらに等方的に除去することを特徴とする半導体装置の製造方法。 - 選択的に除去される前記第1の絶縁膜の上部は、30nm以上であることを特徴とする請求項1に記載の半導体装置の製造方法。
- 前記所定の高さは、22nm以上であることを特徴とする請求項1または請求項2に記載の半導体装置の製造方法。
- 熱リン酸を用いたウェットエッチング、またはケミカルドライエッチングにより、前記第1の絶縁膜の上部を選択的に除去することを特徴とする請求項1乃至請求項3のいずれか1項に記載の半導体装置の製造方法。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008016207A JP5288814B2 (ja) | 2008-01-28 | 2008-01-28 | 半導体装置の製造方法 |
US12/359,635 US7875527B2 (en) | 2008-01-28 | 2009-01-26 | Manufacturing method for semiconductor device and semiconductor device |
US12/926,905 US20110089525A1 (en) | 2008-01-28 | 2010-12-16 | Manufacturing method for semiconductor device and semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008016207A JP5288814B2 (ja) | 2008-01-28 | 2008-01-28 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009177063A JP2009177063A (ja) | 2009-08-06 |
JP5288814B2 true JP5288814B2 (ja) | 2013-09-11 |
Family
ID=40997482
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008016207A Active JP5288814B2 (ja) | 2008-01-28 | 2008-01-28 | 半導体装置の製造方法 |
Country Status (2)
Country | Link |
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US (2) | US7875527B2 (ja) |
JP (1) | JP5288814B2 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104392955A (zh) * | 2014-11-19 | 2015-03-04 | 上海华力微电子有限公司 | 改善浅沟槽隔离边缘SiC应力性能的方法 |
JP2019169581A (ja) * | 2018-03-23 | 2019-10-03 | 株式会社東芝 | 半導体装置の製造方法 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5981356A (en) * | 1997-07-28 | 1999-11-09 | Integrated Device Technology, Inc. | Isolation trenches with protected corners |
JP2000021967A (ja) | 1998-06-30 | 2000-01-21 | Sony Corp | 半導体装置およびその製造方法 |
JP2002124563A (ja) * | 2001-09-03 | 2002-04-26 | Toshiba Corp | 半導体装置 |
KR100461330B1 (ko) * | 2002-07-19 | 2004-12-14 | 주식회사 하이닉스반도체 | 반도체 소자의 sti 형성공정 |
US6828212B2 (en) * | 2002-10-22 | 2004-12-07 | Atmel Corporation | Method of forming shallow trench isolation structure in a semiconductor device |
US7091105B2 (en) * | 2002-10-28 | 2006-08-15 | Hynix Semiconductor Inc. | Method of forming isolation films in semiconductor devices |
US6750117B1 (en) * | 2002-12-23 | 2004-06-15 | Macronix International Co., Ltd. | Shallow trench isolation process |
JP2004363486A (ja) * | 2003-06-06 | 2004-12-24 | Renesas Technology Corp | トレンチ分離を有する半導体装置およびその製造方法 |
US20070066074A1 (en) * | 2005-09-19 | 2007-03-22 | Nace Rossi | Shallow trench isolation structures and a method for forming shallow trench isolation structures |
-
2008
- 2008-01-28 JP JP2008016207A patent/JP5288814B2/ja active Active
-
2009
- 2009-01-26 US US12/359,635 patent/US7875527B2/en active Active
-
2010
- 2010-12-16 US US12/926,905 patent/US20110089525A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
US20090212387A1 (en) | 2009-08-27 |
JP2009177063A (ja) | 2009-08-06 |
US7875527B2 (en) | 2011-01-25 |
US20110089525A1 (en) | 2011-04-21 |
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