CN1185892A - 中心密集的周边球栅阵列电路封装 - Google Patents
中心密集的周边球栅阵列电路封装 Download PDFInfo
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Abstract
一种球栅阵列(BGA)集成电路封装(10),该封装具有封装衬底(12)下表面(16)上的焊料球外二维阵列和焊料球中心二维阵列(34)。一般对焊料球进行回流焊将封装安装印制电路板上。将通过封装内的内部布线电连接到焊料球的集成电路(18)安装到衬底的相对表面。焊料球的外阵列位于集成电路的分布线的外部,以减小由集成电路和衬底之间热膨胀系数的差异造成的焊接应力。中心焊料球一般直接接封装的地和电源焊盘,以提供从集成电路到印刷电路板的直接热和电通道。
Description
发明背景
1.发明领域
本发明涉及集成电路封装。
2.相关技术描述
集成电路一般安装到焊接在印制电路板的封装上。这种集成电路的封装类型之一是球栅阵列(“BGA”)封装。BGA封装具有位于封装衬底的下外表面上的多个焊料球。对焊料球进行回流焊使封装衬底贴附在印制电路板上。集成电路安装到封装的上表面,并通过封装内的内部布线电连接焊料球。
图1显示的是现有技术BGA封装2的焊料球阵列。在封装的下表面焊料球4排列成二维图形。集成电路6位于封装2相对侧的中央。封装2一般由热膨胀系数与集成电路不同的材料组成。现已发现集成电路与封装之间不同的热膨胀会引入与温度有关的应力,该应力会使对应电路管芯的外边缘的区域内的焊料连接失败。
图2显示的是具有焊料球4的外二维阵列的现有技术BGA封装2。焊料球4位于远离集成电路6下面的封装区的区域。将焊料球4远离集成电路6放置可以减小由于封装与集成电路之间不同的热膨胀引起的焊料接点上的热应力。虽然有效地减少了焊接失败,但外阵列图形限制了封装的输入/输出(I/O)。此外,集成电路产生热量,传导穿过焊料球并进入印制电路板。将焊料球放置在封装的外围增加了穿过封装衬底的导热路径。路径更长增加了封装的热阻和集成电路的结温。希望能提供一种BGA封装,和现有技术BGA的封装相比,具有更长的产品寿命、更低的热阻和更高的I/O。
发明概述
本发明为球栅阵列(“BGA”)集成电路封装,具有外二维排列的焊料球和位于封装衬底的下表面上的中央二维排列焊料球。一般对焊料球进行回流将封装安装到印制电路板上。通过封装内的内部布线电连接到焊料球上的集成电路安装在衬底的相对表面上。焊料球的外阵列位于集成电路的分布线(dimensional profile)外,可以减小集成电路与衬底之间不同的热膨胀引起的焊接应力。中心的焊料球一般直接接封装的地和电源焊盘,提供从集成电路到印制电路板的直接的热和电通路。
附图简述
阅读下面详细的说明书和附图后,对本领域的普通技术人员来说,本发明的目的和优点将变得很明显。
图1为现有技术球栅阵列集成电路封装的底视图;
图2为现有技术球栅阵列集成电路封装的底视图;
图3为本发明球栅阵列封装的侧面剖视图;
图4为图3所示的封装的底视图;
图5为另一球栅阵列封装的底视图。
发有详述
下面参照附图特别是参考数字介绍本发明,图3和4显示的是本发明的球栅阵列(“BGA”)集成电路封装10。封装10包括具有上表面14和相对的下表面16的衬底12。集成电路16安装在衬底12的上表面14上。集成电路18一般为微处理器。虽然介绍的是微处理器,但应该明白封装10也可包含其它电器件。
衬底12的上表面14具有多个键合焊盘20和接地总线22。衬底12也有同心地位于集成电路18和接地焊盘22周围的单独的电源总线23。集成电路18通过焊线24连接到键合焊盘20和总线22和23。集成电路16一般用密封剂26包封。虽然显示和介绍的是焊线,集成电路18可以通过位于封装中电路管芯下表面的焊料球安装并连接到衬底,这种工艺通常称做“C4”或“倒装芯片”封装。
衬底12的下表面16具有多个接触焊盘28。接触焊盘28通过衬底12内的通孔30和内部路径32连接键合焊盘20。衬底可以由本领域公知的常规印制电路板或共同烧制的(co-fired)陶瓷的封装工艺制成。
用公知的球栅阵列工艺将多个焊料球34贴附在接触焊盘28上。一般对焊料球34进行回流焊使封装10贴附在印制电路板上(未显示)。
接触焊盘28排列成外部的二维阵列36和中心的二维阵列38。每个阵列包含每个由许多介质间隔40隔离的多个接触焊盘28。外阵列36通过介质区42与中心阵列38隔离。外阵列38最好位于集成电路18的分布线的外部。在这种方式中,外阵列38的焊料接点不受集成电路18的热膨胀系数与衬底12的热膨胀系数之间的差异引起的应力的影响。中心阵列38位于靠近集成电路16的区域内,在该区域内产生的热膨胀没有电路管芯的外边缘产生的多。因此,由于热膨胀的差异产生的焊接应力在中心阵列38的区域内最小。阵列分开提供了焊料接点上应力最小的图形。
外阵列36一般连接到集成电路16的信号线。中心阵列38最好连接到衬底12的接地总线20和电源总线23。将总线22和23连接到中心接触焊盘38的通孔30提供了穿过衬底的直接的导热路径。直接的导热路径降低了封装10的热阻和集成电路18的结温。此外,短的电通路降低了自感并减少了集成电路18的开关噪声。
在优选实施例中,在27×27毫米(mm)宽的衬底12上的封装10包括292个接触焊盘28,或35×35毫米(mm)宽的衬底12上包括352个接触焊盘28。接触焊盘28之间的介质间隔40一般约为1.27mm。封装10一般高度约为2.5mm。
将焊料球34贴附在接触焊盘28来装配封装10。集成电路18安装并连接到衬底12上。然后用密封剂26包封集成电路18。一般装运到最终用户的BGA封装10是通过回流焊料球34安装到印制电路板上的。
图5显示了封装10’的另一实施例,该封装10’在衬底12’的外阵列36’内有五或六列接触焊盘28。附加的焊盘28增加了封装10的输入/输出(I/O)。外阵列36’最好在集成电路18的分布线的外部,以使焊料接点上的应力最小化。封装10’在27×27mm的衬底10上提供有324个接触焊盘28。封装60的更长的列提供了约35×35 mm封装的I/O,在27×27mm的封装的印记内。
虽然在附图中介绍并显示了某些示例性的实施例,但应该明白这些实施例仅为说明性的而不是限制性的,由于本领域的普通技术人员可以做出不同的其它修改,所以本发明并不受所显示的特定的结构和设置的限制。
Claims (16)
1.一种球栅阵列封装,包括:
具有上表面和相对的下表面的衬底,所述下表面具有每个接触焊盘之间间隔第一距离的接触焊盘外阵列,和每个接触焊盘之间间隔第二距离的接触焊盘中心阵列,所述接触焊盘的中心阵列与所述接触焊盘的外阵列间隔大于第一距离和第二距离的第三距离;
贴附在所述衬底的所述接触焊盘上的多个焊料球。
2.根据权利要求1的封装,其中所述衬底的所述上表面具有多个键合焊盘。
3.根据权利要求2的封装,其中所述衬底的所述上表面具有通过延伸穿过所述衬底的多个通孔连接到所述中心阵列的接触焊盘的接地总线。
4.根据权利要求3的封装,其中所述接触焊盘的外阵列至少具有五列接触焊盘。
5.根据权利要求4的封装,其中所述衬底的所述上表面具有通过延伸穿过所述衬底的多个通孔连接到所述中心阵列的接触焊盘的电源总线。
6.根据权利要求5的封装,其中所述接触焊盘的中心阵列设置为4×4矩阵。
7.一种球栅阵列封装,包括:
具有上表面和相对的下表面的衬底,所述上表面具有多个键合焊盘,所述下表面具有每个接触焊盘之间间隔第一距离的接触焊盘外阵列,和每个接触焊盘之间间隔第二距离的接触焊盘中心阵列,所述接触焊盘的中心阵列与所述接触焊盘的外阵列间隔大于第一距离和第二距离的第三距离;
贴附在所述衬底的所述接触焊盘上的多个焊料球,
安装到所述衬底并连接到所述键合焊盘的集成电路。
8.根据权利要求7的封装,其中所述衬底的所述上表面具有通过延伸穿过所述衬底的多个通孔连接到所述中心阵列的接触焊盘的接地总线。
9.根据权利要求8的封装,其中所述接触焊盘的外阵列具有至少五列接触焊盘。
10.根据权利要求9的封装,其中所述衬底的所述上表面具有通过延伸穿过所述衬底的多个通孔连接到所述中心阵列的接触焊盘的电源总线。
11.根据权利要求10的封装,其中所述接触焊盘的中心阵列设置为4×4矩阵。
12.根据权利要求11的封装,其中所述集成电路用密封剂包封。
13.根据权利要求7的封装,其中所述接触焊盘的外阵列位于所述集成电路的外分布线的外部。
14.一种装配球栅阵列封装方法,包括以下步骤:
a)提供具有上表面和相对的下表面的衬底,所述下表面具有每个接触焊盘之间间隔第一距离的接触焊盘外阵列,和每个接触焊盘之间间隔第二距离的接触焊盘中心阵列,所述接触焊盘的中心阵列与所述接触焊盘的外阵列间隔大于第一距离和第二距离的第三距离;
b)将集成电路安装到所述衬底的上表面上。
c)将多个焊料球贴附在所述接触焊盘上。
15.根据权利要求14的方法,还包括密封所述集成电路的步骤。
16.根据权利要求15的方法,还包括用多个焊线将所述集成电路连接到所述衬底的步骤。
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- 1997-03-07 DE DE69732166T patent/DE69732166T2/de not_active Expired - Lifetime
- 1997-03-07 CN CN97190260A patent/CN1112086C/zh not_active Expired - Lifetime
- 1997-03-07 WO PCT/US1997/003511 patent/WO1997036466A1/en active IP Right Grant
- 1997-03-07 AU AU20701/97A patent/AU2070197A/en not_active Abandoned
- 1997-03-07 IL IL12210797A patent/IL122107A/xx not_active IP Right Cessation
- 1997-03-07 EP EP04021077A patent/EP1482773A1/en not_active Ceased
- 1997-03-07 KR KR1019970708078A patent/KR100288065B1/ko not_active IP Right Cessation
- 1997-03-07 EP EP97908909A patent/EP0835600B1/en not_active Expired - Lifetime
- 1997-10-24 US US08/959,546 patent/US5894410A/en not_active Expired - Lifetime
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1999
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2001
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2005
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2007
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CN100403531C (zh) * | 2004-12-27 | 2008-07-16 | 三洋电机株式会社 | 电路装置及携带设备 |
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CN110707055A (zh) * | 2019-09-11 | 2020-01-17 | 长江存储科技有限责任公司 | 芯片、电子设备 |
CN112751226A (zh) * | 2019-10-29 | 2021-05-04 | 泰科电子日本合同会社 | 插座 |
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Also Published As
Publication number | Publication date |
---|---|
EP0835600A1 (en) | 1998-04-15 |
DE69732166D1 (de) | 2005-02-10 |
US20040262038A1 (en) | 2004-12-30 |
WO1997036466A1 (en) | 1997-10-02 |
IL122107A (en) | 2003-10-31 |
KR100288065B1 (ko) | 2001-05-02 |
US6747362B2 (en) | 2004-06-08 |
IL122107A0 (en) | 1998-04-05 |
US7543377B2 (en) | 2009-06-09 |
EP0835600A4 (en) | 2000-01-12 |
KR19990014736A (ko) | 1999-02-25 |
DE69732166T2 (de) | 2005-12-15 |
JP2014187410A (ja) | 2014-10-02 |
EP0835600B1 (en) | 2005-01-05 |
JP5247281B2 (ja) | 2013-07-24 |
US20080064138A1 (en) | 2008-03-13 |
AU2070197A (en) | 1997-10-17 |
US5894410A (en) | 1999-04-13 |
JPH11506274A (ja) | 1999-06-02 |
EP1482773A1 (en) | 2004-12-01 |
US20060180345A1 (en) | 2006-08-17 |
JP2011160009A (ja) | 2011-08-18 |
JP2008252152A (ja) | 2008-10-16 |
MY123146A (en) | 2006-05-31 |
CN1112086C (zh) | 2003-06-18 |
US20020057558A1 (en) | 2002-05-16 |
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