CN113270389B - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

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Publication number
CN113270389B
CN113270389B CN202011573463.9A CN202011573463A CN113270389B CN 113270389 B CN113270389 B CN 113270389B CN 202011573463 A CN202011573463 A CN 202011573463A CN 113270389 B CN113270389 B CN 113270389B
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resin layer
substrate
semiconductor device
semiconductor chip
wiring substrate
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CN113270389A (zh
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本间荘一
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Kioxia Corp
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Kioxia Corp
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Abstract

本申请涉及一种半导体装置及其制造方法。本实施方式的半导体装置具备配线衬底，所述配线衬底具有：焊盘，电连接于设置在绝缘衬底的配线；及绝缘材，设置在焊盘间。第1半导体芯片在与该配线衬底对向的第1面具有连接于配线衬底的焊盘的金属凸块。第1树脂层设置在绝缘材与第1半导体芯片之间。第2树脂层在配线衬底与第1半导体芯片之间覆盖第1树脂层及金属凸块的周围。第3树脂层在配线衬底上覆盖配线衬底上的构造体。

Description

半导体装置及其制造方法
相关申请的引用
本申请基于2020年02月17日提出申请的在先日本专利申请第2020-024557号的优先权而主张优先权利益，通过引用将其全部内容并入本文中。
技术领域
本实施方式涉及一种半导体装置及其制造方法。
背景技术
半导体芯片具有金属凸块，存在倒装芯片连接于配线衬底上的端子的情况。另外，半导体芯片薄膜化，存在当经过半导体元件的制造步骤时产生翘曲的情况。如果将这种存在翘曲的半导体芯片倒装芯片连接到配线衬底上，半导体芯片有时会有缺损或发生金属凸块与配线衬底的端子的连接不良。
另外，当同时实施倒装芯片连接及树脂密封时，担心密封树脂内的填料或密封树脂本身会进入半导体芯片的凸块与配线衬底的端子之间而导致凸块与端子的连接断裂。另外，当半导体芯片使用低介电膜(Low-k膜)时，担心低介电膜会受到应力而致低介电膜剥离。
发明内容
一实施方式提供一种半导体装置及其制造方法，当将存在翘曲的半导体芯片安装在配线衬底上时，能够将半导体芯片与配线衬底良好地连接。
本实施方式的半导体装置具备配线衬底，所述配线衬底具有：焊盘，电连接于设置在绝缘衬底的配线；及绝缘材，设置在焊盘间。第1半导体芯片在与该配线衬底对向的第1面具有连接于配线衬底的焊盘的金属凸块。第1树脂层设置在绝缘材与第1半导体芯片之间。第2树脂层在配线衬底与第1半导体芯片之间覆盖第1树脂层及金属凸块的周围。第3树脂层在配线衬底上覆盖配线衬底上的构造体。
根据所述构成，可提供一种半导体装置及其制造方法，当将存在翘曲的半导体芯片安装在配线衬底上时，能够将半导体芯片与配线衬底良好地连接。
附图说明
图1A是表示第1实施方式的半导体装置的构成例的剖视图。
图1B是表示第1实施方式的半导体装置的构成例的俯视图。
图2(A)、(B)是表示第1树脂层、第2树脂层及其周边的构成例的剖视图。
图3(A)、(B)是表示第1实施方式的控制器芯片的制造方法的一例的剖视图。
图4(A)、(B)是表示继图3后的制造方法的剖视图。
图5(A)、(B)是表示继图4后的制造方法的剖视图。
图6(A)、(B)是表示继图5后的制造方法的剖视图。
图7(A)～(C)是表示继图6后的制造方法的剖视图。
图8是表示继图7后的制造方法的剖视图。
图9是表示继图8后的制造方法的剖视图。
图10(A)、(B)是表示控制器芯片的第2面中的金属凸块及第1树脂层的布局的俯视图。
图11是表示第2实施方式的半导体装置的制造方法的一例的剖视图。
图12是表示继图11后的制造方法的剖视图。
图13是表示第3实施方式的半导体装置的制造方法的一例的剖视图。
图14是表示第4实施方式的半导体装置的制造方法的一例的概略图。
具体实施方式
以下，参照附图对本发明的实施方式进行说明。本实施方式并不限定本发明。在以下的实施方式中，配线衬底的上下方向表示使搭载半导体芯片的面朝上时的相对方向，有时与遵循重力加速度的上下方向不同。附图是示意图或概念图，各部分的比率等未必与实物相同。在说明书与附图中，对与上文关于已出现的附图所叙述的要素相同的要素标注相同符号并适当省略详细说明。
(第1实施方式)图1A是表示第1实施方式的半导体装置的构成例的剖视图。本实施方式的半导体装置1例如是NAND(Not AND，与非)型闪速存储器。半导体装置1具备配线衬底10、第1树脂层20、作为第1半导体芯片的控制器芯片30、第2树脂层35、第3树脂层90、第4树脂层40、间隔件50、作为第2半导体芯片的NAND型存储器芯片(以下，存储器芯片)60、及键合线80。第3树脂层90是所谓模具树脂，为密封树脂。此外，本实施方式并不限定于NAND型闪速存储器，也可以应用于倒装芯片连接的半导体装置。
配线衬底10具备绝缘衬底11、配线12、接触插塞13、金属焊盘14、焊料球15及阻焊剂16。绝缘衬底11例如使用玻璃环氧树脂、陶瓷(氧化铝系、AlN系)等绝缘材料。配线12设置在绝缘衬底11的正面、背面或内部，将金属焊盘14与焊料球15电连接。接触插塞13以贯通绝缘衬底11内的方式设置，将配线12间电连接。金属焊盘14在配线衬底10的正面与控制器芯片30的金属凸块31连接。焊料球15在配线衬底10的背面连接于配线12。配线12、接触插塞13及金属焊盘14例如使用Cu、Ni、Au、Sn、Ag、Bi、Pd等导电性材料的单体膜、复合膜、合金膜。焊料球15例如使用Sn、Ag、Cu、Au、Bi、Zn、In、Sb、Ni等的单体膜、复合膜、合金膜等导电性材料。阻焊剂16设置在配线衬底10的正面及背面，且设置在相邻金属焊盘14间或相邻焊料球15间，将它们电绝缘。另外，阻焊剂16被覆配线12的正面而保护配线12。
控制器芯片30具有：第1面F1，与配线衬底10对向；及第2面F2，位于第1面F1的相反侧。在第1面F1设置着金属凸块31。金属凸块31连接(熔接)于配线衬底10的金属焊盘14。也就是说，控制器芯片30倒装芯片连接于配线衬底10上。金属凸块31例如使用焊料等导电性金属。半导体芯片的衬底可以是硅衬底、GaAg衬底、SiC衬底等。
控制器芯片30薄化，且在第1面F1或第2面F2上具有半导体元件。控制器芯片30存在当形成半导体元件时产生翘曲的情况。控制器芯片30的翘曲例如可能呈山形、碗形或鞍形。图1A中没有图示控制器芯片30的翘曲。
第1树脂层20设置在配线衬底10与控制器芯片30的第1面F1之间。第1树脂层20呈柱状，且将配线衬底10与控制器芯片30粘接。
第1树脂层20例如使用酚系、聚酰亚胺系、聚酰胺系、丙烯酸系、环氧系、PBO(Polybenzoxazole，聚苯并恶唑)系、硅酮系、苯并环丁烯系等树脂、或它们的混合材料、复合材料。
第2树脂层35将配线衬底10与控制器芯片30的第1面F1之间填埋。第2树脂层35例如为底部填充胶，使用液状类型的非导电性树脂材料。第2树脂层35覆盖第1树脂层20、金属焊盘14及金属凸块31的周围。由此，第1树脂层20及第2树脂层35支援金属焊盘14与金属凸块31的连接，而抑制金属焊盘14与金属凸块31之间的断裂。另外，第2树脂层35可以保护配线衬底10与控制器芯片30之间的第1树脂层20。由于利用第1树脂层20将控制器芯片30与配线衬底10粘接，且第2树脂层35保护第1树脂层20，所以控制器芯片30的翘曲减轻。
第2树脂层35例如可以使用环氧树脂、硅酮树脂、环氧/硅酮混合树脂、丙烯酸系树脂、聚酰亚胺树脂、聚酰胺树脂、或酚树脂等作为基底材料。
另外，第2树脂层35包含还原性材料、例如醇类或有机酸作为添加材料，以将形成在金属凸块31的正面的金属氧化膜去除。作为醇类，可以列举从甲醇、乙醇、异丙醇、聚乙烯醇、乙二醇、丙二醇、二乙二醇、甘油、三乙二醇、四乙二醇、卡必醇、2-乙氧基乙醇等中选择的至少1种。另外，也可以是烷基醚系材料。例如，可以列举二乙二醇单丁醚、三乙二醇二甲醚等。也可以使用烷烃、胺化合物等。例如，可以列举甲酰胺、二甲基甲酰胺等。它们既可以单独使用，也可以将多种混合。另外，也可以向这些材料中添加有机酸。作为有机酸，可以列举甲酸、乙酸、苯甲酸、松香酸、长叶松酸、脱氢松香酸、异海松酸、新松香酸、海松酸、松香等。它们既可以单独使用，也可以将多种混合。第2树脂层35利用点胶法(喷射法、螺旋法)、印刷法等方法涂布。另外，第2树脂层35具有将位于金属凸块31或金属焊盘14的正面的氧化膜(SnO、SnO2)等还原而去除的功能。
在控制器芯片30周围的配线衬底10上介隔第4树脂层40设置着间隔件50。第4树脂层40例如使用DAF(Die Attach Film，芯片粘结膜)。间隔件50通过第4树脂层40而粘接在配线衬底10上。间隔件50是与控制器芯片30的第2面F2的高度大致相等的高度，支撑存储器芯片60。如图1B所示，间隔件50例如具有四边形框形状及以四边形包围控制器芯片30的形状，设置成在配线衬底10的正面上包围控制器芯片30的四周。图1B是表示第1实施方式的半导体装置的构成例的俯视图。间隔件50例如使用硅、玻璃、陶瓷、绝缘衬底、金属板等材料。也可以在间隔件50上形成聚酰亚胺树脂、聚酰胺树脂、环氧树脂、丙烯酸系树脂、酚树脂、硅酮树脂、PBO(PolyBenzOxazole)树脂等的有机膜，以提高密接性。
存储器芯片60设置在控制器芯片30的上方，且通过第4树脂层固定在控制器芯片30及间隔件50上。存储器芯片60例如具有由多个存储单元三维配置而成的立体型存储单元阵列。第4树脂层40设置在控制器芯片30的第2面F2及间隔件50上，将存储器芯片60固定在控制器芯片30及间隔件50上。
多个第4树脂层40及多个存储器芯片60也可以交替地积层在控制器芯片30及间隔件50上。即使像这样将多个存储器芯片60积层在控制器芯片30的上方，由于减轻了控制器芯片30的翘曲，所以多个存储器芯片60也不易受控制器芯片30翘曲的影响。也就是说，多个存储器芯片60不易产生缺损，而不易从第4树脂层40剥落。
键合线80将存储器芯片60的金属焊盘70与配线衬底10的任一个金属焊盘14之间电连接。第3树脂层90被覆而保护控制器芯片30、存储器芯片60、键合线80等配线衬底10上的整个构造。另外，第3树脂层90填充在配线衬底10与控制器芯片30的第1面F1之间，且以被覆第1树脂层20及金属凸块31周围的方式设置。
此处，对第1树脂层20及第2树脂层35详细地进行说明。
图2(A)及图2(B)是表示第1树脂层20、第2树脂层35及其周边的构成例的剖视图。第1树脂层20设置在控制器芯片30的第1面F1与配线衬底10的阻焊剂16之间，将控制器芯片30与配线衬底10粘接。第1树脂层20的热膨胀系数比配线衬底(例如，玻璃环氧树脂)10、控制器芯片(例如，硅)30及第3树脂层90各自的热膨胀系数大。另外，控制器芯片(例如，硅)30的热膨胀系数比配线衬底(例如，玻璃环氧树脂)10的热膨胀系数小，因此，当将控制器芯片30安装在配线衬底10时，配线衬底10比控制器芯片30更会根据温度而大幅伸缩。例如，硅单晶的热膨胀系数约为3.5ppm/℃，玻璃环氧树脂的热膨胀系数约为17ppm/℃。因此，如果第1树脂层20的热膨胀系数比配线衬底10及控制器芯片30的热膨胀系数小，那么当将控制器芯片30安装在配线衬底10时，担心第1树脂层20无法追随配线衬底10与控制器芯片30的伸缩差而致剥离。因此，第1树脂层20的热膨胀系数优选处于20ppm/℃～100ppm/℃的范围。更优选第1树脂层20的热膨胀系数为30ppm/℃～60ppm/℃的范围。如果第1树脂层20的热膨胀系数小于20ppm/℃，那么接近配线衬底10的热膨胀系数，如此会担心第1树脂层20无法追随配线衬底10与控制器芯片30的伸缩差而致剥离。反之，如果第1树脂层20的热膨胀系数大于100ppm/℃，则会担心第1树脂层20过度伸长而致控制器芯片30从配线衬底10剥落。这些情况下，金属凸块31会断裂或从金属焊盘14剥落而导致连接不良。因此，第1树脂层20的热膨胀系数优选比配线衬底(例如，玻璃环氧树脂)10及控制器芯片(例如，硅)30各自的热膨胀系数大。更优选第1树脂层20的热膨胀系数大于第3树脂层90的热膨胀系数，从而能够抑制翘曲。
另外，第1树脂层20的弹性模量比配线衬底(例如，玻璃环氧树脂)10的阻焊剂16及金属凸块(例如，焊料)31各自的弹性模量低。另外，如果第1树脂层20的弹性模量比阻焊剂16及金属凸块31的弹性模量高(硬)，那么担心不会使控制器芯片30相对于配线衬底10的翘曲缓和而致第1树脂层20剥落。因此，第1树脂层20的弹性模量优选处于1MPa～3GPa的范围。更优选第1树脂层20的弹性模量为10MPa～1GPa的范围。如果第1树脂层20的弹性模量低于1MPa，那么第1树脂层20过度柔软，而难以将控制器芯片30固定在配线衬底10。如果第1树脂层20的弹性模量超过3GPa，那么第1树脂层20过硬，担心会因控制器芯片30的翘曲而从控制器芯片30或配线衬底10剥离。这些情况下，金属凸块31会断裂或从金属焊盘14剥落而导致连接不良。因此，第1树脂层20的弹性模量优选比作为绝缘层的阻焊剂16及金属凸块(例如，焊料)31各自的弹性模量低。更优选第1树脂层20的弹性模量低于第3树脂层90的弹性模量，从而能够抑制翘曲。
接下来，对第2树脂层35详细地进行说明。
第2树脂层35设置在控制器芯片30的第1面F1与配线衬底10的阻焊剂16之间，被覆而保护第1树脂层20、金属焊盘14及金属凸块31。第2树脂层35含有硅氧化物(二氧化硅)等线膨胀系数相对较小的填料。另外，在本实施方式中，第1树脂层20中不含填料，但也可以使用含有填料的第1树脂层20。在本实施方式中，第2树脂层35中包含的填料浓度比第1树脂层20中包含的填料浓度高。因此，第2树脂层35的热膨胀系数比第1树脂层20的热膨胀系数低。另外，在金属凸块31的回流焊后，第2树脂层35的弹性模量比第1树脂层20的弹性模量高。
通过提高第2树脂层35的填料浓度，第2树脂层35的热膨胀系数相对变小。由此，第2树脂层35能够抑制控制器芯片30与配线衬底10之间的热膨胀差，从而能够抑制控制器芯片30及配线衬底10其中一个的伸长或收缩。
另外，通过使第2树脂层35的弹性模量高于第1树脂层20的弹性模量，能够使金属凸块31及第1树脂层20的保护性能提高。由此，即使之后进行金属凸块31的回流焊，也能够抑制金属凸块31或第1树脂层20因应力而断裂。
例如，对本实施方式的半导体装置1进行温度循环试验，调查它的可靠性。温度循环试验进行了3000个循环，该循环是将半导体装置1暴露在-55℃的气氛中30分钟，暴露在25℃的气氛中5分钟，以及暴露在125℃的气氛中30分钟。在本实施方式的半导体装置1中，在金属凸块31与金属焊盘14的连接部位没有产生断裂。像这样，在本实施方式的半导体装置1中，通过第1树脂层20及第2树脂层35保护金属凸块31与金属焊盘14的连接部位。
即使控制器芯片30具有翘曲，第1树脂层20也会将控制器芯片30粘接在配线衬底10，且第2树脂层35会保护第1树脂层20及金属凸块31的周围。由此，抑制控制器芯片30从配线衬底10剥落。另外，第1树脂层20及第2树脂层35能够某种程度地矫正控制器芯片30的翘曲。因此，在控制器芯片30与配线衬底10之间，金属凸块31与金属焊盘14能够连接，且金属凸块31不易断裂。结果，能够抑制金属凸块31与金属焊盘14之间的连接不良。进而，由于减轻了控制器芯片30的翘曲，所以能够抑制积层在控制器芯片30上的存储器芯片60产生缺损。结果，即使将产生翘曲的控制器芯片30或存储器芯片60安装在配线衬底上，也能够将半导体芯片与配线衬底良好地连接。
此外，图1A中，在同一个半导体封装内设置着倒装芯片连接的控制器芯片30及打线接合连接的存储器芯片60这两者。也就是说，图1A中，成为混合型多芯片封装。但是，本实施方式中，多个存储器芯片60也可以与控制器芯片30同样地进行倒装芯片连接。在该情况下，控制器芯片30及多个存储器芯片60也可以经由贯通电极(TSV(Through Silicon Via，硅穿孔))而电连接。此外，图2(A)及图2(B)中，在控制器芯片30上没有第3树脂层90，但在控制器芯片的上部没有搭载其它芯片等情况下，在控制器芯片30上也可以存在第3树脂层90。
接下来，对本实施方式的半导体装置1的制造方法进行说明。
图3(A)～图9是表示第1实施方式的控制器芯片30的制造方法的一例的剖视图。首先，如图3(A)所示，在半导体晶圆W上形成半导体元件2及金属焊盘4。半导体晶圆W例如是硅、GaAs、SiC等半导体晶圆。半导体元件2例如可以是CMOS(Complementary Metal OxideSemiconductor，互补式金属氧化物半导体)电路等。金属焊盘4例如使用Al、Cu、Au、Ni、Pd、Ag等的单体膜、复合膜、合金膜即可。
接着，以被覆半导体元件2的方式形成保护绝缘膜3。使用光刻技术及蚀刻技术，对保护绝缘膜3进行加工，使金属焊盘4的一部分露出。保护绝缘膜3例如可以使用氧化硅膜、氮化硅膜、聚酰亚胺树脂、酚树脂、PBO(PolyBenzOxazole)树脂等绝缘材料。另外，也可以是这些绝缘材料的复合膜。
接着，如图3(B)所示，使用溅镀法、蒸镀法、CVD(Chemical Vapor Deposition，化学气相沉积)法、无电解镀覆法等，在保护绝缘膜3及金属焊盘4上形成障壁金属BM。障壁金属BM例如使用Ti、TiN、Cr、CrN、Cu、Ni、Au、Pd、W等导电性金属的单体膜、氮化膜、复合膜、合金膜即可。例如，利用溅镀法依次形成Ti及Cu。Ti的膜厚例如约为0.1μm，Cu的膜厚约为0.3μm。
接着，如图4(A)所示，使用光刻技术，在障壁金属BM上形成抗蚀剂PR。抗蚀剂PR以使金属焊盘14的区域开口的方式图案化。抗蚀剂PR的厚度例如约为40μm。开口的大小例如约为20μm。抗蚀剂PR开口间的间距约为50μm。为了将抗蚀剂PR的开口部的残渣去除，也可以在抗蚀剂PR开口后，进行使用氧等的灰化处理。
接着，如图4(B)所示，在金属焊盘14上的障壁金属BM上进行金属镀覆。例如，在障壁金属BM上形成金属31a、31b、31c。金属31a例如可以使用铜。金属31b例如可以使用镍。金属31c例如可以使用焊料(SnAg)。金属31a～31c作为金属凸块31发挥功能。焊料例如使用Sn、Ag、Cu、Au、Bi、Zn、In、Sb、Ni等的单体膜、复合膜、合金膜即可。金属31c可以使用印刷法、球搭载法而形成。金属31a例如是厚度约为20μm的铜。金属31b例如是厚度约为3μm的镍。金属31c例如是厚度约为12μm的SnAg。
接着，使用利用氧等的灰化处理等将抗蚀剂PR去除之后，如图5(A)所示，将金属凸块31用作掩模而对障壁金属BM进行蚀刻。由此，障壁金属BM只残留在金属凸块31下。例如，对铜进行蚀刻的情况下，使用柠檬酸与过氧化氢的混合液即可。对钛进行蚀刻的情况下，使用氢氟酸或过氧化氢水等即可。
接着，如图5(B)所示，通过热处理对金属凸块31的金属31c(例如，焊料)进行回流焊(熔融)，使金属凸块31的前端变圆。关于回流焊处理，既可以涂布助焊剂在N2气氛中进行回流焊，也可以在甲酸气体、H2气体、H2及N2的混合气体等还原气氛中，一边将焊料的氧化膜还原，一边进行回流焊。也可以利用Ar等离子体等将焊料的氧化膜去除而进行回流焊处理。例如，涂布水溶性助焊剂后，在260℃的N2气氛中执行回流焊30秒钟。在使用助焊剂的情况下，回流焊后进行清洗，以将助焊剂去除。当为水溶性助焊剂时，使用纯水等清洗助焊剂，当为松香系助焊剂时，使用醇系等溶剂清洗助焊剂。
接着，如图6(A)所示，将第1树脂层20的材料涂布在第1面F1的金属凸块31及保护绝缘膜3上。此处，第1树脂层被调整为具有感光性。第1树脂层20的材料以比金属凸块31薄的膜厚(例如，约30μm)涂布。由于第1树脂层20为感光性材料，所以如图6(B)所示，可以使用光刻技术将第1树脂层20图案化。由此，第1树脂层20呈柱状选择性地残留(形成)在保护绝缘膜3上的指定部位。此外，示出将感光性的第1树脂层20涂布在控制器芯片30(半导体芯片)上的例子，但感光性的第1树脂层20也可以形成在配线衬底10上，还可以形成在控制器芯片30与配线衬底10这两者。
图7(A)表示形成半导体元件后的半导体晶圆W。接着，对半导体晶圆的背面进行研磨使它变薄。在多个控制器芯片30间存在切割线DL，如下所述，通过沿该切割线DL切断，而将控制器芯片30单片化。
接着，如图7(B)所示，在张设在晶圆环130内的可挠性树脂带131上贴附半导体晶圆W。接着，使用激光振荡器150，从半导体晶圆W的正面对与切割线DL对应的部分照射激光光束。由此，在半导体晶圆W的切割线DL上形成槽。
接着，如图7(C)所示，使用切割刀160，沿半导体晶圆W的切割线DL切断。由此，在树脂带131上，半导体晶圆W单片化成控制器芯片30。也可以不照射激光光束，而只通过刀片切割进行单片化。
接着，对树脂带131照射紫外线，降低控制器芯片30与树脂带131之间的粘接剂的粘着性，使得能够将控制器芯片30从树脂带131上取下。另外，进行外观检查等。以这种方式完成控制器芯片30。此外，存储器芯片60只要将例如存储单元阵列作为半导体元件2形成在半导体晶圆W上即可。存储器芯片60的其它制造步骤与控制器芯片30的制造步骤相同，因此省略说明。
接下来，对将控制器芯片30安装到配线衬底10上的方法进行说明。在配线衬底10形成着阻焊剂16。阻焊剂16使用环氧系、酚系、聚酰亚胺系、聚酰胺系、丙烯酸系、PBO系、硅酮系等树脂、它们的混合材料、复合材料。另外，阻焊剂16中也可以包含二氧化硅等填料。
图8～图9是表示将控制器芯片30安装到配线衬底10上的组装步骤的一例的剖视图。首先，配线衬底10也可以进行烘烤，以去掉水分。或者，也可以进行等离子体处理，以使配线衬底10与第1树脂层20的密接性提高。
接着，如图8所示，使用压接装置100拾取控制器芯片30，并使用配线衬底10的对准标记将控制器芯片30的位置对准。接着，压接装置100将控制器芯片30热压接于配线衬底10，将控制器芯片30的金属凸块31与配线衬底10的金属焊盘14倒装芯片连接。例如，将搭载配线衬底10的平台的温度加热到约100℃，将吸附控制器芯片30的头的温度加热到约200℃。由此，使第1树脂层20的温度为约150℃，使第1树脂层20软化而利用第1树脂层20将控制器芯片30与配线衬底10粘接。金属凸块31与金属焊盘14间也可以存在1μm以下左右的间隙。此外，利用压接装置100的加热方法可以是恒温的，或者，也可以是脉冲加热。
接着，向配线衬底10与控制器芯片30之间供给第2树脂层35。第2树脂层35的供给方法例如可以是点胶法(喷射法、螺旋法)、印刷法等。如上所述，第2树脂层35是在作为基底材料的树脂中添加去除金属氧化膜的还原性材料所得的液体或膏状的材料。第2树脂层35通过毛细管现象而导入到配线衬底10与控制器芯片30之间。第2树脂层35填充在金属凸块31及金属焊盘14的周围，将形成在金属凸块31及金属焊盘14的金属氧化膜(自然氧化膜)去除。由此，使金属凸块31与金属焊盘14良好地连接。另外，第2树脂层35也填充在第1树脂层20的周围。与此同时，第2树脂层35沿着控制器芯片30的侧壁被覆到它的中途为止。
接着，将控制器芯片30及配线衬底10放进没有图示的回流焊炉等进行加热。也可以是使用激光的回流焊。将温度上升到金属凸块31的熔点以上，使金属凸块31熔融。通过像这样对金属凸块31进行回流焊，而将金属凸块31与金属焊盘14确实地连接。此处，对金属凸块31进行回流焊时第2树脂层35的粘度设为100Pa·S～30000Pa·S。当第2树脂层35的粘度小于100Pa·S时，担心第2树脂层35无法保护金属凸块31与金属焊盘14之间的连接而导致金属凸块31断裂。另一方面，当第2树脂层35的粘度超过30000Pa·S时，反而担心会妨碍金属凸块31与金属焊盘14的连接。
接着，将配线衬底10等放进烘箱进行加热，以使第2树脂层35硬化。
另外，回流焊后，进一步利用烘箱加热后，硬化的第2树脂层35的弹性模量设为200MPa～15GPa。当第2树脂层35的弹性模量小于200MPa时，担心第2树脂层35无法充分保护金属凸块31与金属焊盘14之间的连接而导致它们的连接断裂。另一方面，当第2树脂层35的弹性模量超过15GPa时，会对控制器芯片30及配线衬底10施加应力，从而控制器芯片30及配线衬底10的翘曲变大。这会使之后的组装步骤中的搬送变难。
接着，如图1A所示，将间隔件50利用第4树脂层40粘接在配线衬底10上。将多个存储器芯片60利用第4树脂层40粘接在控制器芯片30及间隔件50上。由此，在配线衬底10上形成控制器芯片30及多个存储器芯片60的积层体。接着，根据需要利用键合线80进行打线接合。接着，将配线衬底10上的控制器芯片30、多个存储器芯片60及第2树脂层35等构造体利用第3树脂层90密封。
然后，在配线衬底10的背面形成焊料球15。进而，通过对配线衬底10进行切割而将半导体装置1单片化。由此，完成半导体装置1。
根据本实施方式，在倒装芯片连接时，第1树脂层20预先将控制器芯片30与配线衬底10之间粘接，然后，通过回流焊，将金属凸块31与金属焊盘14连接。由此，因控制器芯片30及配线衬底10的翘曲所致的金属凸块31的断裂得到抑制。控制器芯片30及配线衬底10的翘曲随着它们的厚度变薄而变大。但是，根据本实施方式，即使控制器芯片30的厚度在100μm以下，且配线衬底10的厚度在200μm以下，也不会产生金属凸块31与金属焊盘14的连接不良。
另外，在本实施方式中，压接装置100只要将控制器芯片30的第1树脂层20与配线衬底10粘接即可。因此，粘接时间较短，减少了压接装置100的处理量。
另外，如果第1树脂层20将控制器芯片30与配线衬底10之间粘接，那么金属凸块31与金属焊盘14接触。或者，金属凸块31与金属焊盘14之间的间隙成为1μm以下。因此，当供给第2树脂层35时，第2树脂层35中包含的填料不会进入金属凸块31与金属焊盘14之间。因此，金属凸块31与金属焊盘14的连接的可靠性提高。例如，即使金属凸块31间的间距微细为100μm以下时，控制器芯片30与配线衬底10也利用第1树脂层20及第2树脂层35得以固定。因此，可抑制控制器芯片30在金属凸块31的回流焊过程中移动。结果，金属凸块31与金属焊盘14的连接不良得到抑制。
在控制器芯片30使用低介电膜的情况下，控制器芯片30与配线衬底10也利用第1树脂层20及第2树脂层35得以固定，因此，能够抑制在金属凸块31的回流焊时应力集中在金属凸块31附近的低介电膜。由此，能够抑制在金属凸块31的回流焊过程中低介电膜剥落。
对金属凸块31进行回流焊时第2树脂层35的粘度设为100Pa·S～30000Pa·S。由此，第2树脂层35不会妨碍金属凸块31与金属焊盘14的连接，且能够保护金属凸块31与金属焊盘14之间的连接。
另外，回流焊后，硬化的第2树脂层35的弹性模量设为200MPa～15GPa。由此，不太会对控制器芯片30及配线衬底10施加应力，而能够充分保护金属凸块31与金属焊盘14之间的连接。
(变化例1)图10(A)及图10(B)是表示控制器芯片30的第2面F2中的金属凸块31及第1树脂层20的布局的俯视图。如图10(A)所示，第1树脂层20也可以与金属凸块31相隔并且呈矩阵状地二维配置在由金属凸块31包围的区域的内侧。金属凸块31与第1树脂层20的距离例如为10μm～1mm的范围。如果金属凸块31与第1树脂层20的距离小于10μm，担心在第1树脂层20的曝光及显影时第1树脂层20会产生应变或变形。另一方面，如果金属凸块31与第1树脂层20的距离超过1mm，担心控制器芯片30的翘曲得不到矫正而导致第1树脂层20剥落。
另外，第1树脂层20的粘接面积也可以比金属凸块31与金属焊盘14的接触面积大。由此，能够更牢固地加强金属凸块31与金属焊盘14之间的连接。另外，能够矫正控制器芯片30的翘曲。另外，从上方观察呈柱状的一个第1树脂层20时的面积比从上方观察一个金属凸块31时的面积大。
如图10(B)所示，第1树脂层20也可以大致均匀地设置在由金属凸块31包围的区域的内外。通过像这样在金属凸块31的周围设置第1树脂层20，能够将整个控制器芯片30粘接在配线衬底10，从而能够进一步矫正控制器芯片30的翘曲。
(第2实施方式)图11及图12是表示第2实施方式的半导体装置的制造方法的一例的剖视图。经过图3(A)～图7(C)所示的步骤后，如图11所示，在配线衬底10的金属焊盘14间的阻焊剂层16上涂布第1树脂层20。此时，第1树脂层20为液体或膏状。第1树脂层20的涂布方法例如可以是点胶法(喷射法、螺旋法)、印刷法等。此时，与第1实施方式不同，第1树脂层20也可以不具有感光性。
接着，与第1实施方式同样地，将控制器芯片30倒装芯片连接到配线衬底10上。由此，如图12所示，第1树脂层20将控制器芯片30与配线衬底10之间连接。第1树脂层20通过进行热处理而硬化。
然后，经过图9及图1所示的步骤，而完成第2实施方式的半导体装置1。此外，第1树脂层20及第2树脂层35的特性与第1实施方式的第1树脂层20及第2树脂层35的特性相同。因此，第2实施方式可以获得与第1实施方式相同的效果。
也可以像这样将第1树脂层20选择性地供给至配线衬底10的指定部位，然后，将控制器芯片30粘接在配线衬底10上。此时，将控制器芯片30的金属凸块31与配线衬底10的焊盘连接，且将第1树脂层20粘接在控制器芯片30。
此外，在第2实施方式中，第1树脂层20以液体或膏状的形式供给。但是，第1树脂层20也可以是膜状的树脂。在该情况下，在图11所示的步骤中，将膜状的第1树脂层20选择性地贴附在配线衬底10的金属焊盘14间的阻焊剂层16的指定部位上即可。也就是说，也可以在配线衬底10的指定部位选择性地形成第1树脂层20，然后，将控制器芯片30粘接在配线衬底10上。
(第3实施方式)图13是表示第3实施方式的半导体装置的制造方法的一例的剖视图。在第3实施方式中，在控制器芯片30侧贴附第1树脂层20。将具有第1树脂层20的控制器芯片30倒装芯片连接到配线衬底10上。
例如，经过图3(A)～图7(C)所示的步骤后，如图13所示，将第1树脂层20贴附在控制器芯片30的金属凸块31间。第1树脂层20的材料可以与第1实施方式的第1树脂层20的材料相同。
关于膜状的第1树脂层20，只要将预先切割成指定尺寸的第1树脂层20贴附到控制器芯片30即可。或者，关于膜状的第1树脂层20，也可以将尺寸较大的膜状的第1树脂层20一边利用模具进行冲切一边贴附到控制器芯片30。或者，也可以在控制器芯片30上设置感光性的液状或膜状的第1树脂层20之后，通过光刻法形成为所需图案。
然后，经过图9及图1所示的步骤，而完成第3实施方式的半导体装置1。第3实施方式可以获得与第1实施方式相同的效果。
(第4实施方式)图14是表示第4实施方式的半导体装置的制造方法的一例的概略图。
在第4实施方式中，经过图3(A)～图8所示的步骤后，在第1回流焊炉110中，对粘接后的控制器芯片30及配线衬底10进行热处理，将配线衬底10等所吸收的水分排出(第1热处理步骤)。第1回流焊炉的温度设为金属凸块的熔融温度以下且能够将水分排出的温度，例如100～200℃。接着，在树脂涂布装置120中，从注射器121将第2树脂层35供给到控制器芯片30与配线衬底10之间。然后，在第2回流焊炉135中，再次对控制器芯片30及配线衬底10进行热处理而使金属凸块31熔融，连接到配线衬底10的焊盘，并使第2树脂层35硬化(第2热处理步骤)。像这样，第1回流焊处理(第1热处理步骤)、第2树脂层35的供给及作为第2回流焊处理的金属凸块31的熔融、第2树脂层的硬化处理(第2热处理步骤)也可以在一系列连续的装置中执行。由此，能够抑制配线衬底10吸湿，从而能够抑制第2树脂层内产生孔隙。
第4实施方式的其它构成及制造步骤可以与第1实施方式的构成及制造步骤相同。由此，第4实施方式也可以获得第1实施方式的效果。
变化例等(a)在所述实施方式中，第3树脂层90的弹性模量处于5GPa～50GPa的范围，且大于第2树脂层35的弹性模量。第4树脂层40的弹性模量处于100MPa～5GPa的范围，且大于第1树脂层20的弹性模量，但小于第2树脂层35的弹性模量。也就是说，第1树脂层20、第2树脂层35、第3树脂层90、第4树脂层40的弹性模量具有第1树脂层20＜第4树脂层40＜第2树脂层35＜第3树脂层90的关系。通过设为这种关系，能够进一步防止衬底的翘曲，并且保护连接。(b)在所述实施方式中，第2树脂层35的热膨胀系数处于15ppm/℃～50ppm/℃的范围，且大于第3树脂层90的热膨胀系数。第3树脂层90的热膨胀系数处于5ppm/℃～30ppm/℃的范围。第4树脂层40的热膨胀系数处于50ppm/℃～150ppm/℃的范围，且大于第1树脂层20的热膨胀系数。也就是说，第1树脂层20、第2树脂层35、第3树脂层90、第4树脂层40的热膨胀系数具有第3树脂层90＜第2树脂层35＜第1树脂层20＜第4树脂层40的关系。通过设为这种关系，能够进一步防止树脂彼此的剥离，并且保护连接。
对本发明的若干实施方式进行了说明，但这些实施方式是作为例子而提出的，并不意图限定发明的范围。这些实施方式能够以其它多种方式实施，能够在不脱离发明主旨的范围内进行各种省略、置换、变更。这些实施方式或其变化包含在发明的范围或主旨中，且同样包含在权利要求书所记载的发明及其均等的范围内。

Claims (18)

1.一种半导体装置，具备：
衬底，在正面设置着多个焊盘；
第1半导体芯片，在与该衬底对向的第1面具有连接于所述多个焊盘的多个金属凸块；
第1树脂层，连接所述正面与所述第1半导体芯片；
第2树脂层，在所述衬底与所述第1半导体芯片之间覆盖所述第1树脂层及所述金属凸块的周围；及
第3树脂层，覆盖所述衬底与所述第1半导体芯片，其中
所述第1及所述第2树脂层包含填料，且所述第2树脂层中的填料浓度高于所述第1树脂层中的填料浓度。
2.根据权利要求1所述的半导体装置，其中所述衬底在内部包含配线，且
所述多个焊盘连接于所述配线。
3.根据权利要求1所述的半导体装置，其中所述第2树脂层的热膨胀系数小于所述第1树脂层的热膨胀系数。
4.根据权利要求1所述的半导体装置，其中所述第2树脂层的弹性模量大于所述第1树脂层的弹性模量。
5.根据权利要求1所述的半导体装置，其中所述第2树脂层覆盖所述第1半导体芯片的侧面的一部分及所述多个金属凸块中的至少1个金属凸块的侧面。
6.根据权利要求5所述的半导体装置，其还具备设置在所述衬底上的第1绝缘材，且所述第2树脂层还覆盖所述第1绝缘材的一部分。
7.根据权利要求1所述的半导体装置，其中所述第1树脂层呈多个柱状。
8.根据权利要求7所述的半导体装置，其中从上方观察所述多个柱状的所述第1树脂层中的一个时的面积比从上方观察所述多个金属凸块中的一个时的面积大。
9.一种半导体装置的制造方法，
在第1半导体芯片或衬底中的一个形成第1树脂层，
使所述第1半导体芯片或所述衬底中的一个所包含的金属凸块对准另一个所包含的焊盘，
在所述第1半导体芯片形成有所述第1树脂层的情况下，将所述第1树脂层连接于所述衬底，或者，在所述衬底形成有所述第1树脂层的情况下，将所述第1树脂层连接于所述第1半导体芯片，
在所述衬底与所述第1半导体芯片之间形成包含还原剂的第2树脂层，
对所述衬底或/及所述第1半导体芯片进行第1加热，以使所述金属凸块与所述焊盘相互连接，
在所述第1加热之后的步骤中，使所述第2树脂层硬化，
以覆盖所述衬底及所述第1半导体芯片的方式形成第3树脂层，其中
所述第1及所述第2树脂层包含填料，且所述第2树脂层中的填料浓度高于所述第1树脂层中的填料浓度。
10.根据权利要求9所述的半导体装置的制造方法，其中所述第1树脂层是光感光性树脂，且通过光刻法而图案化。
11.根据权利要求9所述的半导体装置的制造方法，其中，在所述第1加热之前的步骤中，在形成所述第2树脂层之前，以使所述第1树脂层软化的方式对所述衬底或/及所述第1半导体芯片进行第2加热。
12.根据权利要求11所述的半导体装置的制造方法，其中所述第2加热、及所述第2加热后的所述第1加热是在不将所述衬底暴露在周围气氛的状态下进行。
13.根据权利要求9所述的半导体装置的制造方法，其中所述第1半导体芯片通过倒装芯片法而连接于衬底。
14.根据权利要求9所述的半导体装置的制造方法，其中在所述第1半导体芯片或所述衬底中的一个形成第1树脂层时，所述第1树脂层形成在所述第1半导体芯片。
15.根据权利要求9所述的半导体装置的制造方法，其中在所述第1半导体芯片或所述衬底中的一个形成第1树脂层时，所述第1树脂层形成在所述衬底。
16.根据权利要求9所述的半导体装置的制造方法，其中所述第1树脂层呈柱状。
17.根据权利要求9所述的半导体装置的制造方法，其中所述第2树脂层的热膨胀系数小于所述第1树脂层的热膨胀系数。
18.根据权利要求9所述的半导体装置的制造方法，其中所述第2树脂层的弹性模量大于所述第1树脂层的弹性模量。
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