CN112599486A - 半导体模块和半导体模块的制造方法 - Google Patents

半导体模块和半导体模块的制造方法 Download PDF

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Publication number
CN112599486A
CN112599486A CN202011059608.3A CN202011059608A CN112599486A CN 112599486 A CN112599486 A CN 112599486A CN 202011059608 A CN202011059608 A CN 202011059608A CN 112599486 A CN112599486 A CN 112599486A
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Prior art keywords
wiring board
metal wiring
semiconductor element
main surface
semiconductor module
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CN202011059608.3A
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Inventor
堀元人
池田良成
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Fuji Electric Co Ltd
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Fuji Electric Co Ltd
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Publication of CN112599486A publication Critical patent/CN112599486A/zh
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Abstract

本发明提供半导体模块和半导体模块的制造方法。降低电感并实现小型化。半导体模块包括：第1金属布线板，构成P端子；第2金属布线板，构成N端子；第3金属布线板，构成输出端子；第1半导体元件，集电极朝向第1金属布线板的一主面地配置于第1金属布线板的一主面；第2半导体元件，集电极朝向第3金属布线板的一主面地配置于第3金属布线板的一主面。第2金属布线板隔着绝缘材料配置于第1金属布线板的一主面。第3金属布线板以一主面朝向第1金属布线板的方式配置。第1半导体元件和第2半导体元件以第1半导体元件的发射极与第3金属布线板的一主面连接且第2半导体元件的发射极与第2金属布线板的一主面连接的方式表背相反地配置。

Description

半导体模块和半导体模块的制造方法
技术领域
本发明涉及半导体模块和半导体模块的制造方法。
背景技术
半导体装置具有设有IGBT(Insulated Gate Bipolar Transistor)、功率MOSFET(Metal Oxide Semiconductor Field Effect Transistor)、FWD(Free Wheeling Diode)等半导体元件的基板，被利用于变换器装置等。
一般的半导体模块通过在绝缘基板的上表面隔着钎料等接合材料配置多个半导体芯片而构成(例如，参照专利文献1、2)。在专利文献1中，公开有一种在一个层叠基板上配置有功率半导体芯片并将该组合横向排列配置两个而成的、所谓的半桥(2in1)模块。在专利文献2中，公开有一种通过在矩形形状的绝缘基板上横向排列配置多个半导体芯片(IGBT芯片和FWD芯片)而构成的半导体模块。
专利文献1：日本特开2013－222950号公报
专利文献2：日本特开平10－56131号公报
发明内容
发明要解决的问题
然而，在专利文献1、2中，由于多个半导体芯片相对于绝缘基板横向排列配置，因而，布线路径变长，其结果，可能导致电感变大。另外，还存在导致半导体模块整体变大的问题。
本发明即是鉴于这一点而做成的，其一个目的在于提供一种能够降低电感并实现小型化的半导体模块和半导体模块的制造方法。
用于解决问题的方案
本发明的一技术方案的半导体模块包括：第1金属布线板，其构成P端子；第2金属布线板，其构成N端子；第3金属布线板，其构成输出端子；第1半导体元件，其以集电极朝向所述第1金属布线板的一主面的方式配置于所述第1金属布线板的一主面；以及第2半导体元件，其以集电极朝向所述第3金属布线板的一主面的方式配置于所述第3金属布线板的一主面，所述第2金属布线板隔着绝缘材料配置于所述第1金属布线板的一主面，所述第3金属布线板以一主面朝向所述第1金属布线板的方式配置，所述第1半导体元件和所述第2半导体元件以所述第1半导体元件的发射极与所述第3金属布线板的一主面连接并且所述第2半导体元件的发射极与所述第2金属布线板的一主面连接的方式表背相反地配置。
本发明的一技术方案的半导体模块的制造方法实施：芯片配置工序，在该芯片配置工序中，在构成P端子的第1金属布线板的一主面以集电极朝向该第1金属布线板的一主面的方式配置第1半导体元件，在构成输出端子的第3金属布线板的一主面以集电极朝向该第3金属布线板的一主面的方式配置第2半导体元件；金属布线板配置工序，在该金属布线板配置工序中，将构成N端子的第2金属布线板隔着绝缘材料配置于所述第1金属板的主面；以及组装工序，在该组装工序中，将所述第1半导体元件和所述第2半导体元件以所述第1半导体元件的发射极与所述第3金属布线板的一主面连接并且所述第2半导体元件的发射极与所述第2金属布线板的一主面连接的方式表背相反地配置。
发明的效果
根据本发明，在半导体模块中，能够降低电感并实现小型化。
附图说明
图1A、图1B是本实施方式所涉及的半导体模块的示意图。
图2A、图2B是表示本实施方式所涉及的半导体模块的制造方法的一工序例的示意图。
图3A、图3B是表示本实施方式所涉及的半导体模块的制造方法的一工序例的示意图。
图4A、图4B是表示本实施方式所涉及的半导体模块的制造方法的一工序例的示意图。
图5A、图5B是表示本实施方式所涉及的半导体模块的制造方法的一工序例的示意图。
图6A、图6B是表示本实施方式所涉及的半导体模块的制造方法的一工序例的示意图。
图7A、图7B是表示本实施方式所涉及的半导体模块的制造方法的一工序例的示意图。
图8是表示本实施方式所涉及的半导体模块中电流的流动方向的示意图。
附图标记说明
1、半导体模块；2、第1金属布线板；3、第2金属布线板；4、第3金属布线板；5、栅极用金属布线板；6、第1半导体元件；7、第2半导体元件；8、第1栅极端子；9、第2栅极端子；10、密封树脂；20、台阶部；21、第1主面；22、第2主面；23、突出片(第1外部连接部)；24、圆形孔；30、突出片(第2外部连接部)；31、圆形孔；40、突出片(第3外部连接部)；41、圆形孔；42、第1贯通孔；43、第2贯通孔；60、集电极；61、栅极电极；62、发射极；70、集电极；71、栅极电极；72、发射极；A、绝缘材料；B1、凸块；B2、凸块；B3、凸块；B4、凸块；B5、凸块；S、接合材料。
具体实施方式
以下，说明能够应用本发明的半导体模块。图1A、图1B是本实施方式所涉及的半导体模块的示意图。图1A是半导体模块的俯视图，图1B是图1A的剖面示意图。此外，以下所示的半导体模块仅是一个例子，并不限定于此，而能够适当变更。
另外，在以下的附图中，将半导体模块的长度方向(后述的第1半导体元件6与第2半导体元件7排列的方向)定义为X方向，将宽度方向定义为Y方向，将高度方向定义为Z方向。图示的X轴、Y轴、Z轴互相正交，并构成右手系。另外，根据情况，有时将X方向称作左右方向，将Y方向称作前后方向，将Z方向称作上下方向。这些方向(前后左右上下方向)是为了方便说明而使用的用语，根据半导体模块的安装姿势，XYZ方向的各方向之间的对应关系有时会改变。另外，在本说明书中，只要没有特别明示，俯视就是指从Z方向正侧观察半导体模块的上表面的情况。
半导体模块1例如应用于功率模块等电力转换装置。如图1A和图1B所示，半导体模块1通过层叠三个金属布线板并在它们之间表背相反地配置多个半导体元件而构成。具体而言，半导体模块1构成为包括构成P端子的第1金属布线板2、构成N端子的第2金属布线板3、构成输出端子的第3金属布线板4、多个第1半导体元件6、多个第2半导体元件7。
第1金属布线板2、第2金属布线板3以及第3金属布线板4由具有上表面(一主面)和下表面(另一主面)的板状体构成，例如，由铜材料、铜合金系材料、铝合金系材料、铁合金系材料等金属材料形成。这些金属布线板例如利用冲压加工形成为规定的形状。此外，以下所示的金属布线板的形状仅是一个例子，而能够适当变更。另外，这些金属布线板也可以称作引线框。此外，详细后述，在图1A、图1B中，第3金属布线板4成为相对于Z轴而言的上下表面与其他金属布线板相反。在第3金属布线板4中，将接合半导体元件的面定义为上表面(一主面)。
第1半导体元件6和第2半导体元件7例如由硅(Si)、碳化硅(SiC)、氮化镓(GaN)等的半导体基板形成为俯视方形形状。第1半导体元件6和第2半导体元件7优选由SiC或者GaN构成。这样一来，即使是频率较高的区域，也能够减少损失。在本实施方式中，第1半导体元件6和第2半导体元件7由将IGBT(Insulated Gate Bipolar Transistor)元件的功能和FWD(Free Wheeling Diode)元件的功能一体化了的RC(Reverse Conducting)－IGBT元件构成。
此外，第1半导体元件6和第2半导体元件7并不限定于此，也可以通过组合IGBT、功率MOSFET(Metal Oxide Semiconductor Field Effect Transistor)等开关元件、FWD(Free Wheeling Diode)等二极管而构成。另外，第1半导体元件6和第2半导体元件7还可以使用对反偏压具有充分的耐压的RB(Reverse Blocking)－IGBT等。另外，第1半导体元件6和第2半导体元件7的形状、配置数量、配置部位等能够适当变更。
对于第1半导体元件6和第2半导体元件7，分别在一面配置有集电极(日文：コレクタ電極)60、70，在另一面配置有栅极电极61、71和发射极(日文：エミッタ電極)62、72。发射极62、72相比于栅极电极61、71具有较大的面积。集电极还可以被称作背面电极，栅极电极61、71和发射极62、72还可以被称作表面电极。另外，也可以是集电极和发射极62、72被称作主电极，栅极电极61、71被称作控制电极。而且，若第1半导体元件6和第2半导体元件7为MOSFET，则也可以是集电极被称作漏电极，发射极62、72被称作源电极。此外，为了方便说明，第1半导体元件6和第2半导体元件7标注不同的附图标记进行说明，但可以由相同的开关元件构成。
第1金属布线板2俯视时具有相比于Y方向在X方向上略长的矩形形状。第1金属布线板2的上表面(一主面)形成为阶梯状。具体而言，第1金属布线板2的上表面被沿Y方向延伸的台阶部20划分成Z方向的高度不同的第1主面21和第2主面22。台阶部20配置在比第1金属布线板2的X方向中央靠右侧的位置。
第1主面21偏向图1A的纸面右侧(X方向正侧)地配置，俯视时具有在Y方向上较长的矩形形状。另外，第2主面22配置于图1A的纸面左侧(第1主面21的X方向负侧)，俯视时具有在Y方向上略长的矩形形状。另外，第2主面22设置在相对于第1主面21下降一节的位置。
在第2主面22的左侧(X方向负侧)的一角部设有沿X方向突出的突出片23。在突出片23形成有沿厚度方向(Z方向)贯通的圆形孔24。详细后述说明，突出片23构成外部导体(P端子)连接用的第1外部连接部。
在第1主面21隔着接合材料S配置有两个第1半导体元件6。两个第1半导体元件6沿Y方向排列配置。各第1半导体元件6以集电极60朝向第1金属布线板2的一主面侧(Z方向负侧)、栅极电极61和发射极62朝向Z方向正侧的方式配置。而且，各第1半导体元件6以栅极电极61和发射极62在X方向上排列的方式配置。栅极电极61配置于X方向正侧，发射极62配置于X方向负侧。接合材料S使用含有银等金属纳米粒子的烧结材料。烧结材料被加热，结果，由银等的金属多孔体构成。此外，接合材料S并不限定于银，也可以是由其他的金属多孔体构成的烧结材料。
在第2主面22分别隔着绝缘材料A配置有第2金属布线板3和栅极用金属布线板5。第2金属布线板3俯视时具有相比于X方向在Y方向上较长的矩形形状，Y方向的宽度设定得略小于第1金属布线板2的Y方向的宽度。另外，第2金属布线板3在第2主面22偏向左侧地配置。
在第2金属布线板3的左侧(X方向负侧)的一角部设有沿X方向突出的突出片30。如图1A所示，突出片30设于俯视时不与突出片23重叠的位置。更具体而言，突出片30设置在第2金属布线板3的与突出片23在Y方向上相反的一侧的位置处的一角部。在突出片30形成有沿厚度方向(Z方向)贯通的圆形孔31。详细后述，突出片30构成外部导体(N端子)连接用的第2外部连接部。
栅极用金属布线板5为用于与第2半导体元件7的栅极电极71连接的金属布线板。与上述的金属布线基板相同，栅极用金属布线板5由具有上表面(一主面)和下表面(另一主面)的板状体构成，例如，由铜材料、铜合金系材料、铝合金系材料、铁合金系材料等金属材料形成。
栅极用金属布线板5具有在Y方向上较长的矩形形状，配置在第2金属布线板3与台阶部20之间。另外，详细后述，栅极用金属布线板5在第1金属布线板2与第3金属布线板4之间配置于与第2半导体元件7的栅极电极71对应的部位。栅极用金属布线板5的Y方向的宽度和Z方向的厚度与第2金属布线板3相等。另外，第2金属布线板3的上表面(一主面)、栅极用金属布线板5的上表面(一主面)以及第1主面21优选位于相同的高度。
绝缘材料A例如由含有环氧树脂、硅树脂、聚酰亚胺树脂等绝缘材料的粘接剂构成。绝缘材料A可以是将膏状的粘接剂涂布在第1金属布线板2的第2主面22并使其固化的结构，也可以是将片状的粘接剂粘贴于第2主面22的结构。
第3金属布线板4俯视时具有相比于Y方向在X方向上略长的矩形形状。另外，第3金属布线板4以覆盖第1金属布线板2、第2金属布线板3以及栅极用金属布线板5的上方的方式配置。如上所述，第3金属布线板4以上表面(一主面)朝向Z方向负侧(下侧的第1金属布线板2的主面侧)、下表面朝向Z方向正侧的方式配置。
在第3金属布线板4的右侧(X方向正侧)的侧缘部设有沿X方向突出的突出片40。如图1A所示，突出片40在第3金属布线板4的右侧的侧缘部自Y方向中央朝向右侧突出。在突出片40形成有沿厚度方向(Z方向)贯通的圆形孔41。详细后述，突出片40构成外部导体(输出端子)连接用的第3外部连接部。
在第3金属布线板4的一主面隔着接合材料S配置有两个第2半导体元件7。两个第2半导体元件7比两个第1半导体元件6偏向X方向负侧，并沿Y方向排列配置。各第2半导体元件7以集电极70朝向第3金属布线板4的一主面侧(Z方向正侧)、栅极电极71和发射极72朝向Z方向负侧的方式配置。
而且，各第2半导体元件7以栅极电极71和发射极72在X方向上排列的方式配置。更具体而言，栅极电极71与栅极用金属布线板5相对配置，发射极72与第2金属布线板3相对配置。另外，第1半导体元件6在比第2半导体元件7靠X方向正侧的位置以栅极电极61和发射极62与第3金属布线板4相对的方式配置。
另外，在第3金属布线板4形成有与各第1半导体元件6对应设置的第1贯通孔42、与各第2半导体元件7对应设置的第2贯通孔43。第1贯通孔42形成在与各第1半导体元件6的栅极电极61的正上方对应的位置。即，沿Y方向排列配置有两个第1贯通孔42。在栅极用金属布线板5的上方且是第2半导体元件7的侧方以与各栅极电极71对应的方式沿Y方向排列配置有两个第2贯通孔43。
第1贯通孔42和第2贯通孔43由沿厚度方向贯通的矩形孔构成。此外，第1贯通孔42的形状和第2贯通孔43的形状并不限定于此，而能够适当变更。第1贯通孔42和第2贯通孔43例如还可以以圆形、三角形等除四边形以外的多边形形成。详细后述，在第1贯通孔42能够贯穿自第1半导体元件6的栅极电极61朝向第3金属布线板4立起的第1栅极端子8，在第2贯通孔43能够贯穿自栅极用金属布线板5的一主面朝向第3金属布线板4立起的第2栅极端子9。此外，第1栅极端子8和第2栅极端子9优选垂直地立起。通过垂直地立起，能够缩短栅极布线长度。该情况下，作为第1栅极端子8和第2栅极端子9立起的角度范围，优选为75°以上且是105°以下。
在第1半导体元件6的栅极电极61配置有凸块B1。另外，在第1半导体元件6的发射极62，对一个第1半导体元件6沿Y方向排列配置有两个凸块B2。发射极62隔着凸块B2连接(接合)于第3金属布线板4的一主面。另外，在凸块B1连接(接合)有自栅极电极61朝向第3金属布线板4立起的第1栅极端子8的一端。第1栅极端子8的另一端侧贯通第1贯通孔42并在第3金属布线板4的另一主面侧突出。
在第2半导体元件7的栅极电极71配置有凸块B3。另外，在第2半导体元件7的发射极72，对一个第2半导体元件7沿Y方向排列配置有两个凸块B4。栅极电极71隔着凸块B3连接(接合)于栅极用金属布线板5的一主面。发射极72隔着凸块B4连接(接合)于第2金属布线板3的一主面。
另外，在栅极用金属布线板5，在两个第2贯通孔43的正下方分别配置有凸块B5。在凸块B5连接(接合)有自栅极用金属布线板5朝向第3金属布线板4立起的第2栅极端子9的一端。第2栅极端子9的另一端侧贯通第2贯通孔43并在第3金属布线板4的另一主面侧突出。
上述的凸块由钎料等接合材料形成为例如球状。此外，这些凸块并不限定于球状，还可以形成为圆柱等柱状。第1栅极端子8和第2栅极端子9由线径充分小于第1贯通孔42的内径或者第2贯通孔43的内径的导线构成。第1栅极端子8和第2栅极端子9例如由铜等金属线形成，表面可以实施镀处理。第1栅极端子8和第2栅极端子9的材质能够适当变更。
如此，第1半导体元件6和第2半导体元件7表背相反地配置。详细后述，第1半导体元件6构成上支路(日文：アーム)，第2半导体元件7构成下支路。
另外，上述的结构利用密封树脂10封装(密封)。此外，突出片23、30、40未被密封树脂10密封，而是暴露在外部。即，密封树脂10密封除突出片23、30、40以外的其他结构整体。
该情况下，密封树脂10整体形成为长方体形状，规定半导体模块1的外形。具体而言，密封树脂10的上表面构成半导体模块1的一主面，密封树脂10的下表面构成半导体模块1的另一主面。另外，密封树脂10的侧面构成半导体模块1的侧面。
上述的突出片23(第1外部连接部)和上述的突出片30(第2外部连接部)自半导体模块1的一侧(X方向负侧)的侧面朝向外侧延伸出。突出片40(第3外部连接部)自半导体模块1的另一侧(X方向正侧)的侧面朝向外侧延伸出。
另外，第1栅极端子8和第2栅极端子9自半导体模块1的一主面(密封树脂10的上表面)突出。突出的第1栅极端子8和突出的第2栅极端子9构成栅极用的外部连接部。即，自半导体模块1的另一主面(密封树脂10的下表面)未突出有任一端子。
此外，密封树脂10例如可以利用传递成型进行模制。密封树脂10能够使用在环氧树脂等各种合成树脂中添加了氧化硅等填料而成的材料。另外，也可以在密封树脂10的下表面配置冷却器(未图示)。
另外，在由电力转换装置使功率半导体模块进行开关动作时，在半导体元件产生由式ΔV＝Ls×di/dt表示的感应电压ΔV。在此，Ls表示电力转换装置内的转换电路部的寄生电感。该寄生电感存在于输入电容器内部、功率半导体模块内部、连接在输入电容器与功率半导体模块之间的布线。另外，di/dt表示开关时的电流变化率。在半导体元件，除了施加电路的直流电压以外，还额外地施加上述的感应电压ΔV作为浪涌电压。于是，在确定模块的额定电压时，需要以包含该浪涌电压在内不超过半导体元件的耐电压的方式设定。
一般的半导体模块通过在绝缘基板的上表面隔着钎料等接合材料配置多个半导体元件而构成。半导体元件的表面电极利用接合线与绝缘基板上的铜板连接。另外，多个半导体元件有时在绝缘基板上横向排列配置。该情况下，半导体元件的数量越多，则接合线的布线数量越多，而可能导致在模块内流过的电流的路径越长。即，电流路径变长的结果，具有模块内的寄生电感变大的问题。另外，由于多个半导体元件横向排列配置，因而还具有与半导体元件的数量相应地模块整体变大的问题。
于是，本申请发明人着眼于半导体元件的电极的朝向和布线的引绕方法，而想到了本发明。即，本发明的主旨在于，将多个金属布线板沿厚度方向层叠，在这些金属布线板之间配置多个半导体元件时，利用上支路和下支路使电极的朝向表背相反地进行配置。
具体而言，在本实施方式中，如上所述，从下依次配置有三个金属布线板(第1金属布线板2、第2金属布线板3、第3金属布线板4)，在第1金属布线板2与第3金属布线板4之间配置有第1半导体元件6，在第2金属布线板3与第3金属布线板4之间配置有第2半导体元件。第1金属布线板2与第2金属布线板3之间夹入有绝缘材料A，因而能够确保它们之间的绝缘性。
另外，第1半导体元件6以集电极60朝向第1金属布线板2的方式配置，第2半导体元件7以集电极70朝向第3金属布线板4的方式配置。而且，第1半导体元件6的发射极62连接于第3金属布线板4，第2半导体元件7的发射极72连接于第2金属布线板3。即，第1半导体元件6的表面电极朝向上侧，第2半导体元件7的表面电极朝向下侧，第1半导体元件6和第2半导体元件7表背相反地配置。
根据该结构，在沿厚度方向层叠的三个金属布线板之间配置多个半导体元件，因而不需要接合线等布线构件，能够缩短电流路径。该结果，能够降低模块内的电感(寄生电感)。另外，通过重叠配置三个金属布线板，能够用一个金属布线板的面积进行半导体元件的布局，还能够实现模块整体的小型化。
另外，在本实施方式中，自第1半导体元件6的栅极电极61朝向第3金属布线板4垂直立起有第1栅极端子8，自栅极用金属布线板5的一主面朝向第3金属布线板4垂直立起有第2栅极端子9。另外，第1栅极端子8贯穿于第1贯通孔42，第2栅极端子9贯穿于第2贯通孔43。
根据该结构，能够利用简单的路径将来自控制电极(栅极电极61、71)的布线取出到外部，能够缩短电流路径。另外，第1栅极端子8和第2栅极端子9相对于多个金属布线板的面方向(XY平面)垂直立起，因而不与在金属布线板内流动的电流的朝向平行，不易受到磁场的影响。该结果，能够抑制噪声的产生。
在此，参照图8说明模块内的电流路径。图8是表示本实施方式所涉及的半导体模块中电流的流动方向的示意图。在图8中，由实线箭头表示自P端子朝向输出端子的电流路径，作为上支路的电流路径。另外，由虚线箭头表示自输出端子朝向N端子的电流路径，作为下支路的电流路径。
如图8所示，自连接于P端子并构成P端子的局部的突出片23进入的电流在第1金属布线板2内朝向X方向正侧(右侧)流动，并经由接合材料S向第1半导体元件6流动。电流自集电极60经过发射极62并经由凸块B2向第3金属布线板4流动，然后自突出片40向外部流动。突出片40连接于输出端子并构成输出端子的局部。
另外，自突出片40进入的电流在第3金属布线板4内朝向X方向负侧(左侧)流动，并经由接合材料S向第2半导体元件7流动。电流自集电极70经过发射极72并经由凸块B4向第2金属布线板3流动，然后自突出片30向外部流动。突出片30连接于N端子并构成N端子的局部。
如此，在本实施方式中，利用上支路和下支路使电流的流动方向朝向相反方向。因此，上支路侧的电磁场和下支路侧的电磁场抵消，而能够提高电感的降低效果。
另外，在本实施方式中，栅极用金属布线板5在第1金属布线板2与第3金属布线板4之间配置于与第2半导体元件7的栅极电极71对应的部位。另外，栅极用金属布线板5隔着绝缘材料A配置于第1金属布线板2的一主面。而且，栅极电极71连接于栅极用金属布线板5的一主面。根据该结构，能够使对于栅极电极71的布线构造简单化并缩短布线路径。另外，由于利用绝缘材料A确保了绝缘性，因而不需要使用高价的绝缘基板，而能够用廉价的结构来实现模块。
另外，在本实施方式中，第1金属布线板2的一主面由第1主面21、设置在相对于第1主面21下降了的位置的第2主面22构成。在第1主面配置有第1半导体元件6，第2金属布线板3和栅极用金属布线板5配置于第2主面。根据该结构，由于在第1主面21和第2主面22之间设置有台阶，因而能够在第1金属布线板2与第3金属布线板4之间配置第1半导体元件6，而且也能够在第2金属布线板3及栅极用金属布线板5与第3金属布线板4之间配置第2半导体元件7。
另外，在本实施方式中，由于将上述的半导体元件隔着利用烧结材料构成的接合材料S与各金属布线板接合，因而能够提高热传导性并提高排热性。另外，通过用凸块将各半导体元件的表面电极接合，从而能够缩短布线长度并提高电感的降低效果。
另外，在本实施方式中，在第1金属布线板2的端部作为外部导体连接用的第1外部连接部而设有突出片23。同样，在第2金属布线板3，在与突出片23相同的一侧的端部作为外部导体连接用的第2外部连接部而设有突出片30。突出片23、30设于俯视时不互相重叠的位置。根据该结构，能够将在X方向负侧即同一侧的突出片23、30在Y方向上以空开规定的间隔地相对的方式配置。因此，能够确保突出片23、30之间的绝缘距离。
接着，参照图2A、图2B至图7A、图7B说明本实施方式的一形态所涉及的半导体模块的制造方法。图2A、图2B至图7A、图7B是表示本实施方式所涉及的半导体模块的制造方法的一工序例的立体图。此外，以下所示的半导体模块的制造方法仅为一个例子，并不限定于该结构，而能够适当变更。另外，图2A、图2B～图7A、图7B的各图A是各工序的俯视图，图2A、图2B～图7A、图7B的各图B是各工序的剖视示意图。
本实施方式所涉及的半导体模块的制造方法构成为实施以下工序：第1芯片配置工序，在该第1芯片配置工序中，在第1金属布线板2配置第1半导体元件6(参照图2A、图2B)；金属布线板配置工序，在该金属布线板配置工序中，在第1金属布线板2配置第2金属布线板3和栅极用金属布线板5(参照图3A、图3B)；第1凸块配置工序，在该第1凸块配置工序中，在第1半导体元件6配置凸块(参照图4A、图4B)；第2芯片配置工序，在该第2芯片配置工序中，在第3金属布线板4配置第2半导体元件7(参照图5A、图5B)；第2凸块配置工序，在该第2凸块配置工序中，在第2半导体元件7配置凸块(参照图6A、图6B)；组装工序，在该组装工序中，将第1半导体元件6和第2半导体元件7表背相反地配置(参照图7A、图7B)；以及密封工序(参照图1A、图1B)。此外，这些各工序的顺序只要不产生矛盾，就能够适当变更。另外，在以下的说明中，单独说明上述各工序，但并不限定于该结构。例如，第1芯片配置工序和第2芯片工序可以同时实施。另外，第1凸块配置工序和第2凸块配置工序也可以同时实施。
如图2A、图2B所示，在第1芯片配置工序中，在构成P端子的第1金属布线板2的一主面以集电极60朝向该第1金属布线板2的一主面的方式配置第1半导体元件6。具体而言，第1半导体元件6以集电极60朝向第1主面21的方式隔着接合材料S配置于第1主面21。即，第1半导体元件6的表面电极朝向上侧。此时，接合材料S为含有金属纳米粒子的烧结材料。而且，例如，在周围温度为200度左右的环境下，用5MPa～10MPa的加压力将第1半导体元件6朝向第1金属布线板2按压，从而将第1半导体元件6与第1金属布线板2接合。烧结材料被加热到烧结温度的结果，成为银等金属多孔体而将第1半导体元件6与第1金属布线板2接合。
如图3A、图3B所示，在金属布线板配置工序中，将构成N端子的第2金属布线板3、栅极用金属布线板5隔着绝缘材料A配置于第1金属布线板2的主面。具体而言，在配置了第1半导体元件6的第1金属布线板2的第2主面22涂布绝缘材料A，在绝缘材料A之上配置第2金属布线板3和栅极用金属布线板5。然后，例如，在周围温度为200度左右的环境下，用0MPa～10MPa的加压力将第2金属布线板3和栅极用金属布线板5朝向第1金属布线板2按压，从而将第2金属布线板3和栅极用金属布线板5粘接于第1金属布线板2。此时，在突出片30的下方未夹入绝缘材料A。即，第2金属布线板3的除突出片30以外的部分利用绝缘材料A与第2主面粘接。利用该工序，能够确保第1金属布线板2与第2金属布线板3之间以及第1金属布线板2与栅极用金属布线板5之间的绝缘性。此外，通过使用烧结材料作为第1半导体元件6的接合材料S，从而能够防止在本工序中烧结材料再次熔融。
如图4A、图4B所示，在第1凸块配置工序中，在第1半导体元件6和栅极用金属布线板5配置球状的凸块。具体而言，在第1半导体元件6的栅极电极61配置凸块B1，在发射极62配置凸块B2。另外，在栅极用金属布线板5的规定部位配置凸块B5。这些凸块能够临时固定。
如图5A、图5B所示，在第2芯片配置工序中，在构成输出端子的第3金属布线板4的一主面以集电极70朝向该第3金属布线板4的一主面的方式配置第2半导体元件7。具体而言，第2半导体元件7以集电极70朝向主面的方式隔着接合材料S配置于主面。即，第2半导体元件7的表面电极朝向上侧。另外，两个第2半导体元件7在比第2贯通孔43靠X方向负侧的规定部位沿Y方向排列配置。此时，接合材料S为含有金属纳米粒子的烧结材料。而且，与第1芯片配置工序相同，例如，在周围温度为200度左右的环境下，用5MPa～10MPa的加压力将第2半导体元件7朝向第3金属布线板4按压，从而将第2半导体元件7与第3金属布线板4接合。烧结材料被加热到烧结温度的结果，成为银等金属多孔体，而将第2半导体元件7与第3金属布线板4接合。
如图6A、图6B所示，在第2凸块配置工序中，在第2半导体元件7配置球状的凸块。具体而言，在第2半导体元件7的栅极电极71配置凸块B3，在发射极72配置凸块B4。这些凸块能够临时固定。
在图2A、图2B至图6A、图6B的工序之后，实施组装工序。如图7A、图7B所示，在组装工序中，将配置了凸块之后的第1半导体元件6和第2半导体元件7表背相反地配置并进行接合。具体而言，以第1半导体元件6的表面电极朝向第3金属布线板4侧、第2半导体元件7的表面电极朝向第1金属布线板2而第1半导体元件6和第2半导体元件7表背相反的方式将第1金属布线板2和第3金属布线板4重叠。
第1半导体元件6的发射极62隔着凸块B2与第3金属布线板4连接。另外，第2半导体元件7的发射极72隔着凸块B4与第2金属布线板3连接。另外，第2半导体元件7的栅极电极71隔着凸块B3与栅极用金属布线板5连接。
另外，在第1贯通孔42贯穿有沿铅垂方向延伸的第1栅极端子8，该第1栅极端子8的下端与凸块B1连接。同样，在第2贯通孔贯穿有沿铅垂方向延伸的第2栅极端子9，该第2栅极端子9的下端与凸块B5连接。第1栅极端子8和第2栅极端子9利用规定的治具等以不与第1贯通孔42或者第2贯通孔43接触的方式定位。
然后，通过使这些结构暴露在规定温度的回流炉中，从而使各凸块熔融，而成为各芯片、金属布线板以及栅极端子分别电接合的状态。该情况下，回流炉的温度优选为低于上述的芯片配置工序时的周围温度的温度。这是因为，由于凸块所使用的钎料的熔点低于烧结材料的熔点，因而能够防止回流之际烧结材料再次熔融。
接着，实施密封工序。如图1A、图1B所示，在密封工序中，上述的结构被密封树脂10封装(密封)。此外，突出片23、30、40未被密封树脂10密封，而是暴露在外部。即，密封树脂10密封除突出片23、30、40以外的其他结构整体。密封树脂10例如利用传递成型进行模制。通过使密封树脂固化，从而密封多个布线基板和多个半导体元件。由此，完成一体化的半导体模块1。
如以上说明那样，根据本发明，沿厚度方向层叠多个金属布线板，在这些金属布线板之间配置多个半导体元件之际，利用上支路和下支路使电极的朝向表背相反地进行配置，从而能够降低电感并实现小型化。
另外，说明了本实施方式和变形例，作为其他的实施方式，也可以将上述实施方式和变形例整体或局部地组合。
另外，本实施方式并不限定于上述的实施方式和变形例，在不脱离技术思想的主旨的范围内，可以各种各样地进行变更、置换、变形。而且，如果能够通过技术的进步或者派生的其他技术以其他的方式来实现技术思想，则也可以使用该方法来实施本发明。因而，权利要求书覆盖了技术思想的范围内可能包含的全部的实施方式。
以下，整理上述实施方式中的特征点。
上述实施方式中记载的半导体模块包括：第1金属布线板，其构成P端子；第2金属布线板，其构成N端子；第3金属布线板，其构成输出端子；第1半导体元件，其以集电极朝向所述第1金属布线板的一主面的方式配置于所述第1金属布线板的一主面；以及第2半导体元件，其以集电极朝向所述第3金属布线板的一主面的方式配置于所述第3金属布线板的一主面，所述第2金属布线板隔着绝缘材料配置于所述第1金属布线板的一主面，所述第3金属布线板以一主面朝向所述第1金属布线板的方式配置，所述第1半导体元件和所述第2半导体元件以所述第1半导体元件的发射极与所述第3金属布线板的一主面连接并且所述第2半导体元件的发射极与所述第2金属布线板的一主面连接的方式表背相反地配置。
另外，在上述的半导体模块中，还包括第1栅极端子，该第1栅极端子自所述第1半导体元件的栅极电极朝向所述第3金属布线板立起，所述第3金属布线板具有能够供所述第1栅极端子贯穿的第1贯通孔。
另外，在上述的半导体模块中，还包括栅极用金属布线板，该栅极用金属布线板在所述第1金属布线板与所述第3金属布线板之间配置于与所述第2半导体元件的栅极电极对应的部位，所述栅极用金属布线板隔着绝缘材料配置于所述第1金属布线板的一主面，所述第2半导体元件的栅极电极连接于所述栅极用金属布线板的一主面。
另外，在上述的半导体模块中，还包括第2栅极端子，该第2栅极端子自所述栅极用金属布线板的一主面朝向所述第3金属布线板立起，所述第3金属布线板具有能够供所述第2栅极端子贯穿的第2贯通孔。
另外，在上述的半导体模块中，所述第1栅极端子和所述第2栅极端子自半导体模块的一主面突出。
另外，在上述的半导体模块中，所述第1金属布线板的一主面具有：第1主面，在该第1主面配置所述第1半导体元件，以及第2主面，其设置在相对于所述第1主面下降了的位置，所述第2金属布线板和所述栅极用金属布线板配置于所述第2主面。
另外，在上述的半导体模块中，所述栅极用金属布线板配置于所述第2主面。
另外，在上述的半导体模块中，所述第1半导体元件的集电极隔着烧结材料与所述第1金属布线板接合，所述第2半导体元件的集电极隔着烧结材料与所述第3金属布线板接合。
另外，在上述的半导体模块中，所述第1半导体元件的发射极隔着凸块与所述第3金属布线板接合，所述第2半导体元件的发射极隔着凸块与所述第2金属布线板接合。
另外，在上述的半导体模块中，所述第1金属布线板在端部具有外部导体连接用的第1外部连接部，所述第2金属布线板在与所述第1外部连接部相同的一侧的端部具有外部导体连接用的第2外部连接部，所述第1外部连接部和所述第2外部连接部自半导体模块的一侧面延伸出，并设于在俯视时互相不重叠的位置。
另外，在上述的半导体模块中，所述第3金属布线板在与所述第1外部连接部相反的一侧的端部具有外部导体连接用的第3外部连接部，所述第3外部连接部自半导体模块的另一侧面延伸出。
另外，上述实施方式中记载的半导体模块的制造方法实施：芯片配置工序，在该芯片配置工序中，在构成P端子的第1金属布线板的一主面以集电极朝向该第1金属布线板的一主面的方式配置第1半导体元件，在构成输出端子的第3金属布线板的一主面以集电极朝向该第3金属布线板的一主面的方式配置第2半导体元件；金属布线板配置工序，在该金属布线板配置工序中，将构成N端子的第2金属布线板隔着绝缘材料配置于所述第1金属布线板的主面；以及组装工序，在该组装工序中，将所述第1半导体元件和所述第2半导体元件以所述第1半导体元件的发射极与所述第3金属布线板的一主面连接并且所述第2半导体元件的发射极与所述第2金属布线板的一主面连接的方式表背相反地配置。
另外，在上述的半导体模块的制造方法中，在所述组装工序之后，实施密封工序，在该密封工序中，将第1金属布线板、第2金属布线板、第3金属布线板、第1半导体元件以及第2半导体元件用密封树脂密封。
另外，在上述实施方式中记载的半导体模块的制造方法中，在所述组装工序中，实施凸块配置工序，在该凸块配置工序中，在所述第1半导体元件的发射极和所述第2半导体元件的发射极配置凸块。
另外，在上述实施方式中记载的半导体模块的制造方法中，所述第3金属布线板具有：第1贯通孔，其设于与所述第1半导体元件的栅极电极对应的位置；以及第2贯通孔，其设于与所述第2半导体元件的栅极电极对应的位置，在所述组装工序中，将自所述第1半导体元件的栅极电极朝向所述第3金属布线板立起的第1栅极端子贯穿于所述第1贯通孔，将自栅极用金属布线板的一主面朝向所述第3金属布线板立起的第2栅极端子贯穿于所述第2贯通孔。
另外，在上述的半导体模块的制造方法中，在所述芯片配置工序中，所述第1半导体元件隔着含有金属纳米粒子的烧结材料配置于所述第1金属布线板，所述第2半导体元件隔着含有金属纳米粒子的烧结材料配置于所述第3金属布线板，然后，将所述烧结材料加热到烧结温度，从而将所述第1半导体元件和所述第1金属布线板接合，并将所述第2半导体元件和所述第3金属布线板接合。
产业上的可利用性
如以上说明那样，本发明具有能够降低电感并实现小型化的效果，特别是，对半导体模块和半导体模块的制造方法是有用的。

Claims (16)

1.一种半导体模块，其中，
该半导体模块包括：
第1金属布线板，其构成P端子；
第2金属布线板，其构成N端子；
第3金属布线板，其构成输出端子；
第1半导体元件，其以集电极朝向所述第1金属布线板的一主面的方式配置于所述第1金属布线板的一主面；以及
第2半导体元件，其以集电极朝向所述第3金属布线板的一主面的方式配置于所述第3金属布线板的一主面，
所述第2金属布线板隔着绝缘材料配置于所述第1金属布线板的一主面，
所述第3金属布线板以一主面朝向所述第1金属布线板的方式配置，
所述第1半导体元件和所述第2半导体元件以所述第1半导体元件的发射极与所述第3金属布线板的一主面连接并且所述第2半导体元件的发射极与所述第2金属布线板的一主面连接的方式表背相反地配置。
2.根据权利要求1所述的半导体模块，其中，
该半导体模块还包括第1栅极端子，该第1栅极端子自所述第1半导体元件的栅极电极朝向所述第3金属布线板立起，
所述第3金属布线板具有能够供所述第1栅极端子贯穿的第1贯通孔。
3.根据权利要求2所述的半导体模块，其中，
该半导体模块还包括栅极用金属布线板，该栅极用金属布线板在所述第1金属布线板与所述第3金属布线板之间配置于与所述第2半导体元件的栅极电极对应的部位，
所述栅极用金属布线板隔着绝缘材料配置于所述第1金属布线板的一主面，
所述第2半导体元件的栅极电极连接于所述栅极用金属布线板的一主面。
4.根据权利要求3所述的半导体模块，其中，
该半导体模块还包括第2栅极端子，该第2栅极端子自所述栅极用金属布线板的一主面朝向所述第3金属布线板立起，
所述第3金属布线板具有能够供所述第2栅极端子贯穿的第2贯通孔。
5.根据权利要求4所述的半导体模块，其中，
所述第1栅极端子和所述第2栅极端子自半导体模块的一主面突出。
6.根据权利要求3～5中任一项所述的半导体模块，其中，
所述第1金属布线板的一主面具有：
第1主面，在该第1主面配置所述第1半导体元件，以及
第2主面，其设置在相对于所述第1主面下降了的位置，
所述第2金属布线板配置于所述第2主面。
7.根据权利要求6所述的半导体模块，其中，
所述栅极用金属布线板配置于所述第2主面。
8.根据权利要求1～7中任一项所述的半导体模块，其中，
所述第1半导体元件的集电极隔着烧结材料与所述第1金属布线板接合，
所述第2半导体元件的集电极隔着烧结材料与所述第3金属布线板接合。
9.根据权利要求1～8中任一项所述的半导体模块，其中，
所述第1半导体元件的发射极隔着凸块与所述第3金属布线板接合，
所述第2半导体元件的发射极隔着凸块与所述第2金属布线板接合。
10.根据权利要求1～9中任一项所述的半导体模块，其中，
所述第1金属布线板在端部具有外部导体连接用的第1外部连接部，
所述第2金属布线板在与所述第1外部连接部相同的一侧的端部具有外部导体连接用的第2外部连接部，
所述第1外部连接部和所述第2外部连接部自半导体模块的一侧面延伸出，并设于在俯视时互相不重叠的位置。
11.根据权利要求10所述的半导体模块，其中，
所述第3金属布线板在与所述第1外部连接部相反的一侧的端部具有外部导体连接用的第3外部连接部，
所述第3外部连接部自半导体模块的另一侧面延伸出。
12.一种半导体模块的制造方法，其中，
该半导体模块的制造方法实施：
芯片配置工序，在该芯片配置工序中，在构成P端子的第1金属布线板的一主面以集电极朝向该第1金属布线板的一主面的方式配置第1半导体元件，在构成输出端子的第3金属布线板的一主面以集电极朝向该第3金属布线板的一主面的方式配置第2半导体元件；
金属布线板配置工序，在该金属布线板配置工序中，将构成N端子的第2金属布线板隔着绝缘材料配置于所述第1金属布线板的主面；以及
组装工序，在该组装工序中，将所述第1半导体元件和所述第2半导体元件以所述第1半导体元件的发射极与所述第3金属布线板的一主面连接并且所述第2半导体元件的发射极与所述第2金属布线板的一主面连接的方式表背相反地配置。
13.根据权利要求12所述的半导体模块的制造方法，其中，
在所述组装工序之后，实施密封工序，在该密封工序中，将第1金属布线板、第2金属布线板、第3金属布线板、第1半导体元件以及第2半导体元件用密封树脂密封。
14.根据权利要求12或13所述的半导体模块的制造方法，其中，
在所述组装工序中，实施凸块配置工序，在该凸块配置工序中，在所述第1半导体元件的发射极和所述第2半导体元件的发射极配置凸块。
15.根据权利要求12～14中任一项所述的半导体模块的制造方法，其中，
所述第3金属布线板具有：
第1贯通孔，其设于与所述第1半导体元件的栅极电极对应的位置；以及
第2贯通孔，其设于与所述第2半导体元件的栅极电极对应的位置，
在所述组装工序中，将自所述第1半导体元件的栅极电极朝向所述第3金属布线板立起的第1栅极端子贯穿于所述第1贯通孔，将自栅极用金属布线板的一主面朝向所述第3金属布线板立起的第2栅极端子贯穿于所述第2贯通孔。
16.根据权利要求12～15中任一项所述的半导体模块的制造方法，其中，
在所述芯片配置工序中，所述第1半导体元件隔着含有金属纳米粒子的烧结材料配置于所述第1金属布线板，所述第2半导体元件隔着含有金属纳米粒子的烧结材料配置于所述第3金属布线板，然后，将所述烧结材料加热到烧结温度，从而将所述第1半导体元件和所述第1金属布线板接合，并将所述第2半导体元件和所述第3金属布线板接合。
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