CN113224015A - 半导体模块和半导体模块的制造方法 - Google Patents

半导体模块和半导体模块的制造方法 Download PDF

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Publication number
CN113224015A
CN113224015A CN202110012538.4A CN202110012538A CN113224015A CN 113224015 A CN113224015 A CN 113224015A CN 202110012538 A CN202110012538 A CN 202110012538A CN 113224015 A CN113224015 A CN 113224015A
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China
Prior art keywords
circuit pattern
electrode
emitter
block
semiconductor module
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CN202110012538.4A
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Inventor
加藤辽一
池田良成
西泽龙男
堀元人
望月英司
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Fuji Electric Co Ltd
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Fuji Electric Co Ltd
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Publication of CN113224015A publication Critical patent/CN113224015A/zh
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Abstract

本发明提供半导体模块和半导体模块的制造方法。降低热阻并且降低电感。半导体模块(1)包括：层叠基板(2)，其是在绝缘板(20)的上表面配置有电路图案(22)并在绝缘板的下表面配置有散热板(21)而成的；半导体元件(3)，其在上表面配置有集电极(30)，在下表面配置有发射极电极(32)和栅电极(31)，发射极电极和栅电极经由凸块(B)与电路图案的上表面接合；以及块电极(4)，其与集电极接合。块电极具有：平板部(44)，其覆盖半导体元件的上方；以及一对突出部(45)，其自平板部的两端朝向电路图案突出地与电路图案接合。

Description

半导体模块和半导体模块的制造方法
技术领域
本发明涉及半导体模块和半导体模块的制造方法。
背景技术
半导体装置具有设有IGBT(Insulated Gate Bipolar Transistor：绝缘栅双极晶体管)、功率MOSFET(Metal Oxide Semiconductor Field Effect Transistor：金属-氧化物半导体场效应管)、FWD(Free Wheeling Diode：续流二极管)等半导体元件的基板，被利用于变换器装置等。
例如，以下所示的专利文献1、2中所示的半导体装置(半导体模块)通过在壳体内配置基板、绝缘电路基板、半导体元件等而构成。绝缘电路基板具有形成于绝缘基板的上表面的第1导电板(第1金属层)和形成于绝缘基板的下表面的第2导电板(第2金属层)。在第1导电板的上表面配置半导体元件，在第2导电板的下表面配置基板。另外，作为半导体元件、第1导电板之间的电布线构件，使用电线(接合线)。
在壳体的内部空间填充密封材料(密封树脂)，并将上述的各种结构密封。另外，在基板的下表面经由焊锡等接合材料配置冷却器。
专利文献1：日本特开2017－28132号公报
专利文献2：实用新型注册第3198019号公报
发明内容
发明要解决的问题
然而，在以往的半导体模块的散热构造中，为了抑制芯片(半导体元件)的发热，将芯片的热经由冷却器向空气释放。另外，芯片主要在作为表面侧的发射极电极侧发热。因此，由芯片产生的热被传递到背面侧(集电极侧)，通过绝缘电路基板、基板、接合材料以及冷却器向外放出。
如此，由于芯片在发射极电极侧发热，因此需要将在发射极电极侧产生的热向作为冷却器侧的集电极侧传递。因此，有半导体模块整体的热阻高出与芯片的热传导率和厚度的量对应的量的问题。另外，在以往的半导体模块中，由于利用电线进行栅电极和发射极电极侧的布线，因而布线长度变长，其结果还有电感增加的问题。
本发明即是鉴于这一方面而做成的，其中一个目的在于提供能够降低热阻并且降低电感的半导体模块和半导体模块的制造方法。
用于解决问题的方案
本发明的一实施方式的半导体模块的特征在于，该半导体模块包括：层叠基板，其是在绝缘板的上表面配置有电路图案并在所述绝缘板的下表面配置有散热板而成的；半导体元件，其在上表面配置有集电极，在下表面配置有发射极电极和栅电极，所述发射极电极和所述栅电极经由凸块与所述电路图案的上表面接合；以及块电极，其与所述集电极接合，所述块电极具有：平板部，其覆盖所述半导体元件的上方；以及一对突出部，其自所述平板部的两端朝向所述电路图案突出而与所述电路图案接合。
本发明的一实施方式的半导体模块的制造方法的特征在于，在该半导体模块的制造方法中实施以下工序：准备工序，在该准备工序中，准备层叠基板和块电极，所述层叠基板是在绝缘板的上表面配置有电路图案并在所述绝缘板的下表面配置有散热板而成的，所述块电极具有覆盖半导体元件的上方的平板部和自所述平板部的两端朝向所述电路图案突出的一对突出部；芯片配置工序，在该芯片配置工序中，以使集电极朝向所述平板部的下表面的方式将所述半导体元件配置在所述平板部的下表面；以及块电极配置工序，该块电极配置工序在所述芯片配置工序之后，在该块电极配置工序中，将配置于所述半导体元件的下表面的发射极电极经由凸块与所述绝缘板的所述电路图案接合，并且将所述一对突出部与所述电路图案接合。
发明的效果
根据本发明，能够降低热阻并且降低电感。
附图说明
图1是本实施方式所涉及的半导体模块的立体图。
图2是本实施方式所涉及的半导体模块的俯视图。
图3是表示本实施方式所涉及的半导体模块的电路图案的俯视图。
图4的(A)和图4的(B)是本实施方式所涉及的半导体模块的剖视图。
图5的(A)和图5的(B)是表示本实施方式所涉及的半导体模块中的制冷剂的流动的示意图。
图6的(A)和图6的(B)是表示本实施方式所涉及的半导体模块的制造方法的一工序例的立体图。
图7的(A)和图7的(B)是表示本实施方式所涉及的半导体模块的制造方法的一工序例的立体图。
图8是表示本实施方式所涉及的半导体模块的制造方法的一工序例的立体图。
图9的(A)和图9的(B)是表示本实施方式所涉及的半导体模块的制造方法的一工序例的立体图。
附图标记说明
1、半导体模块；2、层叠基板；3、半导体元件；4、块电极；5、密封树脂；10、冷却器；10a、散热片；10b、槽；20、绝缘板；21、散热板；22、电路图案；23、集电极电路图案；24、栅极电路图案；24a、L部；24b、H部；25、发射极电路图案；25a、发射极部；25b、长条部；25c、长条部；25d、感测发射极部；30、集电极；31、栅电极；32、发射极电极；40、集电极块；41、栅电极块；42、发射极电极块；43、感测发射极电极块；44、平板部；45、突出部；46、贯通孔；B、凸块；F、冷却方向(制冷剂流动的方向)；S、接合材料。
具体实施方式
以下，说明能够应用本发明的半导体模块。图1是本实施方式所涉及的半导体模块的立体图。图2是本实施方式所涉及的半导体模块的俯视图。图3是表示本实施方式所涉及的半导体模块的电路图案的俯视图。图4的(A)和图4的(B)是本实施方式所涉及的半导体模块的剖视图。图4的(A)是沿着图2的A－A线切断的剖视图，图4的(B)是沿着图2的B－B线切断的剖视图。图5的(A)和图5的(B)是表示本实施方式所涉及的半导体模块中的制冷剂的流动的示意图。图5的(A)是半导体模块的俯视示意图，图5的(B)是半导体模块的剖面示意图。此外，以下所示的半导体模块仅为一个例子，并不限定于此，而能够适当变更。
另外，在以下的附图中，将半导体模块的短边方向定义为X方向，将长边方向定义为Y方向，将高度方向定义为Z方向。另外，根据情况，有时将X方向称作左右方向，将Y方向称作前后方向，将Z方向称作上下方向。这些方向(前后左右上下方向)是为了方便说明而使用的用语，根据半导体模块的安装姿势，XYZ方向的各方向之间的对应关系有时会改变。例如，将半导体模块的散热面侧(冷却器侧)设为下表面侧，将其相反侧称作上表面侧。另外，在本说明书中，俯视是指从Z方向观察半导体模块的上表面的情况。
半导体模块1例如应用于功率模块等电力转换装置。如图1至图4的(A)和图4的(B)所示，半导体模块1通过在层叠基板2的上表面配置多个半导体元件3和多个块电极4而构成。
层叠基板2通过层叠金属层和绝缘层而形成，例如由DCB(Direct CopperBonding：覆铜陶瓷)基板、AMB(Active Metal Brazing：活性金属钎焊)基板或者金属基底基板构成。具体而言，层叠基板2具有绝缘板20、配置于绝缘板20的下表面的散热板21以及配置于绝缘板20的上表面的多个电路图案22。另外，层叠基板2形成为Y方向比X方向长的俯视矩形形状。
绝缘板20在Z方向上具有厚度，形成为具有上表面和下表面的平板状。绝缘板20例如由氧化铝(Al2O3)、氮化铝(AlN)、氮化硅(Si3N4)等陶瓷材料、环氧等树脂材料或者使用陶瓷材料作为填料而成的环氧树脂材料等绝缘材料形成。此外，绝缘板20也可以被称作绝缘层或者绝缘膜。
散热板21具有规定厚度，形成为覆盖绝缘板20的下表面整体。散热板21例如由铜、铝等热传导性良好的金属板形成。散热板21的下表面成为散热面，在散热面安装有冷却器10。
冷却器10例如由散热器构成，具有俯视矩形形状。冷却器10由铜、铝等金属或者含有铜、铝中的一种以上的金属的合金形成，在表面例如施加有镀敷处理。冷却器10以与半导体模块1(散热板21)的下表面之间隔着热传导性良好的混合物等的方式安装于半导体模块1。冷却器10的上表面成为供半导体模块1的下表面接合的平滑的接合面。在冷却器的下表面侧形成有在Z方向上突出的多个散热片10a。
多个散热片10a沿Y方向空开间隔地并列配置。由此，在相邻的散热片10a之间形成槽10b。通过空气等制冷剂在槽10b中流动，从而实现半导体模块1的冷却。将制冷剂流动的方向(流动方向)称作冷却方向F，详细后述。此外，冷却器10并不限定于上述的结构，也可以由具备水冷套的水冷式的冷却器构成。
如图3所示，在绝缘板20的主面以岛状(彼此电绝缘的状态)形成有多个(本实施方式中为四个)电路图案22。多个电路图案22由与后述的半导体元件3的集电极30连接的一对集电极电路图案23、与栅电极31连接的栅极电路图案24、与发射极电极32连接的发射极电路图案25构成。
集电极电路图案23具有在绝缘板20的外周侧沿绝缘板20的长边方向(Y方向)延伸的俯视长条形状。一对集电极电路图案23以在绝缘板20的短边方向(X方向)上相对的方式配置。
栅极电路图案24具有自绝缘板20的长边方向一侧的端部朝向中央呈L字状弯曲并自绝缘板20的中央分支成四个枝状的形状。具体而言，栅极电路图案24通过连结俯视呈L字状的L部24a和俯视呈H字状的H部24b而构成。L部24a自绝缘板20的一角部朝向X方向延伸，并在绝缘板20的X方向上的大致中间部分呈直角弯曲而延伸到绝缘板20的中央(中心)。H部24b通过将沿Y方向延伸的一对长条部的中央由沿X方向延伸的长条部连结而形成。H部24b配置于绝缘板20的中央。H部24b的中央和L部24a的中央侧的端部连结在一起。此外，H部24b构成在绝缘板20的中央供栅电极31经由凸块B接合的区域，详细后述。
发射极电路图案25以包围H部24b的外周侧的方式形成为俯视大致U字状。具体而言，发射极电路图案25由沿着绝缘板20的长边方向另一侧的短边沿X方向延伸的发射极部25a、自发射极部25a朝向Y方向延伸的一对长条部25b、25c以及与一个长条部25c连结的感测发射极部25d构成。
一对长条部25b、25c各自的一端与发射极部25a连结，一对长条部25b、25c各自的另一端侧沿着Y方向延伸。一对长条部25b、25c以在X方向上将H部24b夹在中间的方式相对配置。各长条部25b、25c以被夹在集电极电路图案23与H部24b之间的方式配置。一对集电极电路图案23、一对长条部25b、25c以及H部24b的一对长条部在Y方向上并行延伸。感测发射极部25d以在其与发射极部25a之间夹持一个集电极电路图案23的方式配置于发射极部25a的相反侧。另外，感测发射极部25d以与栅极电路图案24的L部24a在X方向上平列的方式配置，并沿X方向延伸。感测发射极部25d连结于一个长条部25c。此外，一对长条部25b、25c构成在H部24b的外侧供发射极电极32经由凸块B接合的区域，详细后述。
在这样构成的电路图案22中，如图3所示，栅极电路图案24的H部24b被夹在一对长条部25b、25c之间。另外，H部24b和一对长条部25b、25c都被夹在一对集电极电路图案23之间。此外，图3的双点划线部分表示供后述的块电极4或者半导体元件3接合的区域。
在电路图案22的预定部位配置多个半导体元件3。半导体元件3由例如硅(Si)、碳化硅(SiC)等的半导体基板形成为俯视方形形状。在本实施方式中，半导体元件3由将IGBT(Insulated Gate Bipolar Transistor)元件和FWD(Free Wheeling Diode)元件的功能一体化的RC(Reverse Conducting：反向导通)－IGBT元件构成。
此外，半导体元件3并不限定于此，还可以组合IGBT、功率MOSFET(Metal OxideSemiconductor Field Effect Transistor)等开关元件、FWD(Free Wheeling Diode)等二极管而构成。另外，作为半导体元件3，也可以使用相对于反偏压具有足够的耐压的RB(Reverse Blocking：反向阻断)－IGBT等。另外，半导体元件3的形状、配置数量、配置部位等能够适当变更。
在本实施方式中，四个半导体元件3经由多个凸块B配置于H部24b的上表面以及一对长条部25b、25c的上表面。具体而言，半导体元件3以跨过分支成枝状的H部24b的顶端的上方和长条部25b、25c的顶端或者基端的上方的方式配置。在半导体元件3的上表面配置有集电极30，在半导体元件3的下表面配置有栅电极31和发射极电极32。在半导体元件3的一个端边侧的中央配置有栅电极31，在相对的另一端边侧配置有发射极电极32。
半导体元件3将栅电极31与H部24b的顶端上表面相对地配置，将发射极电极32与长条部25b、25c的上表面相对地配置，半导体元件3利用凸块B与电路图案22接合。更具体而言，栅电极31对于一个半导体元件3而言经由一个凸块B与分支成枝状的H部24b的顶端上表面电接合。另外，发射极电极32对于一个半导体元件3而言经由三个凸块B与长条部25b、25c的上表面电接合。
如此，栅电极31和发射极电极32在X方向上并列配置。特别是，在X方向上，栅电极31配置于比发射极电极32靠内侧的位置。即，四个栅电极31配置为比四个发射极电极32偏向模块整体的中央侧。
凸块B能够使用膏状的金属烧结材料。例如，能够使用银等的金属纳米粒子烧结剂作为凸块B。凸块B形成为例如沿厚度方向(Z方向)延伸的圆柱形状。此外，凸块B不限定于金属烧结材料，也可以由焊锡构成。
另外，在各电路图案22接合块电极4。具体而言，块电极4由与集电极电路图案23接合的集电极块40、与栅极电路图案24接合的栅电极块41、与发射极电路图案25接合的发射极电极块42以及感测发射极电极块43构成。
集电极块40以覆盖层叠基板2的上方的大部分的方式形成为俯视大致方形形状。具体而言，集电极块40具有覆盖半导体元件3的上方的平板部44和自平板部44的X方向上的两端朝向集电极电路图案23突出的一对突出部45。由此，集电极块40从Y方向观察时成为大致U字状。
平板部44以覆盖一对集电极电路图案23、配置于一对集电极电路图案23之间的一对长条部25b、25c、H部24b以及四个半导体元件3上方的方式形成为俯视大致方形形状。平板部44的X方向上的宽度对应于一对集电极电路图案23之间的相对间隔。平板部44的Y方向上的宽度对应于集电极电路图案23的Y方向上的长度。另外，在平板部44的中央形成有沿厚度方向贯通的圆形的贯通孔46。
突出部45具有自平板部44的X方向上的端部朝向Z方向下方突出的大致长方体形状。突出部45的X方向上的宽度略小于集电极电路图案23的宽度。另外，突出部45的Y方向上的宽度对应于平板部44的宽度，并略小于集电极电路图案23的宽度。另外，在集电极块40的上表面侧的各角部形成有倒角。一对突出部45沿着绝缘板20的相对的两条边配置。
在平板部44的下表面经由接合材料S电接合有半导体元件3的集电极30。另外，各突出部45的下表面经由接合材料S与集电极电路图案23电接合。接合材料S能够使用片状的金属烧结材料。例如，能够将银等的金属纳米粒子烧结剂形成为片状，作为接合材料S使用。接合材料S例如形成为规定厚度的矩形形状。此外，接合材料S不限定于金属烧结材料，还可以由焊锡构成。另外，接合材料S不限定于片状，还可以由膏状构成。另外，突出部45的Z方向上的高度优选对应于将半导体元件3的厚度和凸块B的高度合起来的高度。
栅电极块41具有在X方向上较长的长方体形状。具体而言，栅电极块41的X方向上的宽度对应于L部24a的X方向上的长条部的宽度。栅电极块41的Y方向上的宽度略小于L部24a的宽度。另外，在集电极块40的上表面侧的各角部形成有倒角。栅电极块41的下表面经由接合材料S与L部24a的X方向上的长条部的上表面电接合。
发射极电极块42具有沿着绝缘板20的长边方向另一侧的短边在X方向上延伸的长方体形状。具体而言，发射极电极块42的X方向上的宽度和Y方向上的宽度略小于发射极部25a的宽度。另外，在发射极电极块42的上表面侧的各角部形成有倒角。发射极电极块42的下表面经由接合材料S与发射极部25a的上表面电接合。发射极电极块42俯视时配置于集电极块40(平板部44)的外侧。
感测发射极电极块43具有在X方向上较长的长方体形状。具体而言，感测发射极电极块43的X方向上的宽度和Y方向上的宽度略小于感测发射极部25d的宽度。另外，在集电极块40的上表面侧的各角部形成有倒角。感测发射极电极块43的下表面经由接合材料S与感测发射极部25d的上表面电接合。感测发射极电极块43俯视配置于集电极块40(平板部44)的外侧。感测发射极电极块43与栅电极块41在X方向上并列配置。另外，感测发射极电极块43的X方向上的长度小于栅电极块41的长度。
这样构成的块电极4设定为Z方向上的高度相等。另外，块电极4优选由铜、铝等热传导性良好的金属材料形成。另外，集电极块40既可以一体地成形平板部44和一对突出部45，也可以利用焊接等将平板部44和一对突出部45接合而形成。
另外，向层叠基板2的上方空间填充密封树脂5(参照图1)。密封树脂5例如自贯通孔46被填充，密封半导体元件3、层叠基板2以及块电极4。密封树脂5能够使用环氧树脂、硅凝胶。
然而，在以往的半导体模块中，在层叠基板的上表面配置半导体元件。在半导体元件的上表面配置有发射极电极，在半导体元件的下表面配置有集电极。发射极电极和层叠基板的电路图案例如由接合线电接合。另外，在层叠基板的下表面配置冷却器。
在以往的结构中，由发射极电极产生的热通过冷却器被向外放出。该情况下，由于发射极电极位于半导体元件的表面侧，因此产生的热传递到半导体元件的背面侧(集电极侧)，并通过层叠基板和冷却器向外放出。
如此，由于半导体元件在发射极电极侧发热，因此需要将在发射极电极侧产生的热向作为冷却器侧的集电极侧传递。因此，存在与半导体元件的热传导率和厚度对应地，模块整体的热阻升高的问题。另外，如上所述，以往由接合线进行发射极电极的布线，因此，布线长度变长，其结果，还具有电感增加的问题。
于是，本申请发明人们着眼于半导体元件的作为发热源的发射极电极的朝向，想到了本发明。即，本发明的主旨在于，使半导体元件3的接合方向与以往相反，将发射极电极32朝向层叠基板2侧配置。具体而言，在本实施方式中，在层叠基板2的上表面配置有半导体元件3。在半导体元件3的上表面配置有集电极30，在半导体元件3的下表面配置有发射极电极32。发射极电极32经由凸块B与层叠基板2上的电路图案22接合。
另外，在半导体元件3的作为上表面侧的集电极30接合块电极4(集电极块40)。集电极块40具有覆盖半导体元件3的上方的平板部44和自平板部44的两端朝向电路图案22突出的突出部45。突出部45与电路图案22接合。
根据该结构，发射极电极32朝向层叠基板2侧，发射极电极32经由凸块B与层叠基板2接合，因此，由发射极电极32产生的热不会通过半导体元件的内部，而能够通过凸块B直接向层叠基板2(散热板21)传递。因此，能够降低热阻而提高冷却效率。由于热阻被降低，因此能够使模块尺寸接近芯片尺寸，能够实现模块整体的小型化。另外，通过由凸块B实现了发射极电极32的布线，由此相比于以往的接合线，能够缩短布线长度，还能够降低电感。
另外，由集电极块40实现了集电极30的电连接，从而能够去除不必要的布线，并且能够将半导体元件3的热经由集电极块40向层叠基板2传递。即，不仅能够将集电极块40作为电接合构件，还能够将集电极块40活用为传热构件。因此，能够进一步提高冷却效果。另外，由于使用了很多热容量较高的金属制的块电极4，因而能够实现过度热特性、短路耐性较高的模块。
另外，在本实施方式中，优选为集电极块40中的一对突出部45的相对的方向与安装于半导体模块1的下表面的冷却器10中的与集电极块40对应的范围内的制冷剂流动的方向(冷却方向F)一致。例如如图1所示，可以是制冷剂流动的方向与在一个方向(X方向)上具有多个形成了槽10b的散热片10a的冷却器10中的槽10b平行。另外，例如也可以是，在由水冷套构成的冷却器10中，使水冷套内部的液体的流动方向与一对突出部45的相对的方向一致。
具体而言，如图5的(A)所示，一对突出部45具有在Y方向上较长的长方体形状，并在X方向上互相相对。该情况下，优选为向冷却器10流动的制冷剂的流动方向(冷却方向F)朝向X方向。根据该结构，如图5的(B)所示，制冷剂自一个突出部45的下方通过平板部44的下方而朝向另一个突出部45的下方流动。如此，由于制冷剂在与突出部45的长边方向(长边)垂直的方向上流动，因而较大范围的制冷剂有助于集电极块40的冷却。
如图5的(B)所示，在制冷剂的中游侧(半导体模块1的X方向上的中央侧)，能够将半导体元件3的热经由凸块B向冷却器10侧放出。另外，在制冷剂的上游侧和下游侧(半导体模块1的X方向上的外侧)，能够将半导体元件3的热经由平板部44和一对突出部45向冷却器10侧放出。如此，能够自半导体元件3的两面有效地放热。该结果，能够将在平板部44的下方配置于一对突出部45之间的四个半导体元件3均匀冷却。因而，能够抑制每个半导体元件3的温度偏差，能够提高冷却性能。
另外，在本实施方式中，在平板部44的中央形成有沿厚度方向贯通的贯通孔46。根据该结构，能够将贯通孔46作为密封树脂5的注入口进行活用。由此，能够在平板部44与半导体元件3之间没有遗漏地填充密封树脂5。另外，能够容易地清除在注入密封树脂5时含有的空隙。
另外，在本实施方式中，栅电极31配置于比发射极电极32靠平板部44的中央侧的位置。即，如图3以及图4的(A)和图4的(B)所示，四个半导体元件3的各栅电极31朝向平板部44的中央侧，各发射极电极32位于比栅电极31靠外周侧的位置。更具体而言，半导体元件3俯视时以2×2的方式在平板部44的下方配置有四个，半导体元件3的栅电极31以在平板部44的中央相对的方式配置。根据该结构，作为发热部位的发射极电极32不会集中在模块的中央侧，而能够使各发射极电极32彼此之间的间隔分开。其结果，热不会集中在模块的中央，而能够使热分散来提高冷却效率。另外，栅电极31配置于层叠基板2的中央侧，栅电极31经由凸块B接合于H部24b的分支成枝状的顶端上表面，由此能够均匀地缩短自外部到栅电极31的布线长度，还能够抑制栅极振荡。
另外，在本实施方式中，在集电极块40的外侧配置有栅电极块41、发射极电极块42以及感测发射极电极块43。即，集电极块40配置为在Y方向上被夹在栅电极块41、发射极电极块42以及感测发射极电极块43之间。根据该结构，由于发射极电极块42和感测发射极电极块43配置于集电极块40的外侧，因而能够容易取得外部连接。
接着，参照图6的(A)和图6的(B)至图9的(A)和图9的(B)，说明本实施方式所涉及的半导体模块的制造方法。图6的(A)和图6的(B)至图9的(A)和图9的(B)是表示本实施方式所涉及的半导体模块的制造方法的一工序例的立体图。此外，以下所示的半导体模块的制造方法仅为一个例子，并不限定于该结构，而能够适当变更。另外，在以下的附图中，为了方便说明，省略了散热板。另外，图6的(A)和图6的(B)、图7的(A)和图7的(B)、图9的(A)和图9的(B)是表示各工序的前后的状态的图。
本实施方式所涉及的半导体模块1的制造方法通过依次实施以下工序而构成：准备工序，在该准备工序中，准备层叠基板2和块电极4；芯片配置工序(参照图6的(A)和图6的(B))，在该芯片配置工序中，在集电极块40配置半导体元件3；第1块电极配置工序(参照图7的(A)和图7的(B))，在该第1块电极配置工序中，在层叠基板2配置栅电极块41、发射极电极块42以及感测发射极电极块43；凸块配置工序(参照图8)，在该凸块配置工序中，在半导体元件3配置凸块；第2块电极配置工序(参照图9的(A)和图9的(B))，在该第2块电极配置工序中，将集电极块40和半导体元件3配置于层叠基板2；以及密封工序(参照图1)，在该密封工序中，填充密封树脂5。此外，只要不产生矛盾，这些各工序的顺序就可以适当变更。
首先，预先准备上述的层叠基板2和块电极4(集电极块40、栅电极块41、发射极电极块42以及感测发射极电极块43)(准备工序)。
接着，实施芯片配置工序。如图6的(A)和图6的(B)所示，在芯片工序中，以使集电极30朝向平板部44的下表面的方式配置四个半导体元件3。在半导体元件3的上表面(集电极面)配置接合材料S(参照图4的(A)和图4的(B))，并将接合材料S配置于平板部44的预定部位。此时，各半导体元件3的栅电极31以在X方向上相对于发射极电极32位于内侧的方式配置。然后，以预定压力将半导体元件3的集电极面朝向平板部44加压，并且以预定温度加热预定时间，由此将半导体元件3和平板部44经由接合材料S电接合。此外，接合材料S既可以使用预先与半导体元件3的形状相配合地形成为片状的接合材料，也可以将膏状的金属烧结材料等涂布于集电极面。
接着，实施第1块电极配置工序。如图7的(A)和图7的(B)所示，在第1块电极配置工序中，将栅电极块41、发射极电极块42以及感测发射极电极块43配置于电路图案22的预定部位。具体而言，将栅电极块41经由接合材料S配置于L部24a的上表面。将发射极电极块42经由接合材料S配置于发射极部25a的上表面。将感测发射极电极块43经由接合材料S配置于感测发射极部25d的上表面。然后，以预定压力将这些块电极4朝向层叠基板2加压，并且以预定温度加热预定时间，由此将块电极4的除集电极块40以外的部分和各电路图案22经由接合材料S电接合。
接着，实施凸块配置工序。如图8所示，在凸块配置工序中，在发射极电极32和栅电极31配置预定高度的凸块B。另外，在一对突出部45的下表面配置接合材料S。此外，凸块B优选具有比接合材料S的下表面略突出的高度。
接着，实施第2块电极配置工序。如图9的(A)和图9的(B)所示，在第2块电极配置工序中，经由凸块B将发射极电极32与电路图案22接合，并且经由接合材料S将一对突出部45与电路图案22接合。具体而言，将配置于发射极电极32的凸块B定位于一对长条部25b、25c的上表面，将配置于栅电极31的凸块B定位于H部24b的上表面。另外，将一对突出部45经由接合材料S配置于一对集电极电路图案23的上表面。然后，以预定压力将集电极块40朝向层叠基板2加压，并且以预定温度加热预定时间，由此将发射极电极32经由凸块B与电路图案22接合，将集电极块40经由接合材料S与集电极电路图案23接合。
接着，实施密封工序。如图1所示，在密封工序中，层叠基板2的上方空间被密封树脂5密封。例如，在层叠基板2的周围配置矩形形状的框体(未图示)，能够没有遗漏地自贯通孔46向框体内的空间填充密封树脂5。通过使密封树脂5固化，从而密封层叠基板2、半导体元件3以及块电极4。由此，完成一体化的半导体模块1。
如以上说明那样，根据本发明，通过使半导体元件3的接合方向与以往相反，并朝向层叠基板2侧地配置发射极电极32，能够降低热阻并且降低电感。另外，相比于以往，能够省略电线等的结构，能够实现模块整体结构的简单化和小型化。
另外，在上述实施方式中，半导体元件3的个数和配置部位并不限定于上述结构，而能够适当变更。
另外，在上述实施方式中，电路图案22的个数和布局并不限定于上述结构，而能够适当变更。
另外，在上述实施方式中，层叠基板2、半导体元件3是形成为俯视矩形形状或者方形形状的结构，但并不限定于该结构。层叠基板2、半导体元件3也可以形成为上述以外的多边形状。
另外，说明了本实施方式和变形例，作为其他的实施方式，也可以将上述实施方式和变形例整体或局部地组合。
另外，本实施方式并不限定于上述的实施方式和变形例，在不脱离技术思想的主旨的范围内，可以进行各种变更、置换、变形。而且，如果能够通过技术的进步或者派生的其他技术以其他的方式来实现技术思想，则也可以使用该方法来实施本发明。因而，权利要求书覆盖了技术思想的范围内可能包含的全部的实施方式。
以下，整理上述实施方式中的特征点。
上述实施方式中记载的半导体模块的特征在于，该半导体模块包括：层叠基板，其是在绝缘板的上表面配置有电路图案并在所述绝缘板的下表面配置有散热板而成的；半导体元件，其在上表面配置有集电极，在下表面配置有发射极电极和栅电极，所述发射极电极和所述栅电极经由凸块与所述电路图案的上表面接合；以及块电极，其与所述集电极接合，所述块电极具有：平板部，其覆盖所述半导体元件的上方；以及一对突出部，其自所述平板部的两端朝向所述电路图案突出而与所述电路图案接合。
另外，在上述实施方式中记载的半导体模块中，其特征在于，所述一对突出部的相对的方向与制冷剂流动的方向一致。
另外，在上述实施方式中记载的半导体模块中，其特征在于，所述半导体元件配置于所述一对突出部之间。
另外，在上述实施方式中记载的半导体模块中，其特征在于，在所述平板部的中央形成有贯通孔。
另外，在上述实施方式中记载的半导体模块中，其特征在于，所述半导体元件具有配置于下表面的栅电极，所述栅电极配置于比所述发射极电极靠所述平板部的中央侧的位置。
另外，在上述实施方式中记载的半导体模块中，其特征在于，所述半导体元件俯视时以2×2的方式在所述平板部的下方配置有四个，各半导体元件的所述栅电极以在所述平板部的中央相对的方式配置。
另外，在上述实施方式中记载的半导体模块中，其特征在于，所述电路图案具有：集电极电路图案，其与所述集电极连接；栅极电路图案，其与所述栅电极连接；以及发射极电路图案，其与所述发射极电极连接，所述块电极具有：集电极块，其与所述集电极电路图案接合；栅电极块，其与所述栅极电路图案接合；发射极电极块，其与所述发射极电路图案的发射极部接合；以及感测发射极电极块，其与所述发射极电路图案的感测发射极部接合，所述集电极块由所述平板部和所述一对突出部构成，所述栅电极块、所述发射极电极块以及所述感测发射极电极块配置于所述集电极块的外侧。
另外，在上述实施方式中记载的半导体模块中，其特征在于，所述栅极电路图案在所述绝缘板的中央具有供所述栅电极经由所述凸块接合的区域，所述发射极电路图案在所述栅极电路图案的外侧具有供所述发射极电极经由所述凸块接合的区域。
另外，在上述实施方式中记载的半导体模块中，其特征在于，所述栅极电路图案配置于所述绝缘板的中央，具有俯视呈H字状的H部，在所述H部的分支成枝状的顶端上表面经由所述凸块接合有所述栅电极，所述发射极电路图案具有在所述一对突出部之间以将所述H部夹在中间的方式相对配置的一对长条部，在所述一对长条部经由凸块接合有所述发射极电极。
另外，在上述实施方式中记载的半导体模块中，其特征在于，所述集电极电路图案具有与所述一对突出部对应的长条形状，所述一对长条部配置于所述H部与所述集电极电路图案之间。
另外，在上述实施方式中记载的半导体模块中，其特征在于，所述发射极电路图案具有：发射极部，其将所述一对长条部的一端彼此连结；以及感测发射极部，其与所述一对长条部中的一个所述长条部连结，所述发射极电极块与所述发射极部的上表面接合，所述感测发射极电极块与所述感测发射极部的上表面接合，所述发射极电极块和所述感测发射极电极块以俯视时在所述平板部的外侧将所述平板部夹在中间的方式配置。
另外，在上述实施方式中记载的半导体模块中，其特征在于，所述栅电极块隔着所述平板部与所述发射极电极块相对，并与所述感测发射极块并列配置。
另外，上述实施方式中记载的半导体模块的制造方法的特征在于，在该半导体模块的制造方法中实施以下工序：准备工序，在该准备工序中，准备层叠基板和块电极，所述层叠基板是在绝缘板的上表面配置有电路图案并在所述绝缘板的下表面配置有散热板而成的，所述块电极具有覆盖半导体元件的上方的平板部和自所述平板部的两端朝向所述电路图案突出的一对突出部；芯片配置工序，在该芯片配置工序中，以使集电极朝向所述平板部的下表面的方式将所述半导体元件配置在所述平板部的下表面；以及块电极配置工序，该块电极配置工序在所述芯片配置工序之后，在该块电极配置工序中，将配置于所述半导体元件的下表面的发射极电极经由凸块与所述绝缘板的所述电路图案接合，并且将所述一对突出部与所述电路图案接合。
另外，在上述实施方式中记载的半导体模块的制造方法中，其特征在于，在所述平板部的中央形成有贯通孔，在该所述块电极配置工序之后，实施密封工序，在该密封工序中，自所述贯通孔填充密封树脂而密封所述半导体元件。
产业上的可利用性
如以上说明那样，本发明具有能够降低热阻并且降低电感的效果，特别是，对半导体模块和半导体模块的制造方法是有用的。

Claims (15)

1.一种半导体模块，其特征在于，
该半导体模块包括：
层叠基板，其是在绝缘板的上表面配置有电路图案并在所述绝缘板的下表面配置有散热板而成的；
半导体元件，其在上表面配置有集电极，在下表面配置有发射极电极和栅电极，所述发射极电极和所述栅电极经由凸块与所述电路图案的上表面接合；以及
块电极，其与所述集电极接合，
所述块电极具有：
平板部，其覆盖所述半导体元件的上方；以及
一对突出部，其自所述平板部的两端朝向所述电路图案突出而与所述电路图案接合。
2.根据权利要求1所述的半导体模块，其特征在于，
所述一对突出部沿着所述绝缘板的相对的两条边配置。
3.根据权利要求1或2所述的半导体模块，其特征在于，
所述一对突出部的相对的方向与制冷剂流动的方向一致。
4.根据权利要求1～3中任一项所述的半导体模块，其特征在于，
所述半导体元件配置于所述一对突出部之间。
5.根据权利要求1～4中任一项所述的半导体模块，其特征在于，
在所述平板部的中央形成有贯通孔。
6.根据权利要求1～5中任一项所述的半导体模块，其特征在于，
所述栅电极配置于比所述发射极电极靠所述平板部的中央侧的位置。
7.根据权利要求1～6中任一项所述的半导体模块，其特征在于，
所述半导体元件俯视时以2×2的方式在所述平板部的下方配置有四个，各半导体元件的所述栅电极以在所述平板部的中央相对的方式配置。
8.根据权利要求1～7中任一项所述的半导体模块，其特征在于，
所述电路图案具有：
集电极电路图案，其与所述集电极连接；
栅极电路图案，其与所述栅电极连接，以及
发射极电路图案，其与所述发射极电极连接，
所述块电极具有：
集电极块，其与所述集电极电路图案接合；
栅电极块，其与所述栅极电路图案接合；
发射极电极块，其与所述发射极电路图案的发射极部接合；以及
感测发射极电极块，其与所述发射极电路图案的感测发射极部接合，
所述集电极块由所述平板部和所述一对突出部构成，
所述栅电极块、所述发射极电极块以及所述感测发射极电极块配置于所述集电极块的外侧。
9.根据权利要求8所述的半导体模块，其特征在于，
所述栅极电路图案在所述绝缘板的中央具有供所述栅电极经由所述凸块接合的区域，
所述发射极电路图案在所述栅极电路图案的外侧具有供所述发射极电极经由所述凸块接合的区域。
10.根据权利要求9所述的半导体模块，其特征在于，
所述栅极电路图案配置于所述绝缘板的中央，具有俯视呈H字状的H部，所述栅电极经由所述凸块与所述H部的分支成枝状的顶端上表面接合，
所述发射极电路图案具有在所述一对突出部之间以将所述H部夹在中间的方式相对配置的一对长条部，所述发射极电极经由凸块与所述一对长条部接合。
11.根据权利要求10所述的半导体模块，其特征在于，
所述集电极电路图案具有与所述一对突出部对应的长条形状，
所述一对长条部配置于所述H部与所述集电极电路图案之间。
12.根据权利要求11所述的半导体模块，其特征在于，
所述发射极电路图案具有：
发射极部，其将所述一对长条部的一端彼此连结；
感测发射极部，其与所述一对长条部中的一个所述长条部连结，
所述发射极电极块与所述发射极部的上表面接合，
所述感测发射极电极块与所述感测发射极部的上表面接合，
所述发射极电极块和所述感测发射极电极块以俯视时在所述平板部的外侧将所述平板部夹在中间的方式配置。
13.根据权利要求12所述的半导体模块，其特征在于，
所述栅电极块隔着所述平板部与所述发射极电极块相对，并与所述感测发射极块并列配置。
14.一种半导体模块的制造方法，其特征在于，
在该半导体模块的制造方法中实施以下工序：
准备工序，在该准备工序中，准备层叠基板和块电极，
所述层叠基板是在绝缘板的上表面配置有电路图案并在所述绝缘板的下表面配置有散热板而成的，
所述块电极具有覆盖半导体元件的上方的平板部和自所述平板部的两端朝向所述电路图案突出的一对突出部；
芯片配置工序，在该芯片配置工序中，以使集电极朝向所述平板部的下表面的方式将所述半导体元件配置在所述平板部的下表面；以及
块电极配置工序，该块电极配置工序在所述芯片配置工序之后，在该块电极配置工序中，将配置于所述半导体元件的下表面的发射极电极经由凸块与所述绝缘板的所述电路图案接合，并且将所述一对突出部与所述电路图案接合。
15.根据权利要求14所述的半导体模块的制造方法，其特征在于，
在所述平板部的中央形成有贯通孔，
在所述块电极配置工序之后，实施密封工序，在该密封工序中，自所述贯通孔填充密封树脂而密封所述半导体元件。
CN202110012538.4A 2020-02-05 2021-01-06 半导体模块和半导体模块的制造方法 Pending CN113224015A (zh)

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