CN112086372B - 一种用于高结温功率模块芯片正面连接的封装材料结构层及其制作方法 - Google Patents
一种用于高结温功率模块芯片正面连接的封装材料结构层及其制作方法 Download PDFInfo
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Abstract
本发明公开了一种用于高结温功率模块芯片正面连接的封装材料结构层制作方法,包括以下步骤:S01,制作预成型平面型铜片或者铜排,其宽度小于芯片正面金属Pad宽度;S02,将铜片或者铜排表面通过印刷工艺将烧结银浆印刷在表面形成一层银膜;S03,将印刷后的铜片或者铜排在烘箱中固化,形成铜片银膜复合材料。本发明还提供的一种用于高结温功率模块芯片正面连接的封装材料结构层,由上述用于高结温功率模块芯片正面连接的封装材料结构层制作方法制作得到。本发明提供的一种用于高结温功率模块芯片正面连接的封装材料结构层及其制作方法,利于实现批量化生产,用于高结温功率模块芯片正面键合,实现在400摄氏度以上的高结温芯片的应用环境中。
Description
技术领域
本发明涉及一种用于高结温功率模块芯片正面连接的封装材料结构层及其制作方法,属于功率半导体器件封装技术领域。
背景技术
功率模块可耐受高压并提供大电流,且控制方便,是实现电机控制、电源逆变的重要功率器件。功率芯片是用焊料(锡膏或者焊片),烧结银焊接在覆铜陶瓷板(DBC)上,芯片正面则是由铝线键合导通电流。在实际使用中,特别是高结温(大于等于300摄氏度)的碳化硅(SiC)芯片和氮化镓(GaN)芯片,需要耐高温弹性模量高的芯片正面键合连接材料;由于IGBT工作频率较高,开通过程中芯片键合层温度在不断变化,芯片结温越高,对键合材料可靠性要求越高。对于高结温工作环境,普通键合铝线会脱落断开,会导致个别芯片过早失效,影响模块的长期可靠性。
传统的功率芯片主流键合材料是铝键合丝,纯铝熔点为660摄氏度,线径为8~20mil不等,但是键合在芯片上导通电流的线径主要以15mil(375um)为主;铝线通过超声键合设备通过超声振动摩擦等过程连接在芯片正面,用于连接导通电流;但是单根15mil铝线电流承载能力在10A左右,弧线越长其承载能力越低。另外,芯片正面铜线键合是较为理想的可以替代铝线键合的材料,但是铜线硬度是铝线的2倍以上,键合在传统的芯片正面的Al、Ag金属化层,极易损坏芯片;有研究表明可通过在芯片表面进行铜金属化实现铜线键合,但是形成能够有效键合的铜金属化层,耗时较长,成本极高,目前还不适合产业化;也有研究机构发明DTS技术方案,通过在芯片正面利用烧结银工艺连接一定厚度的铜薄,可以代替制作铜金属化层用于铜线键合,目前可实现产业化,但是设备,材料成本较高;也有研究机构采用Sn基焊料在芯片正面连接较厚的铜端子,或者DBC形成芯片正面电流的有效连接,但是Sn基焊料适用于普通芯片,工艺实现过程较为复杂。
铝线键合的单根铝线电流承载能力在10A左右,弧线越长其承载能力越低,在器件短路时,键合线无法承受大电流而熔断导致短路在高压环境中容易引发模块爆炸。另外,芯片正面铜线键合是较为理想的可以替代铝线键合的材料,但是铜线硬度是铝线的2倍以上,键合在传统的芯片正面的Al、Ag金属化层,极易损坏芯片;有研究表明可通过在芯片表面进行铜金属化实现铜线键合,但是形成能够有效键合的铜金属化层,耗时较长,成本极高,目前还不适合产业化;也有研究机构发明DTS技术方案,通过在芯片正面利用烧结银工艺连接一定厚度的铜薄,可以代替制作铜金属化层用于铜线键合,目前可实现产业化,但是设备,材料成本较高;也有研究机构采用Sn基焊料在芯片正面连接较厚的铜端子,或者DBC形成芯片正面电流的有效连接,但是Sn基焊料适用于普通芯片,工艺实现过程较为复杂。
发明内容
本发明要解决的技术问题是,提供一种能够实现批量化生产,用于高结温功率模块芯片正面键合,实现在400摄氏度以上的高结温芯片的应用环境中的用于高结温功率模块芯片正面连接的封装材料结构层及其制作方法。
为解决上述技术问题,本发明采用的技术方案为:
一种用于高结温功率模块芯片正面连接的封装材料结构层制作方法,包括以下步骤:
S01,制作预成型平面型铜片或者铜排,其宽度小于芯片正面金属Pad宽度;
S02,将铜片或者铜排表面通过印刷工艺将烧结银浆印刷在表面形成一层银膜;
S03,将印刷后的铜片或者铜排在烘箱中固化,形成铜片银膜复合材料。
S01中,制作铜片或者铜排的方法包括冲压、机械切割或者激光切割。
S01中,铜片或者铜排的厚度为70~500微米。
S02中,铜片或者铜排选择为裸铜,或者选择镀银、镀金或者镀镍处理。
S02中,印刷工艺包括2D钢网印刷或者丝网印刷工艺。
S02中,预折弯铜片或者铜排的印刷工艺采用3D印刷工艺。
S03中,烘箱烘干温度为100~150℃,干燥时间为1~10min。
S03中,铜片银膜复合材料上的银膜表面贴上蓝膜。
一种用于高结温功率模块芯片正面连接的封装材料结构层,由所述用于高结温功率模块芯片正面连接的封装材料结构层制作方法制作得到。
封装材料结构层通过压力烧结工艺键合在芯片正面。
本发明的有益效果:本发明提供的一种用于高结温功率模块芯片正面连接的封装材料结构层及其制作方法,改进芯片正面键合材料和工艺设计后,铜片或者铜排(裸铜、镀银、镀金或者镀镍)通过压力烧结连接在芯片和基板上,结果表明,其工作温度可达400摄氏度以上,可实现高结温芯片的工作需求;可通过增加铜片厚度提高通路能力,降低器件因为芯片正面键合材料熔断导致断路失效的概率;功率循环测试未发现CSBT键合材料失效;铜片或者铜排多行排列,有利于批量化生产。
附图说明
图1为本发明中平面型铜片覆银膜键合端子的(a)俯视图和(b)剖面图;
图2为本发明中预折弯型铜片覆银膜键合端子的(a)俯视图和(b)剖面图;
图3为本发明中平面型铜排设计(a)印刷前;(b)印刷后;
图4为本发明中印刷前的预折弯铜排(a)铜排俯视图;(b)铜排剖面图;
图5为本发明中印刷后的预折弯铜排(a)铜排俯视图;(b)铜排剖面图;
图6为本发明中铜片覆银膜键合端子与芯片连接示意图。
具体实施方式
下面结合附图对本发明作进一步描述,以下实施例仅用于更加清楚地说明本发明的技术方案,而不能以此来限制本发明的保护范围。
本发明公开一种用于高结温功率模块芯片正面连接的封装材料结构层制作方法,包括以下步骤:
步骤一,通过冲压、机械切割或者激光切割等方法制作预成型平面型单个CSBT铜片或者铜排,宽度略小于芯片正面金属Pad宽度,厚度为70~500微米,长度可根据封装设计的芯片大小和间隔进行设计。
步骤二,如果需要镀层,则在铜片或者铜排上镀银、镍、金或者其他金属层。本发明提出的芯片正面键合材料设计如图1所示,本发明涉及的铜片或者铜排是裸铜、镀银(3~8微米)、镀金(0.1~1微米)或者镀镍(3~8微米),铜片包括图1所示的平面型,也可以是预成型好的单个铜片如图2所示,也可以是铜排如图3a和图4所示(利于批量化生产)。
步骤三,通过2D钢网印刷或者丝网印刷工艺将烧结银浆印刷在铜片上。银膜是通过印刷工艺将烧结银浆(包括纳米烧结银浆和微米级烧结银浆)印刷在铜片上,湿银膜宽度与铜片宽度接近,长度与芯片尺寸相关;预折弯铜片印刷银膏需要采用3D印刷工艺。
步骤四,将印刷后的铜片或者铜排在烘箱中100~150摄氏度条件下干燥1~10min。如果铜片或者铜排是裸铜则需要提供氮气环境,保证裸铜片在厌氧高温环境中形成铜片银膜复合材料。
步骤五,把蓝膜贴在干燥后的CSBT上的银膜上进行保护。
如图1、图2、图3b和图5所示,本发明的一种用于高结温功率模块芯片正面连接的封装材料结构层,由上述制作方法制作得到,其名称为铜片覆银膜键合端子,简称CSBT(Copper Silver-sintering Bonding Terminal)。如图6所示,通过压力烧结工艺,CSBT可键合在芯片正面(金属化层为银)代替传统键合线导通电流。
以上所述仅是本发明的优选实施方式,应当指出:对于本技术领域的普通技术人员来说,在不脱离本发明原理的前提下,还可以做出若干改进和润饰,这些改进和润饰也应视为本发明的保护范围。
Claims (8)
1.一种用于高结温功率模块芯片正面连接的封装材料结构层制作方法,其特征在于:包括以下步骤:
S01,制作预成型平面型铜片或者铜排,其宽度小于芯片正面金属Pad宽度;
S02,将铜片或者铜排表面通过印刷工艺将烧结银浆印刷在表面形成一层银膜;
S03,将印刷后的铜片或者铜排在烘箱中固化,形成铜片银膜复合材料,即封装材料结构层,封装材料结构层通过压力烧结工艺键合在芯片正面。
2.根据权利要求1所述的一种用于高结温功率模块芯片正面连接的封装材料结构层制作方法,其特征在于:S01中,制作铜片或者铜排的方法包括冲压、机械切割或者激光切割。
3.根据权利要求1所述的一种用于高结温功率模块芯片正面连接的封装材料结构层制作方法,其特征在于:S01中,铜片或者铜排的厚度为70~500微米。
4.根据权利要求1所述的一种用于高结温功率模块芯片正面连接的封装材料结构层制作方法,其特征在于:S02中,铜片或者铜排选择为裸铜,或者选择镀银、镀金或者镀镍处理。
5.根据权利要求1所述的一种用于高结温功率模块芯片正面连接的封装材料结构层制作方法,其特征在于:S02中,印刷工艺包括2D钢网印刷或者丝网印刷工艺。
6.根据权利要求1所述的一种用于高结温功率模块芯片正面连接的封装材料结构层制作方法,其特征在于:S02中,预折弯铜片或者铜排的印刷工艺采用3D印刷工艺。
7.根据权利要求1所述的一种用于高结温功率模块芯片正面连接的封装材料结构层制作方法,其特征在于:S03中,烘箱烘干温度为100~150℃,干燥时间为1~10min。
8.根据权利要求1所述的一种用于高结温功率模块芯片正面连接的封装材料结构层制作方法,其特征在于:S03中,铜片银膜复合材料上的银膜表面贴上蓝膜。
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