CN111010813A - 嵌入迹线 - Google Patents

嵌入迹线 Download PDF

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CN111010813A
CN111010813A CN201911131713.0A CN201911131713A CN111010813A CN 111010813 A CN111010813 A CN 111010813A CN 201911131713 A CN201911131713 A CN 201911131713A CN 111010813 A CN111010813 A CN 111010813A
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catalytic
printed circuit
circuit board
trace
laminate substrate
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CN111010813B (zh
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康斯坦丁·卡拉瓦克斯
肯尼斯·S·巴尔
史蒂夫·卡尼
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Sierra Circuits Inc
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    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
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    • C23C18/31Coating with metals
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
    • H05K3/182Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method
    • H05K3/185Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method by making a catalytic pattern by photo-imaging
    • HELECTRICITY
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    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203Fillers and particles
    • H05K2201/0206Materials
    • H05K2201/0236Plating catalyst as filler in insulating material
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    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0364Conductor shape
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Abstract

本申请涉及一种嵌入迹线。印刷电路板包含层压基板,层压基板包含催化性芯材。所述催化性芯材在表面未被烧蚀的情况下可以抗金属电镀。金属迹线在层压基板内的迹线通道内形成。所述迹线通道在催化性材料表层向下延伸。

Description

嵌入迹线
本申请是申请日为2015年02月05日,申请号为201580026672.2,发明名称为“嵌入迹线”的申请的分案申请。
背景技术
相关专利申请的交叉引用:
本申请涉及并要求2014年6月5号提交的名为《嵌入迹线》美国专利申请第14/297,516号的利益和优先权,该《嵌入迹线》是2014年5月19日申请的美国专利申请14/281,631号题为《嵌入迹线》的部分继续,整体在此通过参照的方式引入。
发明内容
在典型的印刷电路板(PCB)制作工艺中,可以在印刷电路板的两侧使用覆铜箔层压板。
在印刷电路板的两侧涂覆感光抗蚀剂并将其曝光和显影以产生电路。然后使用铜化学蚀刻溶液去除电路之间的不需要的铜。然后使用化学方法去除抗蚀剂。对于多层结构,玻璃增强的未完全固化的树脂预浸料可以放置在成品芯的两侧,并在热、真空和压力下使用印刷电路板两侧的铜箔进行层压。可以使用诸如钻孔或激光等机械手段来形成孔,以制作盲孔将外层和内层互连。没有用合成树脂浸渍过的预浸料可以用合成树脂加强。
本发明提供以下项目:
1)一种形成印刷电路板的方法,其特征在于:其包含:
在层压基板中形成迹线通道,所述层压基板包含由非催化性材料覆盖的催化性芯材以使所述层压基板的除了所述催化性芯材暴露的地方以外的部分抗金属电镀,其中所述迹线通道被烧蚀以暴露所述催化性芯材;
在金属熔池中浸泡所述层压基板以便金属在所述迹线通道内电镀,而不是在所述层压基板表面的未烧蚀部分;和,
抛光所述层压基板,使得电镀在所述迹线通道内的金属与所述层压基板的表面齐平。
2)如项目1)所述的方法,其特征在于:所述金属熔池为化学镀铜溶池。
3)如项目1)所述的方法,其特征在于:所述迹线通道使用激光烧蚀形成。
4)如项目1)所述的方法,其特征在于:所述迹线通道通过以下步骤形成:
在所述层压基板上施加抗蚀剂;
曝光和显影抗蚀剂以描绘迹线通道的位置;和,
执行等离子蚀刻以形成所述迹线通道。
5)如项目1)所述的方法,其特征在于:所述迹线通道通过以下步骤形成:
在所述层压基板上施加箔;
在所述箔上施加抗蚀剂;
曝光和显影所述抗蚀剂以暴露所述箔的描绘所述迹线通道的位置的部分;
蚀刻所述箔的暴露部分;和,
执行等离子蚀刻以形成所述迹线通道。
6)如项目1)所述的方法,其特征在于:所述方法还包含:
在所述层压基板上层压富树脂催化预浸料;
形成通孔;和,
在所述富树脂催化预浸料的表面上形成附加迹线,包括在所述通孔内形成迹线。
7)如项目1)所述的方法,其特征在于:在所述层压基板中形成迹线通道包括在所述层压基板两侧上形成迹线通道。
8)如项目1)所述的方法,其特征在于:所述催化性芯材包含钯催化粒子。
9)如项目1)所述的方法,其特征在于:所述催化性芯材包含在环氧树脂中充分扩散的催化粉。
10)如项目1)所述的方法,其特征在于:所述非催化性材料包含玻璃加强预浸料。
11)如项目1)所述的方法,其特征在于:所述迹线通道由以下方式之一形成:
高压水切割;
钻孔;
镂铣。
12)一种印刷电路板,其特征在于:包括:
层压基板,层压基板包含由非催化性材料覆盖的催化性芯材以使所述层压基板的除了所述催化性芯材暴露的地方以外的部分抗金属电镀;和,
在所述层压基板内形成的迹线通道内的金属迹线,所述迹线通道在催化性芯材的表面下方延伸。
13)如项目12)所述的印刷电路板,其特征在于:还包括:
所述层压基板上的催化材料;
穿过所述催化材料的通孔;和,
包括所述通孔内的迹线在内的所述催化材料表面上的附加迹线。
14)如项目13)所述的印刷电路板,其特征在于:所述催化性芯材由以下材料之一组成:
富树脂催化预浸料;
催化性粘合材料。
15)如项目12)所述的印刷电路板,其特征在于:所述催化性芯材包含钯催化粒子。
16)如项目12)所述的印刷电路板,其特征在于:所述非催化性材料是紫外线固化材料。
17)一种形成印刷电路板迹线的方法,其特征在于:包含:
在层压基板中形成迹线通道,所述层压基板包含被非催化性材料覆盖的催化性芯材以使所述层压基板的除了催化性芯材暴露的地方以外的部分抗金属电镀,其中所述迹线通道在所述催化性芯材表面以下被烧蚀;
实施化学镀铜液工艺以在所述迹线通道内放置铜迹线;和,
抛光所述层压基板,使得所述铜迹线与所述层压基板的表面齐平。
18)如项目17)所述的方法,其特征在于:所述迹线通道通过以下步骤形成:在所述层压基板上施加抗蚀剂;
曝光和显影所述抗蚀剂以描绘所述迹线通道的位置;和,
执行等离子蚀刻以形成所述迹线通道。
19)如项目17)所述的方法,其特征在于:所述迹线通道通过以下步骤形成:在所述层压基板上施加箔;
在所述箔上施加所述抗蚀剂;
曝光和显影所述抗蚀剂以暴露所述箔的描绘所述迹线通道的位置的部分;
蚀刻所述箔的暴露部分;和,
执行等离子蚀刻以形成所述迹线通道。
20)如项目17)所述的方法,其特征在于:所述迹线通道由以下方式之一形成:
激光烧蚀;
高压水切割;
钻孔;
镂铣。
附图说明
图1显示了根据一种实施方式制成并具有嵌入迹线的印刷电路板结构的简化图。
图2显示了根据一种实施方式制作具有嵌入迹线的印刷电路板的简化流程图。
图3、图4、图5、图6、图7、图8、图9和图10显示了根据一种实施方式制作具有嵌入迹线的印刷电路板的简化流程图。
具体实施方式
在印刷电路板(PCB)的制作中,迹线在层压板表面上方0.5-2.5密耳处形成,如果PCB是双层板,存在在预浸料层压期间或在焊料掩模施加期间空隙可能被夹在迹线之间的可能性。此外,信号完整性和导体阻抗是影响迹线之间电介质间隔的因素。当PCB迹线在层压板表面上方形成时,印刷电路板迹线上方的电介质空间将根据板的长度和宽度的不同而发生变化。这使得难以精确地控制PCB迹线的阻抗。此外,当PCB迹线在层压板表面上方形成并且迹线宽度和间隔小于1密耳时,精细迹线未能恰当地粘附到层压板表面可能导致制造产率低和可靠性问题。例如,当在层压表面上形成迹线时,由于光刻和化学铜蚀刻的限制导致的不准确性,迹线的几何结构可能由于迹线的长度不同而发生变化。迹线的不同几何结构可能导致信号传播和迹线阻抗较差的问题。
为了解决由于印刷电路板迹线在层压板表面以上形成而产生的上述问题,印刷电路板迹线被嵌入到层压基板中,使其不会延伸至层压板表面以上。图1对此进行了阐明。在图1中,印刷电路板迹线12被嵌入在由催化性芯材10组成的层压基板中,催化性芯材10上覆盖了一层非催化性材料21。例如,非催化性材料21是一层薄的非催化性粘着剂或电介质层。例如,非催化性材料21可以由一个焊接掩模或其他类型的紫外线固化材料构成。该类紫外线固化材料可以暴露于紫外线中以便对其进行一个完全的加工处理,紧接着通过它形成迹线通道。或者,可以暴露紫外线固化并对其进行加工,以形成迹线通道,然后用激光将迹线通道切成最终的表面。下一层13可以是双层印刷电路板的焊接掩模,或者是一个印刷电路板的预浸料叠层,包括两层以上或非玻璃性强化催化性粘着剂。
印刷电路板迹线12在有着一定深度的迹线通道中形成,深度在0.25至2.5密耳之间。这些迹线通道在催化性芯材10的表面被烧蚀。由于印刷电路板迹线的几何结构受到了迹线通道形成过程的控制,因此嵌入印刷电路板迹线12具有更好的电气性能。同样地,在催化性芯材10中嵌入印刷电路板迹线12可以解决迹线极细时出现的粘结问题,例如,迹线厚度或迹线之间的空间少于1密耳。印刷电路板迹线被嵌入时,其三面受到层压板表面的约束。
图2示出了总结用于制造具有嵌入迹线的印刷电路板的过程的简化流程图。在方框31中,所述过程从一个层压基板开始。例如,层压基板有一个催化性核心。例如,催化性芯材包含钯粉,钯粉又包含由主要为高岭土的无机填料制成的钯催化微粒。例如,无机填料通过在填料表面接触含盐的钯制成,如硅酸铝和例如含有还原剂的高岭土的黏土。或者,也可以使用其他金属(例如银)的盐替代钯盐。
水合肼可用作还原剂以将钯盐还原成钯金属。可以将填料与浆料形式的水一起加入到混合罐中,然后向混合物中加入氯化钯(PdCl2)和盐酸(HC1)溶液,随后加入水合肼。关于制造这种催化效力的更多信息,参见USPN 4,287,253。
催化粉可以在环氧树脂中充分地扩散。内含催化填料的环氧树脂可用来浸透玻璃布,树脂和催化剂使用常见的玻璃布为设备涂层,并使用常规的干燥设备将其弄干。涂层的半固化树脂/玻璃布可以用来通过将标准真空层压设备下的涂层半固化树脂/玻璃布按压到一起,为印刷电路板制作层压板。
一旦催化性芯材形成,可以用非催化性材料包围催化性芯材。例如,非催化性材料由用于催化性芯材两边的薄的非催化性粘着剂或电介质层组成。该涂层可通过例如辊涂、帘膜式淋涂、镂花涂装、丝网印刷术或一些其他的标准或非标准的涂层过程。非催化性材料的最终厚度大约在0.25-1.5密耳之间。应用后,可固化涂层。
或者,可以通过在夹板铺叠期间且层压之前,在催化性预浸料外部放置非催化性预浸料,而在催化性芯材的两边形成非催化性材料。这种结构产生被非催化性材料环绕的催化性芯材。非催化性材料可以是例如玻璃加强预浸料、B阶段(未完全固化)的电介质粘着剂,这些都可以选择性地填充无机填料。
最终所得的层状层压材料可用作印刷电路板的层压基板。
例如,催化性芯材10的厚度介于2至60密耳之间。例如,催化性芯材10由无金属保护层的催化性基层层压板组成,其外部预浸料含有大量树脂以便于真空压制之后,所得到的成品层压板具有富含树脂的表面。例如,富含树脂的预浸料可以有(但不限于)含有71%树脂的106型玻璃或含有65%树脂的1035型玻璃。使用富含树脂的层压板表面确保制作迹线通道时,移除的主要是树脂而不是玻璃。这可以加速迹线通道形成过程,并提高迹线通道质量。
非催化性材料21在催化性芯材10的两边形成。例如,非催化性材料21由玻璃加强预浸料和B阶段(未完全固化)电介质粘着剂组成。例如,电介质粘着剂填满了无机填料。
由催化性芯材组成并被非催化性材料包围的层压基板的优势就在于在迹线通道形成期间,非催化性材料将会先于催化性芯材被切除。由于催化性芯材中的迹线通道没必要特别深,因此可以更简单地对催化性芯材中的迹线通道深度进行控制。催化性芯材中的一个浅层的切口降低了切到催化性芯材内玻璃纤维束的风险。例如,对一个催化性芯材表面上由填满了0.5密耳的非催化性电介质构成的层压基板来说,迹线通道总深度为0.7密耳,那么只需要移除0.2密耳的催化性芯材就可以暴露足够的活性催化粒子供铜电镀。
在方框32中,激光烧蚀用于打破非催化性材料21和催化性芯材10的表面以形成迹线通道11,如图4所示。激光烧蚀可以通过紫外线准分子激光、钇铝石榴石激光、紫外线钇铝石榴石激光或一些其他类型的激光来实现,或者,通过非激光溶蚀工艺实现。准分子激光烧蚀能够很好地控制深度,是一种优质迹线通道解决方法。
作为使用激光烧蚀来形成迹线通道的替代方案,非催化性材料21的两边都可以使用抗蚀剂,所述抗蚀剂被曝光和显影以描绘迹线通道的位置。例如,抗蚀剂厚度要大于迹线通道的深度。例如,迹线通道深度为0.5密耳时,抗蚀剂厚度可以为1.0至1.5密耳。然后可以通过使用等离子刻蚀和气体组合(例如:氧气、四氟甲烷、氩等)外加适当的电力和持续时间来形成迹线通道。我们期望迹线通道将以不同于抗蚀剂的速度被侵蚀。例如,抗蚀剂厚度应该大于迹线通道深度以便于当达到迹线通道深度时,还有一些剩下的抗蚀剂保护非催化性材料21中未暴露的表面区域。等离子刻蚀之后,可以用一个抗蚀剂剥离剂来清除剩下的抗蚀剂。
或者,实施等离子刻蚀时也可以使用其他保护性材料代替抗蚀剂来保护层压基板表面。例如,可以用箔,如非催化性材料21所应用的铜箔或铝箔来实现保护。所述箔的镜面可以朝着非催化性材料21放置,迹线通道形成后,可以剥除箔。例如,将箔应用到非催化性材料21之后,将抗蚀剂应用到箔上。抗蚀剂将被暴露/显影以暴露迹线通道区域的箔。并蚀刻箔以暴露非催化性材料21中的迹线通道区域。剩下的抗蚀剂则会被清除,并对迹线通道进行等离子蚀刻。然后剥除剩下的箔,并继续加工过程。
或者,可以使用高压水切割来形成迹线通道。使用可编程的高压水切割机器,如用于切割钢铁和不锈钢等硬质材料的切割机器,可实施高压水切割。另一如钻孔和镂铣的机械加工工艺可用于制作迹线通道。
在方框33中,层压基板被清洗以清除迹线通道11的碎片。例如,这种清洗可以通过声波频率在40兆赫兹到160兆赫兹之间的超声波清洗来完成。没有非催化性层时,通常不使用更具侵蚀性的化学清洗,此种清洗可能会导致催化性芯材10的表面变粗糙或受到侵蚀。如果催化性芯材10的表面受到侵蚀,这会导致原先位置的金属电镀不再处于形成的迹线通道内。但是,催化性芯材10的表面上有一层非催化性材料21,更具侵蚀性的化学清洗可用来对非催化性材料21表面造成些许侵蚀,不会导致原先位置的金属电镀不再处于形成的迹线通道内。
在方框34中,迹线12在迹线通道11中形成,如图5所示。例如,迹线12由一种金属制成,如铜。例如,要形成铜质迹线,非催化性材料21和催化性芯材10需被浸入快速无电镀铜镀液中。整个迹线通道11和略高于非催化性材料21的表面部分都被电镀。化学镀铜镀液只对烧蚀过程中暴露的催化性区域进行电镀。由于在制作催化性芯材10的层压过程中,铜只在催化性芯材10表面被烧蚀、划损或粗糙的地方催化,因此迹线通道11外的区域无镀铜。因此,铜质迹线在催化性芯材10表面被烧蚀的地方形成。层压基板内经简化的迹线俯视图如图6所示。
在方框35中,例如,使用精细网格砂纸(例如:420砂砾到1200砂砾)对非催化性材料21的表面进行抛光。抛光移除了所有延伸到迹线通道以上的额外的铜。例如,可以使用MASS,Inc.生产的密抛光机。最终的抛光效果如图7所示。双层印刷电路板往往使用焊接掩模。例如,在分离和检查后进行局部镀金,印刷电路板就完成了。
在方框36中,当印刷电路板超过两层时,含有丰富树脂的催化性预浸料材料13层压在层压基板两边。例如,使用泰德拉或聚四氟乙烯等离型膜。结果如图8所示。非催化性材料可替代树脂丰富的催化性预浸料材料13,如采用催化性粘着材料作为非玻璃加强催化性粘着剂的一层。
在方框37中,例如,通过使用激光器或诸如钻头的机械设备,形成盲孔和通孔。结果如图9所示,图中展示了盲孔14、盲孔15和通孔16。
在方框38中,在水中进行超声波清洗之后,迹线17形成。例如,迹线17由铜等金属构成。例如,迹线17通过化学镀铜形成。化学镀铜将会导致迹线在孔14、15和16内形成,正如迹线区域18、19和20所示。这会导致出现图10所示的四层电路板结构。例如,可以通过实施如焊接掩模、进行局部镀金、分离(如从一个阵列中分离)和检查等加工步骤完成印刷电路板的制作。
或者根据需要重复方框36、37和38,在方框39中添加附加层直至达到想要的层数。在方框40中,当达到想要的层数时,可以通过实施如焊接掩模、进行局部镀金、分离(如从一个阵列中分离)和检查等加工步骤完成印刷电路板的制作。
上述讨论仅揭露并描述了典型的方法和具体表现。正如本领域技术人员所理解的那样,在不脱离本发明的精神或特性的情况下,可以以其它具体形式来实施所揭露的主旨。相应地,本文的揭露意在说明而不是限制本发明保护范围,本发明保护范围以权利要求为准。

Claims (11)

1.一种印刷电路板,包括:
层压基板,所述层压基板包含非催化性材料和由所述非催化性材料覆盖的催化性芯材,以使所述层压基板在除了所述催化性芯材暴露的地方以外抵抗金属电镀;和
在所述层压基板内形成的迹线通道内的金属迹线,所述迹线通道在所述催化性芯材的表面下方延伸;
其中所述催化性芯材包括钯粉末,所述钯粉末包含由无机填料制成的钯催化粒子。
2.如权利要求1所述的印刷电路板,其中所述金属迹线是使用化学镀形成的铜。
3.如权利要求1所述的印刷电路板,其中所述无机填料是高岭土。
4.如权利要求1所述的印刷电路板,还包括:
在所述层压基板上的催化性材料;
穿过所述催化性材料的通孔;和
在所述催化性材料的表面上的附加迹线,包括在所述通孔内的迹线。
5.如权利要求2所述的印刷电路板,其中所述催化性芯材包括以下中的一种:
富树脂催化预浸料;
催化性粘着材料。
6.一种印刷电路板,包括:
层压基板,所述层压基板包括包含催化粒子的催化性芯材,所述催化性芯材被非催化性材料覆盖;
所述层压基板在除了所述催化性芯材被暴露的地方以外抵抗金属电镀;
所述层压基板具有在其中形成的通道,所述通道暴露所述催化粒子;
通过化学镀在所述通道内形成的金属。
7.如权利要求6所述的印刷电路板,其中所述金属是铜。
8.如权利要求6所述的印刷电路板,其中所述催化粒子是涂覆有催化剂的无机填料。
9.如权利要求8所述的印刷电路板,其中所述催化剂是钯。
10.如权利要求8所述的印刷电路板,其中所述无机填料是高岭土。
11.如权利要求6所述的印刷电路板,其中所述催化粒子是与钯盐接触的无机粒子。
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