CN110226220A - 接合装置和接合方法 - Google Patents

接合装置和接合方法 Download PDF

Info

Publication number
CN110226220A
CN110226220A CN201780084538.7A CN201780084538A CN110226220A CN 110226220 A CN110226220 A CN 110226220A CN 201780084538 A CN201780084538 A CN 201780084538A CN 110226220 A CN110226220 A CN 110226220A
Authority
CN
China
Prior art keywords
sheet material
engagement
sheet
suction hole
joint surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201780084538.7A
Other languages
English (en)
Other versions
CN110226220B (zh
Inventor
渡辺治
中村智宣
前田彻
永井训
野口勇一郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Arakawa Co Ltd
Original Assignee
Arakawa Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Arakawa Co Ltd filed Critical Arakawa Co Ltd
Publication of CN110226220A publication Critical patent/CN110226220A/zh
Application granted granted Critical
Publication of CN110226220B publication Critical patent/CN110226220B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C65/00—Joining or sealing of preformed parts, e.g. welding of plastics materials; Apparatus therefor
    • B29C65/02—Joining or sealing of preformed parts, e.g. welding of plastics materials; Apparatus therefor by heating, with or without pressure
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C65/00—Joining or sealing of preformed parts, e.g. welding of plastics materials; Apparatus therefor
    • B29C65/02—Joining or sealing of preformed parts, e.g. welding of plastics materials; Apparatus therefor by heating, with or without pressure
    • B29C65/14—Joining or sealing of preformed parts, e.g. welding of plastics materials; Apparatus therefor by heating, with or without pressure using wave energy, i.e. electromagnetic radiation, or particle radiation
    • B29C65/1429—Joining or sealing of preformed parts, e.g. welding of plastics materials; Apparatus therefor by heating, with or without pressure using wave energy, i.e. electromagnetic radiation, or particle radiation characterised by the way of heating the interface
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C65/00—Joining or sealing of preformed parts, e.g. welding of plastics materials; Apparatus therefor
    • B29C65/02—Joining or sealing of preformed parts, e.g. welding of plastics materials; Apparatus therefor by heating, with or without pressure
    • B29C65/14—Joining or sealing of preformed parts, e.g. welding of plastics materials; Apparatus therefor by heating, with or without pressure using wave energy, i.e. electromagnetic radiation, or particle radiation
    • B29C65/1429—Joining or sealing of preformed parts, e.g. welding of plastics materials; Apparatus therefor by heating, with or without pressure using wave energy, i.e. electromagnetic radiation, or particle radiation characterised by the way of heating the interface
    • B29C65/1435—Joining or sealing of preformed parts, e.g. welding of plastics materials; Apparatus therefor by heating, with or without pressure using wave energy, i.e. electromagnetic radiation, or particle radiation characterised by the way of heating the interface at least passing through one of the parts to be joined, i.e. transmission welding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67121—Apparatus for making assemblies not otherwise provided for, e.g. package constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6838—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping with gripping and holding devices using a vacuum; Bernoulli devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/02—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by a sequence of laminating steps, e.g. by adding new layers at consecutive laminating stations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05647—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13144—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/753—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/75301—Bonding head
    • H01L2224/75302—Shape
    • H01L2224/75303—Shape of the pressing surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/753—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/75301—Bonding head
    • H01L2224/75314—Auxiliary members on the pressing surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75743—Suction holding means
    • H01L2224/75745—Suction holding means in the upper part of the bonding apparatus, e.g. in the bonding head
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a temporary auxiliary member not forming part of the bonding apparatus
    • H01L2224/81005—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a temporary auxiliary member not forming part of the bonding apparatus being a temporary or sacrificial substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/819—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector with the bump connector not providing any mechanical bonding
    • H01L2224/81901—Pressing the bump connector against the bonding areas by means of another connector
    • H01L2224/81903—Pressing the bump connector against the bonding areas by means of another connector by means of a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832—Applying energy for connecting
    • H01L2224/83201—Compression bonding
    • H01L2224/83203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83862—Heat curing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape
    • H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
    • H01L2924/18161—Exposing the passive side of the semiconductor or solid-state body of a flip chip

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Mechanical Engineering (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Die Bonding (AREA)
  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

本发明的课题是将电子零件经由粘接材料良好地接合于基板上。接合装置10是将电子零件100经由粘接材料112热压接于基板110或其他电子零件上的接合装置，包括：接合工具40，包含接合前端部42，所述接合前端部42包含接合面44及锥形侧面46，所述接合面44设置有隔着单片状的多孔性片材130吸附电子零件100的第一抽吸孔50，所述锥形侧面46形成为朝向接合面44前端变细的锥状，且设置有吸附多孔性片材130的第二抽吸孔52、第二抽吸孔54；以及接合控制部30，对第一抽吸孔50及第二抽吸孔52、第二抽吸孔54相互独立地进行控制。

Description

接合装置和接合方法
技术领域
本发明涉及一种接合装置和接合方法。
背景技术
已知有将半导体裸片(semiconductor die)等电子零件接合于基板上的封装技术。例如，在专利文献1中，为了容易控制粘接剂的供给量，将树脂薄膜(粘接剂)供给至基板，并利用接合工具将半导体裸片经由树脂薄膜接合于基板上。
现有技术文献
专利文献
专利文献1：日本专利第4780858号公报
发明内容
发明所要解决的问题
然而，之前，存在如下情况：通过接合工具的加热及加压，基板上的粘接剂会自半导体裸片的侧面上爬至上方，使得经熔融的粘接剂附着在接合工具的前端部。又，存在如下情况：当对粘接剂进行加热熔融而封装时，由粘接剂产生的烟气(fume gas)会进入至接合工具的抽吸孔，由此使接合工具污染。此外，伴随着近年来的电子零件的小型化，在接合步骤中也需要考虑窄间距化。
本发明是鉴于此种情况而开发的，目的在于提供一种可将电子零件经由粘接材料良好地接合于基板上的接合装置和接合方法。
解决问题的技术手段
本发明的第一实施方式的接合装置是将电子零件经由粘接材料热压接于基板或其他电子零件上的接合装置，包括：接合工具，包括接合前端部，所述接合前端部包括接合面及锥形侧面，所述接合面设置有隔着具有透气性的单片状的透气性片材而吸附电子零件的第一抽吸孔，所述锥形侧面形成为朝向接合面前端变细的锥状，且设置有吸附透气性片材的第二抽吸孔；以及接合控制部，对第一抽吸孔及第二抽吸孔相互独立地进行控制。
根据所述构成，包括接合控制部，所述接合控制部是对设置在接合面上的第一抽吸孔、以及设置在锥形侧面上的第二抽吸孔相互独立地进行控制，故可分别视需要而独立地控制电子零件或透气性片材的吸附或脱离。又，透气性片材是由设置在锥形侧面上的第二抽吸孔吸附，故可防止单片状的多孔性片材的端部下垂，从而在接合步骤时使透气性片材确实地吸附于接合前端部。因此，可将电子零件经由粘接材料良好地接合于基板上。
发明的效果
根据本发明，可将电子零件经由粘接材料良好地接合于基板上。
附图说明
图1是表示本发明的第一实施方式的接合装置的图。
图2是图1的接合工具的俯视图。
图3是图2的III-III线剖面图。
图4是表示本实施方式的接合方法的图。
图5是图4的片材载置平台的俯视图。
图6是表示第一实施方式的接合方法的图。
图7是表示第一实施方式的接合方法的图。
图8是表示第一实施方式的接合方法的图。
图9是表示第一实施方式的接合方法的图。
图10是第一实施方式的接合方法的流程图。
图11是表示本发明的第二实施方式的接合装置的图。
图12是表示本发明的第三实施方式的接合装置的图。
以下对本发明的实施方式进行说明。在以下附图的记载中，相同或类似的构成元件是用相同或类似的符号表示。附图为例示，各部的尺寸或形状为示意性的尺寸或形状，不应将本申请发明的技术范围限定于所述实施方式来解释。
再者，在本发明的各实施方式中，所谓透气性，是指夹于接合头与半导体裸片之间的上爬防止用的片材可在如下程度上使空气透过的性能：通过自形成于接合头上的第一抽吸孔、第二抽吸孔供给的真空，而使接合头可将半导体裸片保持在所述接合面上。即，具有透气性的上爬防止用的片材例如，如以下所述为多孔片材、不织布或形成有透气孔的片材，但所述实施方式不可作限定性解释。
(第一实施方式)
图1是表示第一实施方式的接合装置的整体概况的图。本实施方式的接合装置10是用以将电子零件的一例即半导体裸片100封装于基板110的接合区域的装置。
在图1所示的示例中，公开半导体裸片100作为接合于基板110的电子零件的一例。半导体裸片100包含半导体材料。半导体裸片100形成为具有作为主面的表面及背面的长方体状。具体而言，半导体裸片100包括形成有规定的电路图案的表面即第一主面102a、以及与第一主面102a相反的背面即第二主面102b。在本实施方式中，在半导体裸片100的第一主面102a与基板110相向的方向上，半导体裸片100与基板110接合。此种接合实施方式被称为倒装接合(face down bonding)。
接合装置10包括晶片平台(wafer stage)12、中间平台14、接合平台16、片材载置平台17、接合头18、经由Z轴驱动机构20安装在接合头18上的接合工具40(包含接合前端部42)、获取半导体裸片100的图像信息的摄像部26及摄像部27、使接合头18在XY轴方向上移动的XY台(table)28、以及对这些各种构成的动作进行控制的接合控制部30。
在以下的说明中，将XY轴方向设为与半导体裸片100的主面(或任一平台的主面)平行的方向，将Z轴方向设为与XY轴方向上的面垂直的方向来进行说明。再者，X轴方向与Y轴方向为相互正交。
在晶片平台12上，载置有包含经单片化的多个半导体裸片100的晶片120。晶片120包括形成有规定的电路图案的表面即第一主面122a(相当于半导体裸片100的第一主面102a)、以及与第一主面122a相反的背面即第二主面122b(相当于半导体裸片100的第二主面102b)。晶片120通过将第二主面122b贴附于晶片平台12上的薄膜上，而固定在晶片平台12上。晶片平台12上的半导体裸片100在通过吸附工具与拾取单元(均未图示)的协同动作而拾取半导体裸片100之后，通过移送头(未图示)，而移送至中间平台14。
中间平台14是用以暂时载置半导体裸片100的平台。中间平台14配置在晶片平台12与接合平台16之间。在接合平台16上将半导体裸片100倒装接合于基板110上时，使自晶片平台12拾取的半导体裸片100的方向正反反转，而在第一主面102a所相向的方向上将半导体裸片100载置在中间平台14上。中间平台14是通过线性马达(未图示)等驱动机构，可沿XY轴方向移动而构成。半导体裸片100通过将第一主面102a贴附于中间平台14上的薄膜上，而固定在中间平台14上。中间平台14上的半导体裸片100在通过吸附工具与拾取单元(均未图示)的协同动作而拾取半导体裸片100之后，通过移送头(未图示)，而移送至接合平台16。
接合平台16是用以配置基板110，将半导体裸片100接合于基板110上的平台。基板110包括搭载电子零件(半导体裸片100)的搭载区域。在图1所示的示例中，基板110包含一个搭载区域。基板110例如通过在接合平台16上的薄膜上贴附与设置有基板110的搭载区域的面相反的面，而固定在接合平台16上。
再者，作为变形例，例如也可在一个基板110上设置有多个搭载区域。此时，可通过在基板110的各搭载区域内搭载电子零件(半导体裸片100)之后，在每个搭载区域内使基板110单片化，来获得多个成品(包括电子零件的电子器件)。
或者，也可通过在基板110上的一个搭载区域内层叠多个半导体裸片100，而制造堆叠(stack)型半导体装置。即，也可在接合平台16上，在已搭载于基板110上的其他电子零件(例如半导体裸片)上搭载电子零件(半导体裸片100)。在此种堆叠型半导体装置中，也可为搭载在搭载区域内的两个以上的半导体裸片100全部朝向相同的方向，或者也可为一部分朝向不同的方向。
基板110的材质例如包含有机材料(例如环氧基板或聚酰亚胺基板)、无机材料(例如玻璃基板)或这些材料的复合材料(例如玻璃环氧基板)。基板110是所谓的插入器(interposer)。
再者，接合平台16是通过导轨(未图示)等驱动机构，而使基板110可沿X轴方向移动而构成。又，接合平台16包括用以对基板110进行加热的加热部。
片材载置平台17是用以供给或回收具有透气性的单片状的多孔性片材130(参照图4)的平台。片材载置平台17包含载置单片状的多孔性片材130的至少一个片材载置部60。片材载置部60的构成将在后文说明。
在接合头18上，经由Z轴驱动机构20安装有接合工具40，并且，在与接合工具40在Y轴方向上相隔仅规定距离的位置上安装有摄像部26。换言之，在图1所示的示例中，接合工具40及摄像部26是固定在接合头18上，接合头18通过XY台28而移动，从而使接合工具40与摄像部26一并沿XY轴方向移动。又，在与摄像部26相反之侧，设置有摄像部27。摄像部26可在中间平台14或接合平台16上，拍摄半导体裸片100的第二主面102b，摄像部27可拍摄半导体裸片100的第一主面102a。再者，作为变形例，摄像部26也可不固定在接合头18上，而与接合工具40各别地移动。
接合工具40包括接合半导体裸片100的接合前端部42。接合前端部42是沿Z轴方向延伸的接合工具40之中接合平台16侧的端部。接合工具40内置有加热器(heater)(未图示)，以能够对半导体裸片100或基板110进行加热。又，接合工具40具有抽真空(airvacuum)功能和/或鼓风(air blow)功能，以能够使半导体裸片100或多孔性片材130吸附或脱离。在本实施方式中，通过接合工具40而隔着多孔性片材130将半导体裸片100接合于基板110上。再者，接合工具40的构成将在后文说明。
多孔性片材130具有用以使一个主面与另一个主面之间通气的多个孔。关于多孔性片材130的哥雷值(Gurley value)，为了吸附半导体裸片100等电子零件，值越小越好，优选为例如具有1～2(s/100cc/in2)的范围。
又，多孔性片材130包含较作为接合对象的半导体裸片100的半导体材料或接合面44的材质更柔软的材质。多孔性片材130也可为例如不织布。
多孔性片材130例如为四氟乙烯树脂(聚四氟乙烯(Polytetrafluoroethylene，PTFE))或聚酰亚胺，但对其材质并不限定，也可使用其他多孔性的材料。例如，当使用四氟乙烯树脂作为多孔性片材130时，四氟乙烯树脂也可为PTFE纳米纤维。PTFE纳米纤维也可使用具有约1μm～2μm的孔径，具有约56μm的厚度，且哥雷值具有1.2(s/100cc/in2)者。PTFE纳米纤维尽管厚却可减小哥雷值(即提高通气性)，而且，即使加热至约260℃也几乎不会热收缩，故在例如施加230℃以上的热的制造工艺中具有耐热性。因此，PTFE纳米纤维在用作本实施方式的多孔性片材130时有效。
接合控制部30是控制为了利用接合装置10进行接合所必需的处理的构件。接合控制部30进行包含接合工具40的XYZ轴驱动、θ轴驱动(围绕着Z轴的旋转)及倾斜驱动(tiltdrive)(倾斜方向)的接合工具40的位置控制、抽真空功能和/或鼓风功能的导通或断开控制、将半导体裸片100封装至基板110时的载荷控制、接合工具40或接合平台16的热供给控制等。接合控制部30是以在与接合头18、接合工具40及摄像部26、摄像部27等各构成之间可进行信号的收发的方式连接，由此对这些构件的动作进行控制。
在接合控制部30上，连接有用以输入控制信息的操作部32、以及用以输出控制信息的显示部34。由此，操作者可一面通过显示部34识别画面，一面通过操作部32而输入需要的控制信息。
接合控制部30是包括中央处理器(Central Processing Unit，CPU)及存储器等的计算机装置，在存储器中预先存储有用以进行接合所必需的处理的接合程序等。接合控制部30是可执行后述本实施方式的半导体裸片的封装方法的相关各步骤而构成(例如包含用以使计算机执行各动作的程序)。
其次，一面参照图2及图3，一面对本实施方式的接合工具40的详细情况进行说明。图2是接合工具40的俯视图。图3是图2的III-III线剖面图。
接合前端部42包括接合面44、以及朝向接合面44前端变细的锥形侧面46a～锥形侧面46d(以下，也将这些面统称为“锥形侧面46”)。在图2所示的示例中，在接合面44上设置有多个第一抽吸孔50，在锥形侧面46上设置有多个第二抽吸孔52、第二抽吸孔54，以便能够使多孔性片材130或半导体裸片100吸附或脱离。
接合面44与作为接合对象的半导体裸片100的形状相对应，例如在XY平面观察时呈矩形状。又，接合面44在XY平面观察时具有大于半导体裸片100(电子零件)的形状。由此，可利用接合面44均匀地按压整个半导体裸片100，故可实现良好的接合。
锥形侧面46设置在接合面44的各边上。在图2所示的示例中，在接合面44的各边之中任一条边上设置有锥形侧面46a，且与锥形侧面46a邻接地设置有锥形侧面46b，与锥形侧面46b邻接地设置有锥形侧面46c，与锥形侧面46c邻接地设置有锥形侧面46d。换言之，锥形侧面46a、锥形侧面46c设置在接合面44的相互相向的各边上，另一方面，锥形侧面46b、锥形侧面46d设置在接合面44的相互相向的各边上。如图3所示，各锥形侧面46a～锥形侧面46d与接合工具40的周边面48(或接合面44)所成的角θ1为θ1＞90度(例如θ1≧135度)。各锥形侧面46a～锥形侧面46d的倾斜角度θ1可根据接合面44的大小或半导体裸片100的吸附程度等来适当设定。
多个第一抽吸孔50(图2中为10个)设置在接合面44的中央区域。由此，可通过第一抽吸孔50来有效地吸附半导体裸片100。
再者，多个第一抽吸孔50是朝向接合工具40的基端部侧延伸且相互连通(未图示)。由此，可统一控制多个第一抽吸孔50。
又，多个第二抽吸孔52(图2中为3个)设置在任一个锥形侧面46a上，多个第二抽吸孔54(图2中为3个)设置在与锥形侧面46a相向的锥形侧面46c上。另一方面，在剩下的锥形侧面46b、锥形侧面46d上未设置第二抽吸孔。由此，对多孔性片材130在单方向上进行吸附支撑，因此可抑制片材的褶皱或下垂，从而将多孔性片材130以良好的状态吸附于接合前端部42上。
在图2所示的示例中，第二抽吸孔52(或第二抽吸孔54)是以沿锥形侧面46a(或锥形侧面46c)上的接合面44的边的延伸方向间隔彼此大致均等的方式配置。
再者，多个第二抽吸孔52、第二抽吸孔54是朝向接合工具40的基端部侧延伸且相互连通(未图示)。由此，可统一控制多个第二抽吸孔52、第二抽吸孔54。
在本实施方式中，对设置在接合面44上的多个第一抽吸孔50、与设置在锥形侧面46上的多个第二抽吸孔52、第二抽吸孔54可相互独立地进行控制而构成。通过采用此种构成，例如，(i)当使多孔性片材130与半导体裸片100两者吸附于接合工具40上时，将第一抽吸孔50及第二抽吸孔52、第二抽吸孔54的抽吸动作均控制成导通状态，(ii)当使半导体裸片100自接合工具40脱离时，一面将第一抽吸孔50的抽吸动作设为断开状态，一面将第二抽吸孔52、第二抽吸孔54的抽吸动作控制成导通状态，(iii)当使多孔性片材130自接合工具40脱离时，将第一抽吸孔50及第二抽吸孔52、第二抽吸孔54的抽吸动作均设为断开状态。
再者，也可替代在所述(i)～(iii)中将抽吸动作设为断开状态的操作，将排气动作控制成导通状态，以便通过鼓风等而引起真空破坏。由此，可使半导体裸片100或多孔性片材130自接合工具40确实地脱离。
其次，一面参照图4～图10，一面对本实施方式的接合方法进行说明。图4～图9是表示本实施方式的接合方法的图，图10是本实施方式的接合方法的流程图。再者，图5是本实施方式的片材载置平台的俯视图。本实施方式的接合方法可利用图1所示的接合装置10来进行。通过本实施方式的接合方法，可制造将半导体裸片100经由粘接材料114封装在基板110上的半导体装置140(参照图8)。
以下，按照图10的流程图，一面参照图4～图9的各图，一面对接合方法进行说明。
首先，在晶片平台12上，准备经单片化的多个半导体裸片100(S10)。具体而言，如图1所示，在晶片平台12上，准备包含贴附在薄膜上的多个半导体裸片100的晶片120。晶片120是将多个半导体裸片100分别在第一主面102a朝向上方并且第二主面102b与晶片平台12相向的方向上，配置在晶片平台12上。
其次，将半导体裸片100移送至中间平台14(S11)。例如，通过吸附工具与拾取单元(均未图示)的协同动作，将晶片平台12上的多个半导体裸片100一个个地移送至中间平台14。
另一方面，对片材载置平台17的片材载置部60供给多孔性片材130，使接合工具40移动至片材载置平台17的上方，使多孔性片材130吸附于接合面44(S12)。具体而言，如图4所示，使接合前端部42嵌合于片材载置部60，并且将第一抽吸孔50及第二抽吸孔52、第二抽吸孔54的抽吸动作设为导通状态(VAC：导通(ON))，使多孔性片材130吸附于接合前端部42。步骤S12可与步骤S11同时进行或在步骤S11之后进行。
在此处，对片材载置平台17的构成进行说明。图5是片材载置平台17的俯视图，图4是图5的VI-VI线剖面图。
片材载置平台17包含至少一个片材载置部60。在一个片材载置部60上载置有单片状的一个多孔性片材130。在图4所示的示例中，表示有一个片材载置部60，但也可在片材载置平台17上设置有多个片材载置部60。
片材载置部60包括支撑多孔性片材130的底面64、以及形成为越远离底面64越扩大的锥状的锥形侧面66a、锥形侧面66b、锥形侧面66c、锥形侧面66d(以下也将这些面统称为“锥形侧面66”)。在图4所示的示例中，在底面64上设置有用以回收多孔性片材130的片材回收孔62。
底面64与接合面44的形状相对应，例如在XY平面观察时呈矩形状。又，底面64在XY平面观察时具有大于半导体裸片100(电子零件)的形状。
锥形侧面66是与接合前端部42的锥形侧面46相对应而设置，且设置在底面64的各边上。在图5所示的示例中，在底面64的各边之中任一条边上设置有锥形侧面66a，且与锥形侧面66a邻接地设置有锥形侧面66b，与锥形侧面66b邻接地设置有锥形侧面66c，与锥形侧面66c邻接地设置有锥形侧面66d。换言之，锥形侧面66a、锥形侧面66c设置在底面64的相互相向的各边上，另一方面，锥形侧面66b、锥形侧面66d设置在底面64的相互相向的各边上。如图4所示，各锥形侧面66a～锥形侧面66d与片材载置平台17的周边68(或底面64)所成的角θ2为θ2＞90度(例如θ2≧135度)。各锥形侧面66a～锥形侧面66d的倾斜角度θ1也可与接合前端部42的各锥形侧面46a～锥形侧面46d的倾斜角度θ2实质上相同。
若返回至图10的流程图，则其次，通过接合工具40，将半导体裸片100经由粘接材料112热压接于基板110上(S13)。
具体而言，首先，在使多孔性片材130吸附于接合前端部42的状态下，使接合工具40移动至中间平台14的上方，而使中间平台14上的半导体裸片100隔着多孔性片材130吸附于接合前端部42上。然后，将接合工具40如图6所示配置在接合平台16的上方。此时，半导体裸片100是形成有规定的电路图案的第一主面102a与基板110相向，第二主面102b隔着多孔性片材130而吸附于接合面44上。又，多孔性片材130吸附于接合面44及锥形侧面46上。如图6所示，在步骤S13的步骤中，第一抽吸孔50及第二抽吸孔52、第二抽吸孔54的抽吸动作是设为导通状态(VAC：导通)。
在此处，对半导体裸片100的构成进行说明。在半导体裸片100的第一主面102a上，设置有多个电极垫(pad)104、设置在多个电极垫104上的多个凸块电极106、以及设置在多个凸块电极106的周围的保护膜108。电极垫104是与形成于第一主面102a上的电路图案电性连接的端子。又，在各电极垫104的外周端部，被保护膜108所包覆，由此露出的电极垫104的中央部成为与凸块电极106的连接部。
电极垫104及凸块电极106的材质并无限定，例如电极垫104也可为铝或铜等，并且，凸块电极106也可为金等。
若返回至图6，则在接合平台16上配置有基板110，在基板110的搭载半导体裸片100的区域内设置有粘接材料112。在图6所示的示例中，粘接材料112在常温下为浆料状，但并不限于此，也可在常温下为薄膜状。粘接材料112例如为热硬化性树脂。由此，可通过对粘接材料112进行加热而使其熔融及硬化。
然后，如图7所示，使接合工具40朝向接合平台16下降，并利用接合工具40进行加压及加热，将半导体裸片100经由经热硬化的粘接材料114而接合于基板110上。如此一来，可实现半导体裸片100的凸块电极106与基板110的配线(未图示)的电性接合，同时，可对半导体裸片100与基板110之间进行树脂密封。再者，粘接材料并不限于在接合前预先设置在基板110上的实施方式，也可在接合步骤中在半导体裸片100与基板110之间作为底部填充料(underfill)而填充。
半导体裸片100的向基板110的热压接结束之后，使半导体裸片100自接合面44脱离(S14)。具体而言，如图8所示，一面将第一抽吸孔50的抽吸动作设为断开状态(VAC：断开(OFF))，一面将第二抽吸孔52、第二抽吸孔54的抽吸动作均控制成导通状态(VAC：导通)。如此一来，可一面使多孔性片材130吸附于接合前端部42上，一面仅使半导体裸片100自接合前端部42脱离。此时，多孔性片材130是吸附于相向的一对锥形侧面46a、锥形侧面46c上，故可预先稳定地吸附在接合前端部42上。
然后，使接合工具40移动至片材载置平台17的上方，使多孔性片材130自接合面44脱离至片材载置部60上。具体而言，如图9所示，将第一抽吸孔50及第二抽吸孔52、第二抽吸孔54的抽吸动作均设为断开状态。如此一来，可使多孔性片材130自接合前端部42脱离。然后，配置在片材载置部60上的使用完的多孔性片材130也可设为通过将片材回收孔62的抽吸动作设为导通状态(VAC：导通)，而回收至片材回收孔62内。
再者，在所述接合方法中，也可代替将抽吸动作设为断开状态的操作，将排气动作控制成导通状态，以便通过鼓风等而引起真空破坏。由此，可使半导体裸片100或多孔性片材130自接合工具40确实地脱离。
如以上所述，本实施方式的接合装置是将电子零件经由粘接材料热压接于基板或其他电子零件上的接合装置，包括：接合工具，包含接合前端部，所述接合前端部包含接合面及锥形侧面，所述接合面设置有隔着单片状的多孔性片材吸附电子零件的第一抽吸孔，所述锥形侧面形成为朝向接合面前端变细的锥状，且设置有吸附多孔性片材的第二抽吸孔；以及接合控制部，对第一抽吸孔及第二抽吸孔相互独立地进行控制。
根据所述构成，包含接合控制部，所述接合控制部是对设置在接合面上的第一抽吸孔、与设置在锥形侧面上的第二抽吸孔相互独立地进行控制，因此可分别视需要而独立地控制电子零件或多孔性片材的吸附或脱离。因此，可将电子零件经由粘接材料良好地接合于基板上。又，多孔性片材是由设置在锥形侧面上的第二抽吸孔来吸附，故可防止单片状的多孔性片材的端部下垂，从而在接合步骤时使多孔性片材确实地吸附于接合前端部。又，设置有第二抽吸孔的部分是形成为锥状，故可进行与窄间距化相应的接合步骤。
在所述实施方式中，也可为接合面呈矩形状，锥形侧面至少分别设置在接合面的相互相向的各边上。
在所述实施方式中，也可为接合面在俯视所述接合面时大于电子零件。
在所述实施方式中，也可还包括至少一个片材载置部，所述片材载置部载置多孔性片材，以便对接合工具供给或回收多孔性片材。
在所述实施方式中，也可为至少一个片材载置部包括支撑多孔性片材的底面、以及形成为越远离底面越扩大的锥状的锥形侧面。
在所述实施方式中，也可为片材载置部的底面呈矩形状，片材载置部的锥形侧面至少分别设置在底面的相互相向的各边上。
在所述实施方式中，也可为在片材载置部的底面上设置有回收多孔性片材的片材回收孔。
本实施方式的接合方法包括如下步骤：准备接合工具，所述接合工具包括接合前端部，所述接合前端部包含接合面及锥形侧面，所述接合面设置有隔着单片状的多孔性片材吸附电子零件的第一抽吸孔，所述锥形侧面形成为朝向接合面前端变细的锥状，且设置有吸附多孔性片材的第二抽吸孔；将第一抽吸孔及第二抽吸孔的抽吸动作设为导通状态，隔着多孔性片材将电子零件吸附于接合面上；通过接合工具，将电子零件经由粘接材料热压接于基板或其他电子零件上；以及一面将第二抽吸孔的抽吸动作设为导通状态，一面将第一抽吸孔的抽吸动作设为断开状态或将排气动作设为导通状态，而使所述电子零件自接合面脱离。
根据所述构成，包括接合控制部，所述接合控制部是对设置在接合面上的第一抽吸孔、以及设置在锥形侧面上的第二抽吸孔相互独立地进行控制，故可分别视需要而独立地控制电子零件或多孔性片材的吸附或脱离。因此，可将电子零件经由粘接材料良好地接合于基板上。又，多孔性片材是由设置在锥形侧面上的第二抽吸孔吸附，因此可防止单片状的多孔性片材的端部下垂，从而在接合步骤时使多孔性片材确实地吸附于接合前端部。又，设置有第二抽吸孔的部分形成为锥状，因此可进行与窄间距化相应的接合步骤。
又，由于多孔性片材介于接合前端部与电子零件之间，故即使粘接材料自电子零件的侧面上爬至上方，也可防止粘接材料附着在接合前端部。因此，即使应用在XY平面观察时大于电子零件的接合面，也会抑制接合工具的污染等，从而不会降低装置的维护性。因此，可均匀地按压整个电子零件，并且实现维护性的提高。
又，由于使用多孔性片材，故可抑制对电子零件或粘接材料进行加热时所产生的烟气附着在接合前端部，或进入至第一抽吸孔及第二抽吸孔。因此，就此方面而言，可抑制接合工具受到污染，从而可使维护性进一步提高。
本发明并不限定于所述实施方式，可进行各种变形而应用。
在所述实施方式中，已说明将接合前端部42的锥形侧面46设置在接合面44的各边上的实施方式，但不需要在所有的边上设置锥形侧面46，也可仅在相向的两条边上设置锥形侧面。此时，只要在相向的两条边的各锥形侧面上分别设置一个以上的第二抽吸孔即可。
在所述实施方式中，已说明在锥形侧面46a～锥形侧面46d之中相向的两个锥形侧面46a、锥形侧面46c上设置第二抽吸孔52、第二抽吸孔54的实施方式，但除所述实施方式以外，也可在另一对相向的两个锥形侧面46b、锥形侧面46d上也设置第二抽吸孔。
在所述实施方式中，已说明分别设置多个第一抽吸孔50及第二抽吸孔52、第二抽吸孔54的实施方式，但设置在接合面44、锥形侧面46a及锥形侧面46c上的抽吸孔也可分别各为一个。
在所述实施方式中，已说明片材载置平台17兼用于多孔性片材130的供给及回收的实施方式，但也可分为用以供给多孔性片材130的平台、及用以回收多孔性片材130的平台。此时，各平台的片材载置部的构成也可为相同。
在所述实施方式中，是以对半导体裸片100进行倒装接合的实施方式为例进行说明，但也可将本发明应用于仰面接合(face up bonding)。此时，在半导体裸片100的第二主面102b与基板110相向的方向上，将半导体裸片100接合于基板110。
又，在所述实施方式中，作为进行接合的半导体裸片100的一例，已说明在第一主面102a上设置电极垫104及凸块电极106的实施方式，但也可将包含贯通两个主面的贯通电极的半导体裸片接合于基板110上。此时，也可在基板110的搭载区域内使半导体裸片跨多段堆叠，在各段内分别对多个半导体裸片进行统一接合。
又，作为接合对象的电子零件的一例并不限于半导体裸片，也可将封装有半导体裸片的半导体装置接合于基板上。或者，电子零件既可为主动元件或被动元件中的任一者，也可为其他零件。
(第二实施方式)
在第一实施方式中，是在接合工具与半导体裸片之间夹着具有透气性的多孔片材而将半导体裸片接合于基板110上，而在本实施方式中，与第一实施方式的不同点是在不具有透气性的片材上开设透气孔而使所述片材具有透气性。以下，以与第一实施方式的不同点为中心进行说明。
图11是表示本发明的第二实施方式的接合装置的图。图11所示的本实施方式的接合装置10A包括开孔机构70。所述开孔机构70是在接合前端部42所保持的上爬防止用的片材140上开设透气孔。片材140是不具有透气性的例如聚丙烯、聚酯、氯乙烯、聚酰亚胺等的树脂片材，但其材质可无限定地使用。
开孔机构70设置在接合头20可沿XY方向移动的范围内。开孔机构70包括与图3所示的第一吸气孔50相对应地在片材140上开设透气孔的多个针构件70a。针构件70a通过与开孔机构70一并通过未图示的驱动机构而沿Z方向上升及下降，贯通保持于接合工具40上的片材140，而在所述片材140上开设透气孔，所述接合工具40是停止在开孔机构70的正上方。
在此处，形成于接合前端部42的第二抽吸孔52是为了抑制保持在接合工具40上的片材140的褶皱、下垂而设置。因此，即使在片材140的与第二抽吸孔52、第二抽吸孔54相对应的部位上未通过开孔机构70而开设透气孔，也可通过接合工具40来吸附保持半导体裸片100。再者，当然，只要可抑制片材140的褶皱、下垂，也可开设与第二抽吸孔52相对应的透气孔。
又，开孔机构70也可设为不具有驱动机构而固定地配置在接合装置10A上的构成。当设为所述构成时，通过接合工具40相对于开孔机构70下降及上升而在片材140上开设透气孔。
此外，透气孔也可不将各个透气孔与一个第一抽吸孔52相对应地开设在片材140上，一个或者也可与多个第一吸气孔50相对应地开设透气孔。当设为所述构成时，也可在接合前端部42形成具有较针构件70a的直径更大的直径的孔，在片材140上开设与所述孔相对应的透气孔。又，也可形成与接合前端部42连通的沟槽，并且与所述沟槽相对应地将针构件70a设为中空形状，在片材140上形成与所述沟槽及中空形状相对应的形状的开口孔。
根据本实施方式，在为了抑制上爬而采用不具有透气性的片材140的构成中，也可有效抑制保持于接合工具40上的片材140的褶皱、下垂。
(第三实施方式)
第二实施方式的开孔机构70是在保持于接合工具40上的状态下在片材140上开设透气孔，但本实施方式的开孔机构71的不同点是在载置于片材载置平台17上的状态下在片材140上开设透气孔。以下，以与第二实施方式的不同点为中心进行说明。
图12是表示本发明的第三实施方式的接合装置的图。图12所示的本实施方式的接合装置10B包括具有多个针构件71a的开孔机构71。在片材载置平台17上，形成有与多个针构件71a相对应的未图示的孔。开孔机构71通过未图示的驱动机构而相对于片材载置平台17沿Z方向上升或下降，并使针构件71a贯通于片材140而形成透气孔。再者，也可将开孔机构71固定在接合装置上，使片材载置平台17相对于开孔机构71驱动由此在片材140上形成透气孔。
接合工具40吸附保持形成有透气孔的片材140，且经由所述片材140将半导体裸片100接合于基板110上。
此外，接合装置也可设为如下实施方式：通过使片材140单片化的未图示的单片化机构，而切取片材140加以单片化，并且形成透气孔。又，也可另外设置在片材140上形成透气洞的机构。
又，作为上爬防止用的片材，也可使用规则地或不规则地一致地预先形成有多个透气孔的片材，所述多个透气孔是用以对包含不具有透气性的材质的片材赋予透气性。
又，已说明将多个第一抽吸孔50设置在接合面44的中央区域的内容，但多个第一抽吸孔50也可例如规则地或不规则地设置在接合面44的缘部附近或整个接合面44上。
又，第一抽吸孔50、第二抽吸孔52也可为矩形等多边形的孔或长孔。此外，第一抽吸孔50、第二抽吸孔52也可为与接合面44连通而设置的沟槽形状。
又，接合工具40的锥形侧面46a～锥形侧面46d也可仅设置在相向的两个面上。同样地，片材载置部60的锥形侧面66a～锥形侧面66d也可仅设置在相向的两个面上。
通过所述发明的实施方式而说明的实施方式可根据用途来适当组合，或者加以变更或改良而使用，本发明并不限定于所述实施方式的记载。自权利要求的记载当知，此种组合或者加以变更或改良的形态也可包含在本发明的技术范围内。
符号的说明
10、10A、10B：接合装置
12：晶片平台
14：中间平台
16：接合平台
17：片材载置平台
18：接合头
30：接合控制部
40：接合工具
42：接合前端部
46a～46d：锥形侧面
50：第一抽吸孔
52、54：第二抽吸孔
60：片材载置部
66a～d：锥形侧面
70、71：开孔机构
70a、71a：针构件
110：基板
112、114：粘接材料
130：多孔性片材

Claims (13)

1.一种接合装置，将电子零件经由粘接材料热压接于基板或其他电子零件上，所述接合装置包括：
接合工具，包含接合前端部，所述接合前端部包含接合面以及锥形侧面，所述接合面设置有隔着具有透气性的单片状的透气性片材而吸附所述电子零件的第一抽吸孔，所述锥形侧面形成为朝向所述接合面前端变细的锥状，且设置有吸附所述透气性片材的第二抽吸孔；以及
接合控制部，对所述第一抽吸孔及所述第二抽吸孔相互独立地进行控制。
2.根据权利要求1所述的接合装置，其中
所述接合面呈矩形状，
所述锥形侧面至少分别设置在所述接合面的相互相向的各边上。
3.根据权利要求1或2所述的接合装置，其中在俯视所述接合面时所述接合面大于所述电子零件。
4.根据权利要求1至3中任一项所述的接合装置，其中还包括：至少一个片材载置部，载置所述透气性片材，以便对所述接合工具供给或回收所述透气性片材。
5.根据权利要求4所述的接合装置，其中所述至少一个片材载置部包括：底面，支撑所述透气性片材；以及锥形侧面，形成为越远离所述底面越扩大的锥状。
6.根据权利要求5所述的接合装置，其中
所述片材载置部的所述底面呈矩形状，
所述片材载置部的所述锥形侧面至少分别设置在所述底面的相互相向的各边上。
7.根据权利要求5或6所述的接合装置，其中在所述片材载置部的所述底面上设置有回收所述透气性片材的片材回收孔。
8.根据权利要求1至7中任一项所述的接合装置，其中
所述透气性片材通过在不具有透气性的片材上所开设的透气孔而具有透气性，
所述接合装置还包括：开孔机构，在所述不具有透气性的片材上开设所述透气孔。
9.根据权利要求1至6中任一项所述的接合装置，其中
所述透气性片材为多孔性片材。
10.一种接合方法，包括如下步骤：
准备接合工具，所述接合工具包括接合前端部，所述接合前端部包含接合面以及锥形侧面，所述接合面设置有隔着具有透气性的单片状的透气性片材而吸附电子零件的第一抽吸孔，所述锥形侧面形成为朝向所述接合面前端变细的锥状，且设置有吸附所述透气性片材的第二抽吸孔；
将所述第一抽吸孔及所述第二抽吸孔的抽吸动作设为导通状态，隔着所述透气性片材将所述电子零件吸附于所述接合面上；
通过所述接合工具将所述电子零件经由粘接材料热压接于基板或其他电子零件上；以及
一面将所述第二抽吸孔的抽吸动作设为导通状态，一面将所述第一抽吸孔的抽吸动作设为断开状态或将排气动作设为导通状态，使所述电子零件自所述接合面脱离。
11.根据权利要求10所述的接合方法，其中还包括如下步骤：
准备载置所述透气性片材的至少一个片材载置部；且
所述至少一个片材载置部包括：底面，支撑所述透气性片材；以及锥形侧面，形成为越远离所述底面越扩大的锥状。
12.根据权利要求10或11所述的接合方法，其中
所述透气性片材通过在不具有透气性的片材上所开设的透气孔而具有透气性，
所述接合方法还包括如下步骤：通过开孔机构在不具有透气性的片材上开设所述透气孔。
13.根据权利要求10或11所述的接合方法，其中
所述透气性片材为多孔性片材。
CN201780084538.7A 2016-11-30 2017-11-29 接合装置和接合方法 Active CN110226220B (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2016-233401 2016-11-30
JP2016233401 2016-11-30
JP2017-041466 2017-03-06
JP2017041466A JP6307729B1 (ja) 2016-11-30 2017-03-06 ボンディング装置及びボンディング方法
PCT/JP2017/042796 WO2018101322A1 (ja) 2016-11-30 2017-11-29 ボンディング装置及びボンディング方法

Publications (2)

Publication Number Publication Date
CN110226220A true CN110226220A (zh) 2019-09-10
CN110226220B CN110226220B (zh) 2023-05-26

Family

ID=61901853

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201780084538.7A Active CN110226220B (zh) 2016-11-30 2017-11-29 接合装置和接合方法

Country Status (7)

Country Link
US (1) US11024596B2 (zh)
JP (1) JP6307729B1 (zh)
KR (1) KR102242193B1 (zh)
CN (1) CN110226220B (zh)
SG (1) SG11201906985QA (zh)
TW (1) TWI668768B (zh)
WO (1) WO2018101322A1 (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112188830A (zh) * 2020-10-16 2021-01-05 Tcl华星光电技术有限公司 吸附机构、压合装置及显示模组的压合方法
CN112530820A (zh) * 2019-09-17 2021-03-19 铠侠股份有限公司 半导体制造装置及半导体装置的制造方法

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102237061B1 (ko) * 2017-03-28 2021-04-08 가부시키가이샤 신가와 전자부품 실장 장치
KR102592226B1 (ko) 2018-07-17 2023-10-23 삼성전자주식회사 반도체 패키지 본딩헤드 및 본딩방법
US11978720B2 (en) * 2021-01-28 2024-05-07 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device package and methods of manufacture
US11961817B2 (en) * 2021-02-26 2024-04-16 Taiwan Semiconductor Manufacturing Company, Ltd. Apparatus and method for forming a package structure
JP2022152575A (ja) * 2021-03-29 2022-10-12 芝浦メカトロニクス株式会社 実装ツールおよび実装装置
CN114248342B (zh) * 2022-02-07 2023-03-31 东莞市志橙半导体材料有限公司 一种异形半导体管芯非导电保护管的制备方法
TWI790118B (zh) * 2022-02-10 2023-01-11 友達光電股份有限公司 接合設備
WO2024165133A1 (en) * 2023-02-06 2024-08-15 Applied Materials, Inc. Suction holder for fastening an optical device, method of picking up and holding an optical device, and method of replacing an air-permeable material in a system for picking up and holding an optical device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006066767A (ja) * 2004-08-30 2006-03-09 Fujitsu Ltd 電子部品実装装置
US20120043005A1 (en) * 2010-08-20 2012-02-23 Shinko Electric Industries Co., Ltd. Electronic packaging apparatus and electronic packaging method
TW201248750A (en) * 2011-05-27 2012-12-01 Toray Eng Co Ltd Mounting method and mounting device
KR20140094086A (ko) * 2013-01-21 2014-07-30 앰코 테크놀로지 코리아 주식회사 반도체 칩 부착 방법

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4780858B2 (ja) 2001-06-06 2011-09-28 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US6703299B2 (en) * 2001-12-21 2004-03-09 Intel Corporation Underfill process for flip-chip device
JP4285651B2 (ja) * 2004-07-13 2009-06-24 日東電工株式会社 吸着固定用シートおよびその製造方法
JP2006066625A (ja) * 2004-08-26 2006-03-09 Nec Corp ベアチップ実装装置、ベアチップ実装方法及びシート
KR100985084B1 (ko) * 2005-10-06 2010-10-04 후지쯔 세미컨덕터 가부시키가이샤 반도체 장치의 제조 방법
TWM326217U (en) * 2007-08-22 2008-01-21 Powertech Technology Inc Wafer collet capable of avoiding venting due to warped adsorptive pad
WO2009128206A1 (ja) * 2008-04-18 2009-10-22 パナソニック株式会社 フリップチップ実装方法とフリップチップ実装装置およびそれに使用されるツール保護シート
TW201001566A (en) * 2008-06-24 2010-01-01 Powertech Technology Inc Jig and method for picking up a die
TWI439351B (zh) * 2008-09-29 2014-06-01 Nitto Denko Corp Adsorption tablets
JP2013206965A (ja) * 2012-03-27 2013-10-07 Fujitsu Ltd プリント基板の製造方法
JP6393897B2 (ja) * 2014-06-23 2018-09-26 パナソニックＩｐマネジメント株式会社 部品圧着装置
DE102014117020A1 (de) * 2014-11-20 2016-05-25 Infineon Technologies Ag Verfahren zum herstellen einer stoffschlüssigen verbindung zwischen einem halbleiterchip und einer metallschicht
JP6438792B2 (ja) * 2015-02-17 2018-12-19 ルネサスエレクトロニクス株式会社 半導体装置
CA3030474A1 (en) * 2016-07-26 2018-02-01 Saudi Arabian Oil Company Addition of monovalent salts for improved viscosity of polymer solutions used in oil recovery applications
US11024595B2 (en) * 2017-06-16 2021-06-01 Micron Technology, Inc. Thermocompression bond tips and related apparatus and methods
KR102592226B1 (ko) * 2018-07-17 2023-10-23 삼성전자주식회사 반도체 패키지 본딩헤드 및 본딩방법

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006066767A (ja) * 2004-08-30 2006-03-09 Fujitsu Ltd 電子部品実装装置
US20120043005A1 (en) * 2010-08-20 2012-02-23 Shinko Electric Industries Co., Ltd. Electronic packaging apparatus and electronic packaging method
TW201248750A (en) * 2011-05-27 2012-12-01 Toray Eng Co Ltd Mounting method and mounting device
KR20140094086A (ko) * 2013-01-21 2014-07-30 앰코 테크놀로지 코리아 주식회사 반도체 칩 부착 방법

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112530820A (zh) * 2019-09-17 2021-03-19 铠侠股份有限公司 半导体制造装置及半导体装置的制造方法
CN112530820B (zh) * 2019-09-17 2023-12-22 铠侠股份有限公司 半导体制造装置及半导体装置的制造方法
CN112188830A (zh) * 2020-10-16 2021-01-05 Tcl华星光电技术有限公司 吸附机构、压合装置及显示模组的压合方法
CN112188830B (zh) * 2020-10-16 2021-09-03 Tcl华星光电技术有限公司 吸附机构、压合装置及显示模组的压合方法

Also Published As

Publication number Publication date
SG11201906985QA (en) 2019-08-27
TW201826406A (zh) 2018-07-16
US11024596B2 (en) 2021-06-01
JP2018093156A (ja) 2018-06-14
US20210005570A1 (en) 2021-01-07
KR20190085547A (ko) 2019-07-18
CN110226220B (zh) 2023-05-26
TWI668768B (zh) 2019-08-11
WO2018101322A1 (ja) 2018-06-07
KR102242193B1 (ko) 2021-04-21
JP6307729B1 (ja) 2018-04-11

Similar Documents

Publication Publication Date Title
CN110226220A (zh) 接合装置和接合方法
JP6902292B2 (ja) ボンディング装置及びボンディング方法
JP6679378B2 (ja) 実装装置および実装方法
US11189594B2 (en) Bonding apparatus and bonding method
JP2011151264A (ja) 加熱装置および実装体の製造方法
US9426898B2 (en) Thermocompression bonders, methods of operating thermocompression bonders, and interconnect methods for fine pitch flip chip assembly
JP4200285B2 (ja) 回路基板の製造方法
KR102228702B1 (ko) 다이의 실장 방법
CN111712906B (zh) 聚四氟乙烯片以及晶粒封装方法
JP4674548B2 (ja) ボンディング装置及びボンディングツール
WO2019065394A1 (ja) 実装装置
JP5098939B2 (ja) ボンディング装置及びボンディング方法
JP4234286B2 (ja) 異方性導電膜接続用熱圧着装置
KR102037972B1 (ko) 다이 본딩 방법
JP3629850B2 (ja) バンプ付電子部品の圧着方法
KR20200107129A (ko) 칩 본딩 장치 및 방법
JP2008263160A (ja) 基板と半導体素子の接合方法及び接合体
KR20120078115A (ko) 와이어 본딩장치

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant