CN109491157A - 显示面板用基板的制造方法 - Google Patents
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Classifications
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- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
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- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
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Abstract
一种显示面板用基板的制造方法,抑制对半导体膜和透明电极膜中的一个膜进行的蚀刻处理、退火处理给另一个膜带来不良影响的事态。其特征在于,具备:像素电极形成工序,在覆盖栅极电极(34)的栅极绝缘膜(38)上形成包括透明电极膜的像素电极(33);半导体膜形成工序,在像素电极形成工序之后进行,在栅极绝缘膜(38)上以一部分覆盖像素电极(33)的形式形成半导体膜(42);退火处理工序,在半导体膜形成工序之后进行,对半导体膜(42)进行退火处理;以及蚀刻工序,在退火处理工序之后进行,通过对半导体膜(42)进行蚀刻,将与栅极电极(34)重叠的沟道部(37)形成在与像素电极(33)同一层。
Description
技术领域
本发明涉及显示面板用基板的制造方法。
背景技术
以往,作为显示装置所使用的显示面板用基板的一个例子,已知下述专利文献1所记载的显示面板用基板。在专利文献1所记载的显示面板用基板中,在透明基板上按顺序层叠有栅极配线、栅极绝缘膜、半导体膜(沟道部)、源极用导电膜(和漏极用导电膜)、绝缘膜以及透明电极膜(像素电极)。
现有技术文献
专利文献
专利文献1:特开2011-151194号公报
发明内容
发明要解决的问题
在上述构成中,半导体膜经由漏极用导电膜与透明电极膜连接。绝缘膜介于透明电极膜与漏极用导电膜之间。因此,要想连接透明电极膜与漏极用导电膜,需要在绝缘膜形成接触孔。如果将透明电极膜和半导体膜配置在同一层,则无需形成上述的接触孔,因此能够削减工时。然而,在将透明电极膜和半导体膜配置在同一层的构成中,担心会发生对其中一个膜实施的蚀刻处理、退火处理给另一个膜带来不良影响的事态。
本发明是基于上述这样的情况而完成的,其目的在于,在将半导体膜和透明电极膜配置在同一层的情况下,抑制对半导体膜和透明电极膜中的一个膜进行的蚀刻处理、退火处理给另一个膜带来不良影响的事态。
用于解决问题的方案
为了解决上述问题,本发明的显示面板用基板的制造方法的特征在于,具备:像素电极形成工序,在覆盖栅极电极的栅极绝缘膜上形成包括透明电极膜的像素电极;半导体膜形成工序,上述半导体膜形成工序在上述像素电极形成工序之后进行,在上述栅极绝缘膜上以一部分覆盖上述像素电极的形式形成半导体膜;退火处理工序,上述退火处理工序在上述半导体膜形成工序之后进行,对上述半导体膜进行退火处理;以及蚀刻工序,上述蚀刻工序在上述退火处理工序之后进行,通过对上述半导体膜进行蚀刻,将与上述栅极电极重叠的沟道部形成在与上述像素电极同一层。
通过将沟道部(半导体膜)和像素电极(透明电极膜)配置在同一层,无需使用接触孔就能够连接沟道部与像素电极,能够削减形成接触孔的工时。在退火处理工序中,通过对半导体膜进行退火处理,能够实现半导体膜的稳定化。在此,在退火处理工序中,像素电极被半导体膜覆盖。从而,能够抑制氧被提供给像素电极的事态,能够抑制像素电极的白浊化、粉化。另外,在退火处理工序中,像素电极与半导体膜一起被加热,仅像素电极结晶化。因此,在蚀刻工序中,能够抑制在对半导体膜进行蚀刻时像素电极被蚀刻的事态。另外,能够在退火处理工序中加热像素电极,因此,无需另外进行用于使像素电极结晶化的加热处理,能够削减工时。由此,在将半导体膜(沟道部)和透明电极膜(像素电极)配置在同一层的情况下,能够抑制对半导体膜和透明电极膜中的一个膜进行的处理给另一个膜带来不良影响的事态。
发明效果
根据本发明,在将半导体膜和透明电极膜配置在同一层的情况下,能够抑制对半导体膜和透明电极膜中的一个膜进行的蚀刻处理、退火处理给另一个膜带来不良影响的事态。
附图说明
图1是以沿着长边方向(Y轴方向)的切断线将本发明的一实施方式的液晶显示装置切断的截面图。
图2是示出阵列基板的截面图。
图3是示出像素电极形成工序的截面图。
图4是示出半导体膜形成工序的截面图。
图5是示出抗蚀剂形成工序的截面图。
图6是示出蚀刻工序的截面图。
附图标记说明
30…阵列基板(显示面板用基板),33…像素电极,34…栅极电极,36…漏极电极,37…沟道部,38…栅极绝缘膜,41…漏极配线,42…半导体膜。
具体实施方式
通过图1至图6来说明本发明的一实施方式。如图1所示,液晶显示装置10具备:液晶面板11(显示面板);驱动器17(面板驱动部),其驱动液晶面板11;控制电路基板12(外部的信号提供源),其向驱动器17提供各种输入信号;柔性基板13(外部连接部件),其将液晶面板11与外部的控制电路基板12电连接;以及背光源装置14(照明装置),其是向液晶面板11提供光的外部光源。如图1所示,背光源装置14具备:底座18,其呈朝向表侧(液晶面板11侧)开口的大致箱形;未图示的光源(例如冷阴极管、LED、有机EL等),其配置在底座18内;以及未图示的光学构件,其以覆盖底座18的开口部的形式配置。光学构件具有将从光源发出的光转换为面状等功能。
另外,如图1所示,液晶显示装置10具备表里一对的外装构件15、16,外装构件15、16用于收纳并保持相互组装后的液晶面板11和背光源装置14,其中,在表侧的外装构件15上形成有开口部19,开口部19用于从外部视觉识别显示于液晶面板11的显示区域A1的图像。本实施方式的液晶显示装置10例如用于便携电话(包含智能手机等)、笔记本电脑(包含平板型笔记本电脑等)、可穿戴终端(包含智能手表等)、便携式信息终端(包含电子书、PDA等)、便携式游戏机、数码相框等各种电子设备(未图示)。
如图1所示,液晶面板11具备:一对基板21、30,其配置成相对状;液晶层23(介质层),其配置在一对基板21、30之间,包含液晶分子,上述液晶分子是光学特性随着电场的施加而发生变化的物质;以及密封构件24,其配置在一对基板21、30之间并且包围液晶层23,从而密封液晶层23。一对基板21、30中的表侧(正面侧、图1的上侧)的基板被设为CF基板21(相对基板),里侧(背面侧)的基板被设为阵列基板30(有源矩阵基板、元件侧基板)。此外,液晶层23中包含的液晶分子例如设为水平取向,但不限于此。另外,在两基板21、30的外面侧分别贴附有未图示的偏振板。
通过在玻璃基板(未图示)的内面侧(液晶层23侧)层叠彩色滤光片、外覆膜、取向膜(均未图示)来构成CF基板21。彩色滤光片具备排列成矩阵状的R(红色)、G(绿色)、B(蓝色)三色的着色部(未图示)。各着色部与阵列基板30的各像素相对配置。
如图2所示,阵列基板30(显示面板用基板)是通过光刻法在玻璃基板31的内面侧层叠形成各种膜而成的。在显示区域A1中,在阵列基板30的内面侧(液晶层23侧、图2的上侧),作为开关元件的TFT32(Thin Film Transistor;薄膜晶体管:显示元件)和像素电极33按矩阵状排列设置有多个。在TFT32和像素电极33的周围,未图示的栅极配线与源极配线以呈格子状的形式配置。
TFT32具有栅极电极34、源极电极35、漏极电极36以及沟道部37。栅极电极34与栅极配线连接,源极电极35与源极配线连接。沟道部37以与栅极电极34重叠的形式配置,栅极绝缘膜38介于沟道部37与栅极电极34之间。沟道部37以将源极电极35与漏极电极36相连的形式配置,像素电极33配置在与沟道部37同一层(栅极绝缘膜38上)。基于分别向栅极配线和源极配线提供的各种信号来驱动TFT32,随着TFT32被驱动,对像素电极33的电位提供受到控制。此外,栅极电极34、源极电极35以及漏极电极36例如由钛(Ti)与铜(Cu)的层叠膜构成,但不限于此。
在阵列基板30中,在像素电极33的表侧设置有共用电极39。层间绝缘膜40介于像素电极33与共用电极39之间。栅极绝缘膜38、层间绝缘膜40例如由二氧化硅(SiO2)与氮化硅(SiNx)的层叠膜构成,但不限于此。另外,在共用电极39,例如形成有多条狭缝(未图示)。当随着像素电极33被充电而在相互重叠的像素电极33与共用电极39之间产生了电位差时,会在共用电极39的狭缝开口缘与像素电极33之间产生除了包含沿着阵列基板30的板面的成分以外还包含相对于阵列基板30的板面的法线方向上的成分的边缘电场(倾斜电场),因此,能够利用该边缘电场来控制液晶层23中包含的液晶分子的取向状态。也就是说,本实施方式的液晶面板11的动作模式被设为FFS(Fringe Field Switching;边缘场开关)模式。
接下来,说明液晶面板11的制造方法。在分别制造出CF基板21和阵列基板30之后将CF基板21与阵列基板30贴合,从而制造出液晶面板11。阵列基板30的制造方法至少具备:栅极用导电膜形成工序,形成栅极电极34和栅极配线;栅极绝缘膜形成工序,形成栅极绝缘膜38;像素电极形成工序,形成像素电极33;沟道部形成工序,形成沟道部37;源极漏极形成工序,形成源极电极35、源极配线、漏极电极36以及漏极配线41;层间绝缘膜形成工序,形成层间绝缘膜40;以及共用电极形成工序,形成共用电极39。
在上述各工序中,利用光刻法分别形成薄膜图案。具体地说,上述各工序具备:成膜工序,形成作为薄膜图案的基础的薄膜;抗蚀剂形成工序,通过对抗蚀剂进行曝光处理和显影处理等,形成与薄膜图案相对应的形状的抗蚀剂图案;以及蚀刻工序,通过进行将抗蚀剂图案作为掩模的蚀刻而形成薄膜图案。此外,在成膜工序中,根据薄膜的种类,适当使用等离子体CVD法、溅射法、真空蒸镀法等。另外,在蚀刻工序中,根据要蚀刻的薄膜的种类,适当使用湿式蚀刻、干式蚀刻。
在本实施方式的阵列基板30中,为了形成栅极、像素电极33、沟道部37、源极和漏极、层间绝缘膜40以及共用电极39的各薄膜图案,分别使用光掩模。另外,本实施方式的阵列基板30不具备平坦化膜,能够相应地削减光掩模的个数。此外,由于不具备平坦化膜,因此,共用电极39与源极(和漏极)的距离变近,寄生电容容易变大。因此,通过将层间绝缘膜40的厚度设为通常的2~3倍(例如400nm~800nm),能够使共用电极39与源极(和漏极)之间的寄生电容变小,能够抑制阴影的产生。
在以下的说明中,主要说明上述各工序中的像素电极形成工序和沟道部形成工序。在像素电极形成工序中,在栅极绝缘膜38上形成透明电极膜之后,在其上层涂敷抗蚀剂(光致抗蚀剂),隔着规定的光掩模对该抗蚀剂进行曝光,然后对曝光后的抗蚀剂进行显影,从而,形成图案化的抗蚀剂图案。然后,将抗蚀剂图案作为掩模,对透明电极膜蚀刻,从而,如图3所示,形成像素电极33。之后,去除像素电极33上的抗蚀剂图案。例如使用ITO(IndiumTin Oxide;铟锡氧化物)作为构成像素电极33的透明电极膜,在这种情况下,作为蚀刻,例如执行使用草酸的湿式蚀刻。
沟道部形成工序具备:半导体膜形成工序、退火处理工序、抗蚀剂形成工序以及蚀刻工序。在半导体膜形成工序中,如图4所示,在栅极绝缘膜38上形成作为沟道部37的基础的半导体膜42。半导体膜42是以其一部分覆盖像素电极33的形式来形成。在退火处理工序中,通过加热来对半导体膜42进行退火处理。退火处理例如是在O2气氛下(干燥空气中)以350℃~450℃的温度执行规定时间(例如20~60分钟)。此外,此处所说的“退火处理”是以迁移率的提高(低电阻化)、特性的稳定化为目的的加热处理。此外,在退火处理工序中,像素电极33在被半导体膜42覆盖的状态下被加热,并结晶化。
在抗蚀剂形成工序中,在半导体膜42的上层涂敷抗蚀剂(光致抗蚀剂),隔着规定的光掩模对该抗蚀剂进行曝光,然后对曝光后的抗蚀剂进行显影,从而,如图5所示,形成图案化的抗蚀剂图案43。然后,在蚀刻工序中,将抗蚀剂图案43作为掩模,对半导体膜42进行蚀刻,从而,如图6所示,在与像素电极33同一层形成沟道部37。然后,去除抗蚀剂图案43。例如使用包含铟(In)、镓(Ga)、锌(Zn)、氧(O)的氧化物半导体(In-Ga-Zn-O系半导体)作为半导体膜42,在这种情况下,作为蚀刻,例如执行使用混合了磷酸、硝酸以及醋酸的被称为PAN系的蚀刻液的湿式蚀刻。
然后,在沟道部形成工序之后执行的源极漏极形成工序(漏极形成工序)中,形成构成源极和漏极的导电膜,将抗蚀剂图案作为掩模,对上述导电膜进行蚀刻,从而,形成源极和漏极的薄膜图案。此外,在源极漏极形成工序中,如图2所示,漏极电极36和漏极配线41(漏极用导电膜)以连接沟道部37与像素电极33的形式配置。另外,在构成源极和漏极的导电膜是钛(Ti)与铜(Cu)的层叠膜的情况下,例如,铜的薄膜图案是通过湿式蚀刻形成的,钛的薄膜图案是通过干式蚀刻形成的。
在此,In-Ga-Zn-O系半导体是In(铟)、Ga(镓)、Zn(锌)的三元系氧化物,并且,In、Ga以及Zn的比例(组成比)没有特别限定,例如包含In:Ga:Zn=2:2:1、In:Ga:Zn=1:1:1、In:Ga:Zn=1:1:2等。在本实施方式中,使用以1:1:1的比例包含In、Ga以及Zn的In-Ga-Zn-O系半导体。这种氧化物半导体(In-Ga-Zn-O系半导体)可以是非晶质的,但优选是包含结晶质部分的、具有结晶性的氧化物半导体。作为具有结晶性的氧化物半导体,例如优选C轴大体垂直于层面进行取向的结晶质In-Ga-Zn-O系半导体。这种氧化物半导体(In-Ga-Zn-O系半导体)的结晶结构例如公开在特开2012-134475号公报中。为了参考,将特开2012-134475号公报的所有公开内容援引至本说明书中。
接下来,对本实施方式的效果进行说明。在本实施方式中,通过将沟道部37(半导体膜)与像素电极33(透明电极膜)配置在同一层,无需使用接触孔就能够连接沟道部37与像素电极33,能够削减形成接触孔的工时。在退火处理工序中,通过对半导体膜42进行退火处理,能够实现半导体膜42的低电阻化。在此,在退火处理工序中,像素电极33被半导体膜42覆盖。从而,能够抑制氧被提供给像素电极33的事态,能够抑制像素电极33的白浊化、粉化。另外,在退火处理工序中,像素电极33是与半导体膜42一起被加热,并结晶化。因此,在蚀刻工序中,能够抑制在对半导体膜42进行蚀刻时像素电极33被蚀刻的事态。另外,在退火处理工序中,能够加热像素电极33,因此,无需另外进行用于使像素电极33结晶化的加热处理,能够削减工时。
另外,构成像素电极33的透明电极膜为ITO,半导体膜42为包含铟(In)、镓(Ga)、锌(Zn)、氧(O)的氧化物半导体。ITO与包含铟(In)、镓(Ga)、锌(Zn)、氧(O)的氧化物半导体彼此的组成是相似的。因此,半导体膜42的蚀刻所使用的蚀刻手段大多是易于蚀刻像素电极33的手段。例如PAN系的蚀刻液具有能蚀刻半导体膜42和像素电极33的性质。在本实施方式中,是在像素电极33结晶化后对半导体膜42进行蚀刻,因此,即使是在像素电极33与半导体膜42的组成相似的情况下,像素电极33也很难受到蚀刻所带来的影响,是优选的。
另外,在退火处理工序中,以350℃~450℃的温度进行退火处理。通过在上述温度范围内进行退火处理,能够进一步促进半导体膜42的稳定化,能够实现TFT32的可靠性的提高(TFT特性的稳定化)。
另外,具备漏极形成工序,上述漏极形成工序在蚀刻工序之后进行,形成将沟道部37与像素电极33连接的漏极电极36和漏极配线41。由于沟道部37与像素电极33配置在同一层,因此,无需使用接触孔就能够连接漏极配线41与像素电极33。
<其它实施方式>
本发明不限于通过上述记述和附图说明的实施方式,例如以下实施方式也包含在本发明的技术范围内。
(1)在上述实施方式中,也可以是共用电极39包括分割开的多个电极,各电极作为触摸传感器发挥功能的构成(内嵌式)。此外,在内嵌式的情况下,能够使用源极和漏极用的导电膜,与源极和漏极同时地形成触摸传感器用的配线,无需增加光掩模的个数就能够形成触摸传感器用的配线。
(2)半导体膜42的材质不限于上述实施方式中例示的材质,能适当进行变更。作为半导体膜42,例如也可以使用非晶硅。然而,具备In-Ga-Zn-O系半导体的TFT与使用非晶硅的TFT相比具有较高的迁移率,因此,能够实现小型化,是优选的。
(3)像素电极33的材质不限于上述实施方式中例示的材质,能适当进行变更。作为像素电极33,例如也可以使用ZnO(Zinc Oxide;氧化锌)。
(4)进行退火处理的各个条件(气氛、温度、时间)不限于上述实施方式中例示的条件,能根据半导体膜42的材质适当进行变更。
(5)在上述实施方式中,也可以在层间绝缘膜40上还设置别的层间绝缘膜。由此,能够调整共用电极39与源极(和漏极)之间的寄生电容。
Claims (4)
1.一种显示面板用基板的制造方法,其特征在于,具备:
像素电极形成工序,在覆盖栅极电极的栅极绝缘膜上形成包括透明电极膜的像素电极;
半导体膜形成工序,上述半导体膜形成工序在上述像素电极形成工序之后进行,在上述栅极绝缘膜上以一部分覆盖上述像素电极的形式形成半导体膜;
退火处理工序,上述退火处理工序在上述半导体膜形成工序之后进行,对上述半导体膜进行退火处理;以及
蚀刻工序,上述蚀刻工序在上述退火处理工序之后进行,通过对上述半导体膜进行蚀刻,将与上述栅极电极重叠的沟道部形成在与上述像素电极同一层。
2.根据权利要求1所述的显示面板用基板的制造方法,
上述透明电极膜是ITO,
上述半导体膜是包含铟(In)、镓(Ga)、锌(Zn)、氧(O)的氧化物半导体。
3.根据权利要求2所述的显示面板用基板的制造方法,
在上述退火处理工序中,以350℃~450℃的温度进行上述退火处理。
4.根据权利要求1至权利要求3中的任意一项所述的显示面板用基板的制造方法,
具备漏极形成工序,上述漏极形成工序在上述蚀刻工序之后进行,形成将上述沟道部与上述像素电极连接的漏极电极和漏极配线。
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