CN108735687A - 用于高数据速率的硅光子ic的集成 - Google Patents

用于高数据速率的硅光子ic的集成 Download PDF

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Publication number
CN108735687A
CN108735687A CN201810213052.5A CN201810213052A CN108735687A CN 108735687 A CN108735687 A CN 108735687A CN 201810213052 A CN201810213052 A CN 201810213052A CN 108735687 A CN108735687 A CN 108735687A
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China
Prior art keywords
pcb
pic
driver
interpolater
convex block
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CN201810213052.5A
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English (en)
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刘红
浦田良平
权云成
特克久·康
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Google LLC
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Google LLC
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Publication of CN108735687A publication Critical patent/CN108735687A/zh
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    • HELECTRICITY
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/4201Packages, e.g. shape, construction, internal or external details
    • G02B6/4219Mechanical fixtures for holding or positioning the elements relative to each other in the couplings; Alignment methods for the elements, e.g. measuring or observing methods especially used therefor
    • G02B6/4228Passive alignment, i.e. without a detection of the degree of coupling or the position of the elements
    • G02B6/4232Passive alignment, i.e. without a detection of the degree of coupling or the position of the elements using the surface tension of fluid solder to align the elements, e.g. solder bump techniques
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/4201Packages, e.g. shape, construction, internal or external details
    • G02B6/4219Mechanical fixtures for holding or positioning the elements relative to each other in the couplings; Alignment methods for the elements, e.g. measuring or observing methods especially used therefor
    • G02B6/4236Fixing or mounting methods of the aligned elements
    • G02B6/4245Mounting of the opto-electronic elements
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/4201Packages, e.g. shape, construction, internal or external details
    • G02B6/4274Electrical aspects
    • G02B6/4279Radio frequency signal propagation aspects of the electrical connection, high frequency adaptations
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
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    • G02B6/4274Electrical aspects
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Abstract

本申请涉及用于高数据速率的硅光子IC的集成。高速应用中的信号完整性是取决于基础设备性能和电子封装方法的。使用导线接合的成熟的板上芯片封装(COB)封装技术使其成为高速光学收发器的大规模生产的成本的有利选项。然而,导线接合引入了与接合导线的长度相关的寄生电感,该寄生电感限制用于更高的数据吞吐量系统的可扩展性。根据第一建议的配置的高速光学收发器封装通过使用倒装芯片接合使组件垂直地集成来使封装相关的寄生电感最小化。根据所第二种提出的配置的高速光学收发器封装使用芯片载体和倒装芯片接合利用组件的水平平铺来最小化封装相关的寄生电感。

Description

用于高数据速率的硅光子IC的集成
技术领域
本申请涉及用于高数据速率的硅光子IC的集成。
背景技术
高速应用中的信号完整性是取决于基础设备性能和电子封装方法的。对于高速光收发器来说,最小化由于封装造成的射频(RF)损耗是有价值的。使用导线接合的成熟的板上芯片封装(COB)封装技术使其成为高速光学收发器的大批量生产成本的有利选项。然而,导线接合引入了与接合导线的长度相关联的寄生电感,该寄生电感限制用于更高数据吞吐量的系统的可扩展性。
发明内容
根据一个方面,在本公开中描述的主题涉及一种集成组件封装,其包括印刷电路板(PCB)、光子集成电路(PIC),该PIC在该PIC的第一侧上被机械地耦合到该PCB;以及驱动器集成电路(驱动器IC),其具有第一侧。该驱动器IC的第一侧经由第一组凸块接合连接件直接机械和电气地耦合到该PIC的第二侧。该驱动器IC的第一侧还经由第二组凸块接合连接件被电气地耦合到该PCB。
根据另一方面,在本公开中描述的主题涉及一种集成组件封装,其包括印刷电路板(PCB),该PCB具有被尺寸定制以收纳光纤的、在该PCB的第一侧中的PCB腔体;多个BGA连接件,所述多个BGA连接件在该PCB的第一侧上被机械和电气地耦合到该PCB;以及载体,该载体经由所述BGA连接件中的至少一个在该载体的第一侧上被直接机械耦合到该PCB。该载体包括在该载体的第一侧上设置的再分布层(RDL)并且包括多个RDL互连件。该集成组件封装还包括机械耦合到该载体的光子集成电路(PIC)和机械耦合到该载体的驱动器IC。该驱动器IC的第一侧经由所述RDL互连件中的至少一个和所述BGA连接件中的至少一个被电气地耦合到该PCB的第一侧。该驱动器IC的第一侧还经由所述RDL互连件中的至少一个被电气地耦合到该PIC的第一侧。
根据另一方面,在本公开中描述的主题涉及一种组装集成组件封装的方法,包括在光子集成电路(PIC)的第一侧上将该PIC机械地耦合到印刷电路板(PCB);经由第一组凸块接合连接件将驱动器IC的第一侧直接机械和电气地耦合到该PIC的第二侧;以及经由第二组凸块接合连接件将驱动器IC的第一侧电气地耦合到该PCB。
根据另一方面,在本公开中描述的主题涉及一种组装集成组件封装的方法,其包括在印刷电路板(PCB)的第一侧上将多个BGA连接件机械地和电气地耦合到该PCB。该PCB具有被尺寸定制以收纳光纤的PCB腔体。该方法包括经由所述BGA连接件中的至少一个在载体的第一侧上将该载体机械地耦合到该PCB。该载体包括在该载体的第一侧上设置的再分布层(RDL)并且包括多个RDL互连件。该方法还包括将光子集成电路(PIC)机械地耦合到该载体并且将驱动器IC机械地耦合到该载体。该方法进一步包括经由所述RDL互连件中的至少一个和所述BGA连接件中的至少一个将驱动器IC的第一侧电气地耦合到该PCB的第一侧;和经由所述RDL互连件中的至少一个将驱动器IC的第一侧电气地耦合到该PIC的第一侧。
附图说明
如附图中所图示的是,根据本发明的示例实施方式的下述更加具体的描述,前述将会变得显而易见。附图不一定按比例绘制,而是将重点放在图示本发明的实施方式上。
图1A是根据示例实施方式的第一集成组件封装配置的俯视图的图。
图1B是图1A中示出的第一集成组件封装配置的侧视图的图。
图2A是根据示例实施方式的第二集成组件封装配置的俯视图的图。
图2B是图2A中示出的第二集成组件封装配置的侧视图的图。
图3A是根据示例实施方式的第三集成封装配置的侧视图的图。
图3B是根据示例实施方式的第四集成组件封装的侧视图的图。
图4A是根据示例实施方式的第五集成组件封装配置的侧视图的图。
图4B是根据示例实施方式的第六集成组件封装配置的侧视图的图。
图5是用于组装图1A至图2B中示出的集成组件封装的方法的流程图。
图6是用于组装图3A至图4B中示出的集成组件封装的方法的流程图。
为了清楚起见,并非每个组件都可以在每个附图中被标注。该附图不旨在按比例绘制。各种附图中的相似参考数字和标记指示相似的元件。
具体实施方式
高速应用中的信号完整性是取决于基础设备性能和电子封装方法两者的。对于高速光收发器,最小化由于封装造成的射频(RF)损耗是有价值的。使用导线接合的板上芯片(COB)封装技术的成熟使其成为高速光学收发器的大批量生产的成本有利选项。然而,导线接合引入与接合线的长度相关联的寄生电感,其限制用于更高的数据吞吐量的系统的可扩展性。随着高速光收发器的板载(on-board)数据速率增加超过25Gbps/通道,由于导线接合引起的电气问题成为瓶颈。
根据本公开的集成组件封装能够被用于高速光收发器的光电封装集成。典型地,高速光学收发器的集成组件封装包括电气地耦合到光子集成电路(PIC)和印刷电路板(PCB)两者的驱动器集成电路(驱动器IC)。在一些常规封装配置中,驱动器IC经由导线接合与PIC和PCB互连。在其他常规封装配置中,驱动器IC可以经由凸块接合被互连到PIC,并且通过PIC经由导线接合被互连到PCB。然而,这些配置都受到与接合线的长度相关联的寄生电感的电气限制。可替选地,驱动器IC可以经由凸块接合被互连到PIC,并且通过PIC被互连到PCB。通过PIC将驱动器IC与PCB互连可以使用集成到PIC中的直接硅通孔(TSV)。但是,这种配置的局限性包括与通过TSV管芯叠置引入的寄生电感一起通过PIC来集成TSV的复杂性。
本公开的某些高速光学收发器封装和封装组装方法通过利用叠置的组件和倒装芯片接合减少封装相关的寄生电感。本公开的其他高速光学收发器封装和封装组装方法利用垂直叠置和水平平铺组件的组合减少封装相关的寄生电感。在此公开的集成组件封装至少包括诸如与印刷电路板(PCB)上的光子集成电路(PIC)集成的驱动器芯片或驱动器IC的电子集成电路(EIC)。集成的封装还包括各种组件之间的电气和物理连接。驱动器IC被电连接到PIC和PCB两者。在一些实施方式中,PIC可以被物理连接到PCB。
图1A是根据示例实施方式的第一集成组件封装配置100的俯视图的图。图1B是图1A中示出的第一集成组件封装结构100的侧视图。第一集成组件封装配置100包括印刷电路板(PCB)105、光子学IC(PIC)115、诸如驱动器IC 110的电子IC(EIC)、和内插器130。PCB 105具有组件位于其上的顶侧(还被称为PCB 105的第一侧或组件侧)。PCB 105还具有底侧或第二侧。PIC 115、驱动器IC 110和内插器130各自还具有第一侧和第二侧。驱动器IC 110被直接地电连接到PIC115,并且经由内插器130间接地电连接到PCB 105两者。
PIC 115位于PCB 105的顶侧或组件侧上。PIC 115的第一侧被物理地连接到PCB105的顶侧的表面。在一些实施方式中,PIC 115的第一侧是安装到PCB 105的顶侧上的表面。在一些实施方式中,PIC 115可以是将多个光子功能并入到单个设备中的外部调制激光器(EML)、单块可调谐激光器、宽泛可调激光器或其他光学发射器。
驱动器IC 110被垂直地叠置在PIC 115的第二侧上,使得驱动器IC 110的部分重叠PIC 115的第二侧,同时驱动器IC 110的部分重叠内插器130。
如在上面所提及的是,驱动器IC 110被电气地连接到PIC 115和PCB 105两者。驱动器IC 110的重叠PIC 115的第二侧的部分利用一个或多个凸块接合件150(BB)直接倒装芯片连接到PIC 115的第二侧。BB 150提供驱动器IC 110与PIC 115之间的电气接口。BB150还提供驱动器IC 110与PIC 115的第二侧之间的物理或机械接口。除了被电气地连接到PIC 115之外,驱动器IC 110还被电气地连接到PCB 105。驱动器IC 110经由内插器130被物理地连接到PCB 105。驱动器IC 110的部分利用一个或多个凸块接合件(BB)140被直接倒装芯片连接至内插器130的第一侧。内插器130的第二侧经由一个或多个其他凸块接合件(BB)145被物理和电气地连接至PCB 105的顶侧的表面。内插器130与BB 140和BB 145一起提供驱动器IC 110和PCB 105之间的电气和机械接口。
在一些实施方式中,内插器130可以包括多层基板,该多层基板还包括导体和电介质的交替层。在一些实施方式中,内插器130可以包括玻璃。在一些实施方式中,内插器130可以进一步包括一个或多个镀通孔(PTH)160,并且驱动IC 110和PCB 105之间的、经由内插器130的电气连接可以包括PTH 160中的一个或多个。一些实施方式中,内插器130可以包括硅,并且一个或多个PTH 160可以是直接硅通孔(TSV)。如图1A和1B中示出,驱动器IC 110与PIC 115和PCB105的倒装芯片垂直集成减少这些组件之间的互连的长度,从而降低封装相关的寄生电感。
图2A是根据示例实施方式的第二集成组件封装配置200的俯视图的图。图2B是图2A中示出的第二集成组件封装配置200的侧视图。第二集成组件封装配置200包括印刷电路板(PCB)205、光子学IC(PIC)215和诸如驱动器IC 210的电子IC(EIC)。PCB 105具有组件被位于其上的顶侧(还被称为PCB 205的第一侧或组件侧)。PCB 205还具有底侧或第二侧。PIC215具有第一侧和第二侧。驱动器IC 210还具有第一侧和第二侧。驱动器IC 210被电气地连接到PIC 215和PCB 205两者。
PCB 205的顶侧包括诸如腔体225的凹槽或腔。PIC 215位于腔体225内。PIC 215的第一侧被物理地连接到腔体225内的PCB 205。在一些实施方式中,PIC 215的第一侧可以被表面安装到腔体225的底板上。如图2B中示出,当PIC 215位于腔体225内并且PIC 255的第一侧被物理地连接到腔体225的底板时,PIC 215的第二侧与PCB 205的顶侧对准。通过变化在将PIC 215安装到腔体225的底板的表面中使用的底部填充剂的高度或者腔体的高度来实现对准。如图1A和1B中示出,在一些实施方式中,PIC 215可以是将多个光子功能并入到单个设备中的外部调制激光器(EML)、单片可调激光器、宽泛可调激光器或其他光学发射器。
驱动器IC 210被垂直地叠置在PIC 215的第二侧上,使得驱动器IC 210的部分重叠PIC 215的第二侧,同时驱动器IC 210的部分重叠PCB 205的顶侧。
如在上面所提及的是,驱动器IC 210被电气地连接到PIC 215和PCB 205两者。驱动器IC 210的重叠PIC 215的第二侧的部分利用一个或多个凸块接合件(BB)250被直接倒装芯片连接到PIC 215的第二侧。BB 250提供驱动器IC 210和PIC 215之间的电气接口。BB250还提供驱动器IC 210与PIC 215的第二侧之间的物理或机械接口。
如在上面所提及的,除了被电气地连接到PIC 215之外,驱动器IC 210还被电气地连接到PCB 205。驱动器IC 210的重叠PCB 205的部分利用一个或多个凸块接合件(BB)240被直接倒装芯片连接到PCB105的组件侧的表面。BB 240提供驱动器IC 210和PCB 205之间的电气接口。BB 240还提供在驱动器IC 210和PCB 205的组件侧之间的物理或者机械接口。
通过将驱动器IC 210直接倒装芯片连接到PCB 205和PIC 215二者,即,在没有使用驱动器IC 210和PCB 205之间的内插器的情况下,在图2A和图2B中示出的第二集成组件封装200可以进一步减小封装相关的寄生电感。
图3A是根据示例实施方式的第三集成组件封装配置300a的侧视图的图。集成组件封装配置300a包括PCB 305a、诸如驱动器IC 310的电子IC(EIC)、光子学IC(PIC)315和诸如载体365的芯片载体。PCB 305a具有组件位于其上的顶侧(还被称为PCB 305的第一侧或组件侧)。PCB 305a还具有底侧或第二侧。PIC 315具有第一侧和第二侧。驱动器IC 310还具有第一侧和第二侧。驱动器IC 310被电气地连接到PIC 315和PCB 305a两者。封装配置300还包括多个球栅阵列(BGA)连接件,诸如BGA连接件335。BGA连接件335被物理地连接到PCB305a的顶侧。载体365具有第一侧和第二侧。载体365包括被在载体365的第一侧的部分上设置的再分布层(RDL)380。
如图3A中示出,封装配置300a包括垂直叠置和水平平铺组件的组合。载体365被连接到PCB 305a,使得载体365的第一侧与PCB 305a的顶侧相对。载体365经由BGA连接件335中的一个或多个被物理地和电气地连接到PCB 305a。
驱动器IC 310和PIC 315相对于彼此被水平地平铺并且被物理地连接到载体365的第一侧。因此,驱动器IC 310和PIC 315位于载体365的第一侧和PCB 305a的顶侧之间。驱动器310和PIC 315被物理地连接以与载体365的第一侧的不同部分上彼此相邻。在一些实施方式中,驱动器IC 310和PIC 315根据驱动器IC 310和PIC 315的管芯间距要求在载体365上被水平地隔开。驱动器IC 310的第一侧被物理连接到载体365的包括RDL 380的部分。驱动器IC 110的第一侧利用一个或多个凸块接合件(BB)340被直接倒装芯片连接到RDL380。BB 340提供驱动器IC 310与载体365之间的机械接口。PIC 315的第一侧还利用一个或多个凸块接合件(BB)350被直接倒装芯片连接到RDL 380。BB 150提供PIC 315的第一侧和载体365的第一侧之间的机械接口。
驱动器IC 310被电气地连接到PIC 315和PCB 305a两者。驱动器IC 310经由BB340、一个或多个RDL互连件360和BB 350被电气地连接到PIC 315。驱动器IC 310经由一个或多个RDL互连件360和BGA连接件335中的一个或多个被电气地连接到PCB 305。
如图3A中示出,位于与PIC 315相邻并且由载体365的第一侧和PCB 305a的顶侧限定的空间327无法被尺寸定制(sized)以收纳光纤320,从而防止光纤320和PIC 315之间的、在空间327内的直接光学耦合。因此,在图3A中,光纤320位于载体365的第二侧上方并且通过载体365与PIC 315光学地耦合。在一些实施方式中,载体365可以由诸如玻璃的透明材料构成,由此启用经由载体365的光纤320和PIC315之间光学耦合。
图3B是根据示例实施方式的第四集成组件封装配置300b的侧视图的图。第四集成封装配置300b与第三集成组件封装配置300a相类似。集成组件封装配置300b包括PCB305b、诸如驱动器IC 310的电子IC(EIC)、光子IC(PIC)315、和诸如载体365的芯片载体。PCB305b具有组件位于其上的顶侧(还被称为PCB 305的第一侧或组件侧)。PCB 305b还具有底侧或第二侧。PIC 315具有第一侧和第二侧。驱动器IC 310还具有第一侧和第二侧。驱动器IC 310被电气地连接到PIC 315和PCB 305b两者。封装配置300还包括多个球栅阵列(BGA)连接件,诸如BGA连接件335。BGA连接件335被物理地连接到PCB305a的顶侧。载体365具有第一侧和第二侧。载体365包括在载体365的第一侧的部分上设置的再分布层(RDL)380。
如图3B中示出,封装配置300b包括垂直叠置和水平平铺组件的组合。载体365被连接到PCB 305b,使得载体365的第一侧与PCB 305b的顶侧相对。载体365经由BGA连接件335中一个或多个被物理和电气地连接到PCB 305b。
驱动器IC 310和PIC 315相对于彼此水平平铺并且被物理连接到载体365的第一侧。因此,驱动器IC 310和PIC 315位于载体的第一侧365和PCB 305b的顶侧之间。驱动器310和PIC 315被物理地连接以在载体365的第一侧的不同部分上彼此相邻。在一些实施方式中,驱动器IC 310和PIC 315根据驱动器IC 310和PIC 315的管芯间距要求在载体365上被水平地隔开。驱动器IC 310的第一侧被物理地连接到载体365的包括RDL 380的部分。驱动器IC 110的第一侧利用一个或多个凸块接合件(BB)340被直接地倒装芯片连接到驱动器IC 310与载体365之间的机械接口。PIC 315的第一侧还利用一个或多个凸块接合件(BB)350直接倒装芯片连接到RDL 380。BB 150提供PIC 315的第一侧和载体365的第一侧之间的机械接口。
驱动器IC 310被电气地连接到PIC 315和PCB 305a两者。驱动器IC310经由BB340、一个或多个RDL互连件360和BB 350被电气地连接到PIC 315。驱动器IC 310经由一个或多个RDL互连件360和一个或多个BGA连接件335被电气地连接到PCB 305。
在一些实施方式中,光纤320与PIC 315直接地光学耦合。在一些实施方式中,PCB305a的顶侧可以进一步包括PCB腔体325,该PCB腔体325位于与PIC 315相邻并且与载体365的第一侧相对。在一些实施方式中,PCB腔体325可以限定与载体365的第一侧和PCB腔体325之间的PIC 315相邻的光纤腔体326。在一些实施方式中,光纤腔体326被尺寸定制以收纳光纤腔320。光纤腔体启用PIC 315和光纤320之间的、光纤腔体内的直接光学耦合,从而减小集成组件封装结构300b的整体高度或形状因子(form factor)。
在没有对于实现PCB的部分或组件之间的垂直对准的要求的情况下,集成组件封装配置300a和300b在PIC 315和驱动器IC 310之间提供直接的电气连接,从而促进封装的制造,同时仍然避免这些组件之间的导线接合,从而相对于传统封装减小封装的感应负载。
图4A是根据示例实施方式的第五集成组件封装配置400a的侧视图的图。集成组件封装配置400包括PCB 405a、诸如驱动器IC 410的电子IC(EIC)、光子IC(PIC)415和诸如载体465的芯片载体。PCB405a具有组件位于其上的顶侧(还被称为PCB 405的第一侧或组件侧)。PCB 405a还具有底侧或第二侧。PIC 415具有第一侧和第二侧。驱动器IC 410还具有第一侧和第二侧。驱动器IC 410被电气地连接到PIC 415和PCB 405两者。封装配置400还包括多个球栅阵列(BGA)连接件,诸如BGA连接件435。BGA连接件435被物理和电气地连接到PCB405的顶侧。载体465具有第一侧和第二侧。载体465包括在载体465的第一侧的部分上设置的再分布层(RDL)480。在一些实施方式中,可以使用封装上封装(package on package)(PoP)技术和封装格式,诸如扇出型晶片级封装(FO-WLP)、嵌入式管芯层压或模块化嵌入式管芯,集成载体465、驱动器IC 140和PIC 415。在一些实施方式中,载体465能够由包覆驱动器IC 410管芯和PIC 415管芯的模制化合物形成。
驱动器IC 410和PIC 415相对于彼此水平平铺并且被嵌入在载体465内。驱动器IC410的第一侧被物理地连接到载体465的第一侧的设置有RDL 480的部分。驱动器IC 410的第一侧被直接连接到RDL480。PIC 415的第一侧还也被直接地连接到RDL 380。
驱动器IC 410被电气地连接到PIC 415和PCB 405。驱动器410经由RDL互连件460中的一个或多个被电气地连接到PIC 415。驱动器IC 410经由RDL互连件460中的一个或多个、一个或多个模具通孔(TMV)470和BGA连接件435被电气地连接到PCB 405。位于载体465的第二侧上方的光纤420可以直接与PIC 415光学耦合。
图4B是第六集成组件封装配置400b的图。第六集成封装配置400b与第五集成组件封装配置400a相类似。与第五集成封装配置400a不同,第六集成封装配置400b包括PCB405b,该PCB 405b包括PCB腔体425。PCB腔体425限定载体465的第一侧和PCB腔体425之间的光纤腔体427。光纤腔体427被尺寸定制以收纳光纤420。在一些实施方式中,当载体465被垂直叠置到PCB 405b上时,光纤腔体427可以位于与PIC 415相邻。在一些实施方式中,PIC415的第一侧的第一部分可以与PCB腔体425重叠,并且PIC 415的第一侧的第二部分可以与PCB 405b的顶表面重叠。在一些实施方式中,RDL 480可以跨重叠PCB 405b的顶部分的PIC415的第一侧的第二部分被设置。如图4B中示出,光纤腔体427启用光纤腔体420和PIC 415之间的、光纤腔体427内的直接光学耦合,从而减少集成组件封装配置400b的整体高度和形状因数。
如在上面所提及的,图1A-3B中示出的集成封装配置100、200、300a和300b可以包括使用一个或多个凸块接合件,诸如凸块接合件(BB)140、145、150、240、250、340和350的组件之间的倒装芯片连接。在一些实施方式中,可以使用焊料形成凸块接合件。在一些实施方式中,在诸如没有限制铜、锡、或者金、其合金的除了焊料之外的材料,或者对本领域的普通技术人员已知的在形成凸块接合件中有用的其它导电材料或者复合材料,能够形成凸块接合件。
图5是当在执行时能够导致图1A至图2B中示出的封装的方法500的流程图。方法500包括垂直地集成PCB、PIC和驱动器IC。方法500包括将光电子集成电路(PIC)的第一侧上的PIC机械耦合到印制电路板(PCB)(阶段505);经由第一组凸块接合连接件将驱动器IC的第一侧直接机械和电气地耦合到PIC的第二侧(阶段510)以及经由第二组凸块结合连接件将驱动器IC的第一侧电气地耦合到PCB(阶段515)。
当执行时方法500的示例实施方式导致具有图1A和1B中示出的第一封装配置100的封装。如在上面所提及的是,方法500包括将光子集成电路(PIC)115机械地耦合到PIC115的第一侧上的印制电路板(PCB)105(阶段505)。方法500进一步包括经由诸如BB 150的第一组凸块接合连接件将驱动器IC 110的第一侧机械地和电气地耦合到PIC 115的第二侧(阶段510)。方法500进一步包括经由诸如BB 140的第二组凸块接合连接件将驱动器IC 110的第一侧电气地耦合到PCB105(阶段515)。在一些实施方式中,方法500的阶段515可以进一步包括经由诸如BB的145的第三组凸块接合连接件将内插器130的第一侧机械地耦合到PCB105。在一些实施方式中,方法500的阶段515还可以包括经由第二组凸块接合连接件BB 140将内插器130的第二侧机械地耦合到驱动器IC 110的第一侧。在一些实施方式中,方法500的阶段515可以包括经由第二组凸块接合连接件BB 140、内插器130和第三组凸块接合连接件BB 145将驱动器IC 110的第一侧电气地耦合到PCB 105。
当执行时的方法500的示例实施方式导致具有图2A和2B中示出的第二封装配置200的封装。方法500包括将光子集成电路(PIC)215机械地耦合到PIC 215的第一侧上的印刷电路板(PCB)205(阶段505)。在一些实施方式中,方法500的阶段505可以包括将PCB腔体225内的PIC 215放置在PCB 205的第一侧中并且将PIC 215表面接合到PCB腔体225的底板,使得PIC 215的第一侧面向PCB腔体225的底板。方法500还包括经由诸如BB 250的第一组凸块接合连接件将驱动器IC210的第一侧直接机械和电气地耦合到PIC 215的第二侧(阶段510)。方法500进一步包括经由诸如BB 240的第二组凸块接合连接件将驱动器IC 210的第一侧电气地耦合到PCB 205(阶段515)。在一些实施方式中,方法500的阶段515可以进一步包括经由诸如BB 240的第二组凸块接合连接件、内插器230和诸如BB 245的第三组凸块接合连接件将驱动器IC 215的第一侧电气地耦合到PCB 205。
图6是方法600的流程图,当执行时方法600能够导致图3B和4B中示出的第四和第六封装配置300b和400b。方法600包括相对于彼此水平地平铺的PIC和驱动器IC并且将PIC和驱动器IC与PCB垂直地集成。方法600包括将多个BGA连接件机械和电气地耦合到PCB的第一侧上的印刷电路板(PCB)(阶段605)。PCB具有被尺寸定制以收纳光纤的PCB腔体。方法600进一步包括经由至少一个BGA连接件将载体机械地耦合到载体的第一侧上的PCB,该载体包括在载体的第一侧上设置的再分布层(RDL)并且包括多个RDL互连件(阶段610)。方法600还包括将光子集成电路(PIC)机械地耦合到载体(阶段615)并且将驱动器IC机械耦合到载体(阶段620)。方法600进一步包括经由RDL连接件中的至少一个和BGA连接件中的至少一个将驱动器IC的第一侧电气地耦合到PCB的第一侧(阶段625)。方法600包括经由RDL互连件中的至少一个将驱动器IC的第一侧电气地耦合到PIC的第一侧(阶段630)。
当执行时的方法600的示例实施方式导致具有图3B中示出的第四封装配置300b的封装。方法600包括将诸如BGA连接件335的多个BGA连接件机械地和电耦合到PCB 305b的第一侧上的印刷电路板(PCB)305b。具有PCB腔体325的PCB 305b被尺寸定制以收纳光纤320(阶段605)。方法600包括经由BGA 335中的至少一个将载体365机械地耦合到载体365的第一侧上的PCB 305b,该载波365包括在载体365的第一侧上设置的再分布层(RDL)380并且包括多个RDL互连件360(阶段610)。方法600还包括将光子集成电路(PIC)315机械地耦合到载体365(阶段615)并且将驱动器IC 310机械地耦合到载体365(阶段620)。在一些实施方式中,方法600的阶段620还可以包括将光子集成电路(PIC)315位于RDL 380的第二侧和PCB305b的第一侧之间,并且经由诸如BB 350的至少一个第一凸块接合连接件将PIC 315的第一侧机械地耦合到RDL 380的第二侧。该方法包括经由RDL互连件360中的至少一个和BGA335中的至少一个将驱动器IC310的第一侧电气地耦合到PCB 305b的第一侧(阶段625)。在一些实施方式中,方法600的阶段625可以包括将驱动器IC 310位于RDL380的第二侧和PCB305b的第一侧之间。方法600还包括经由RDL互连件360中的至少一个将驱动器IC 310的第一侧电气地耦合到PIC 315的第一侧(阶段630)。在一些实施方式中,方法600的阶段630还可以包括经由诸如BB 340的多个第二凸块接合连接件将驱动器IC 365的第一侧机械地和电气地耦合到RDL 380的第二侧。在一些实施方式中,方法600的阶段630可以包括经由诸如BB 340的第一凸块接合连接件中的至少一个、RDL互连件360中的至少一个以及诸如BB 350的第二凸块接合连接件中的至少一个将驱动器IC 310的第一侧电气地耦合到PIC 315的第一侧。
在一些实施方式中,当执行时的方法600导致具有图4B中示出的第六封装配置的封装。方法600包括将诸如BGA连接件435的多个BGA连接件机械地和电气地耦合到PCB 405b的第一侧上的印刷电路板(PCB)405b,该PCB 405b具有PCB腔体425,其被尺寸定制以收纳光纤420(阶段605)。方法600包括经由至少一个BGA连接件435将载体465机械地耦合到载体465的第一侧上的PCB 405b,该载体465包括在载体465的第一侧上设置的再分布层(RDL)480并且包括多个RDL互连件460(阶段610)。方法600还包括将光子集成电路(PIC)415机械地耦合到载体465(阶段615)并且将驱动器IC 410机械地耦合到载体465(阶段620)。在一些实施方式中,方法600的阶段620可以进一步包括将光子集成电路(PIC)415位于载体465内并且将驱动器IC 410位于载体465内。在一些实施方式中,方法600的阶段620可以进一步包括将PIC 415位于PCB 415的第一侧中的PCB腔体425中,使得PIC 415的第一侧的第一部分重叠PCB腔体425,并且PIC 415的第一侧的第二部分重叠PCB 405b的第一侧。RDL 480跨PIC415的第一侧和驱动器IC 410的第一侧进行设置。该方法包括经由RDL互连件460中的至少一个和至少一个BGA连接件435将驱动器IC 410的第一侧电气地耦合到PCB 405b的第一侧(阶段625)。方法600还包括经由RDL互连件460中的至少一个将驱动器IC 410的第一侧电气地耦合到PIC 415的第一侧(阶段630)。在一些实施方式中,RDL 480可以跨PIC 415的第一侧的重叠PCB 405b的第二部分被设置。
如在上面所提及的,方法500和600可以包括通过倒装芯片连接组件与一个或多个凸块接合件在组件之间建立电气连接和/或机械连接。在一些实施方式中,可以使用焊料形成凸块接合件。在一些实施方式,能够使用诸如没有限制铜、锡、或者金、其合金的除了焊料之外的材料或者其它导电材料或者对本领域普通技术人员已知的在形成凸块接合件中有用的其它导电材料或复合材料来形成凸块接合件。
尽管本说明书包含许多具体的实现细节,但是这些不应当被解释为对任何发明或可以要求的范围的限制,而是作为特定于特定发明的特定实施方式的特征的描述。在单独实施方式的上下文中在本说明书中描述的某些特征还能够在单个实施方式中被组合实现。相反,在单个实现方式的上下文中描述的各种特征还能够在多个实现方式中单独地或以任何合适的子组合来实现。此外,尽管在上面可以将特征描述为在某些组合中起作用并且甚至最初如此要求,但是来自被要求的组合的一个或多个特征可以在某些情况下从该组合中删除,并且所要求的组合可以针对子组合或子组合的变化。
类似地,尽管在附图中以特定顺序描述操作,但是这不应当被理解为要求以所示出的特定顺序或按顺序执行这样的操作,或者要执行所有被图示的操作,以实现期望的结果。在某些情况下,多任务和并行处理可能是有利的。此外,在上面描述的实现方式中的各种系统组件的分离不应当被理解为在所有实现方式中都需要这种分离,并且应当理解的是,所描述的程序组件和系统通常能够一起被集成在单个软件产品中或者被封装成多个软件产品。
对“或”的引用可以被解释为包含性的,使得使用“或”描述的任何术语可以指示任何单个、多于一个和全部所描述的术语。标签“第一”、“第二”、“第三”等等不一定意旨指示排序并且通常仅用于在相同或相似的项目或要素之间进行区分。
对于本领域技术人员来说,对本公开中所描述的实施方式的各种修改可能是显而易见的,并且在不脱离本公开的精神或范围的情况下,可以将在此定义的一般原理应用于其他实施方式。因此,权利要求旨在不限于在此所示的实施方式,而是旨在被赋予与本公开一致的最宽范围、在此公开的原理和新颖特征。

Claims (20)

1.一种集成组件封装,包括:
印刷电路板(PCB);
光子集成电路(PIC),所述PIC在所述PIC的第一侧上被机械地耦合到所述PCB;
驱动器集成电路(驱动器IC),所述驱动器IC具有第一侧,其中,所述驱动器IC的第一侧是
(i)经由第一组凸块接合连接件直接机械和电气地耦合到所述PIC的第二侧,
(ii)经由第二组凸块接合连接件被电气地耦合到所述PCB。
2.根据权利要求1所述的集成组件封装,还包括PCB腔体,所述PCB腔体在所述PCB的第一侧中,其中,所述PIC在所述PCB腔体内并且所述PIC的第一侧面对所述PCB腔体的底板。
3.根据权利要求2所述的集成组件封装,其中,所述驱动器IC的第一侧经由所述第二组凸块接合连接件被机械地直接耦合到所述PCB。
4.根据权利要求1所述的集成组件封装,还包括具有第一侧和第二侧的内插器,其中:
所述内插器的第一侧经由第三组凸块接合连接件被机械地耦合到所述PCB,
所述内插器的第二侧经由所述第二组凸块接合连接件被机械地耦合到所述驱动器IC的第一侧,以及
所述驱动器IC的第一侧经由所述第二组凸块接合连接件、所述内插器和所述第三组凸块接合连接件被电气地耦合到所述PCB。
5.根据权利要求4所述的集成组件封装,其中,所述内插器包括多层基板,所述多层基板包括导体和电介质的交替层。
6.根据权利要求4所述的集成组件封装,其中,所述内插器包括一个或多个镀通孔(PTH)。
7.根据权利要求6所述的集成组件封装,其中,所述驱动器IC的第一侧到所述PCB的经由所述内插器的电气耦合包括至少一个PTH。
8.根据权利要求4所述的集成组件封装,其中,所述内插器包括玻璃。
9.根据权利要求6所述的集成组件封装,其中,所述内插器包括硅并且所述一个或多个镀通孔是直接硅通孔(TSV)。
10.根据权利要求1所述的集成组件封装,其中,所述PIC被安装到所述PCB上的表面。
11.根据权利要求1所述的集成组件封装,其中,所述PIC被倒装芯片结合到所述PIC的第二侧,并且所述第一组凸块接合连接件包括一个或多个凸块接合件(BB)。
12.一种组装集成组件封装的方法,所述方法包括:
在光子集成电路(PIC)的第一侧上将所述PIC机械地耦合到印刷电路板(PCB);
经由第一组凸块接合连接件将驱动器集成电路(驱动器IC)的第一侧直接机械和电气地耦合到所述PIC的第二侧;以及
经由第二组凸块接合连接件将驱动器IC的第一侧电气地耦合到所述PCB。
13.根据权利要求12所述的方法,其中,将所述PIC耦合到所述PCB包括将所述PIC放置在所述PCB的第一侧中的PCB腔体内,使得所述PIC的第一侧面对所述PCB腔体的底板。
14.根据权利要求13所述的方法,还包括经由第二组凸块接合连接件将所述驱动器IC的第一侧直接机械耦合到所述PCB。
15.根据权利要求12所述的方法,还包括:
经由第三组凸块接合连接件将内插器的第一侧机械地耦合到所述PCB,
经由所述第二组凸块接合连接件将所述内插器的第二侧机械地耦合到所述驱动器IC的第一侧;以及
经由所述第二组凸块接合连接件、所述内插器和所述第三组凸块接合连接件将所述驱动器IC的第一侧电气地耦合到所述PCB。
16.根据权利要求12所述的方法,其中,所述内插器包括多层衬底,所述多层衬底包括导体和电介质的交替层。
17.根据权利要求15所述的方法,其中,所述内插器包括一个或多个镀通孔(PTH)。
18.根据权利要求17所述的方法,其中,所述驱动器IC的第一侧到所述PCB的经由所述内插器的电气耦合包括至少一个PTH。
19.根据权利要求15所述的方法,其中,所述内插器包含玻璃。
20.根据权利要求17所述的方法,其中,所述内插器包括硅且所述一个或多个镀通孔是直接硅通孔(TSV)。
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CN111929780B (zh) * 2019-09-11 2022-11-11 谷歌有限责任公司 带有光子和竖直电力输送的asic封装
US11978721B2 (en) 2019-09-11 2024-05-07 Google Llc ASIC package with photonics and vertical power delivery
US11276668B2 (en) 2020-02-12 2022-03-15 Google Llc Backside integrated voltage regulator for integrated circuits
US11830855B2 (en) 2020-02-12 2023-11-28 Google Llc Backside integrated voltage regulator for integrated circuits
WO2022133801A1 (zh) * 2020-12-23 2022-06-30 华为技术有限公司 光电装置以及光电集成结构
CN115516629A (zh) * 2020-12-23 2022-12-23 华为技术有限公司 光电装置以及光电集成结构
CN117153700A (zh) * 2023-10-30 2023-12-01 深圳飞骧科技股份有限公司 射频前端模组的封装方法及封装结构

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