CN108604572A - 用于改善晶片平面度的方法和由该方法制成的接合晶片组件 - Google Patents

用于改善晶片平面度的方法和由该方法制成的接合晶片组件 Download PDF

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Publication number
CN108604572A
CN108604572A CN201680081960.2A CN201680081960A CN108604572A CN 108604572 A CN108604572 A CN 108604572A CN 201680081960 A CN201680081960 A CN 201680081960A CN 108604572 A CN108604572 A CN 108604572A
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Prior art keywords
semiconductor wafer
warpage
bending
layer
method described
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CN201680081960.2A
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English (en)
Chinese (zh)
Inventor
G.巴蒂尼卡
K.亚达瓦利
范谦
B.A.哈斯克尔
H.S.埃尔-古劳里
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Ostendo Technologies Inc
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Ostendo Technologies Inc
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    • H01L21/02005—Preparing bulk and homogeneous wafers
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    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Chemical Vapour Deposition (AREA)
  • Formation Of Insulating Films (AREA)
  • Physical Vapour Deposition (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
CN201680081960.2A 2015-12-16 2016-12-16 用于改善晶片平面度的方法和由该方法制成的接合晶片组件 Pending CN108604572A (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201562268262P 2015-12-16 2015-12-16
US62/268262 2015-12-16
US15/379,759 US9978582B2 (en) 2015-12-16 2016-12-15 Methods for improving wafer planarity and bonded wafer assemblies made from the methods
US15/379759 2016-12-15
PCT/US2016/067379 WO2017106788A1 (en) 2015-12-16 2016-12-16 Methods for improving wafer planarity and bonded wafer assemblies made from the methods

Publications (1)

Publication Number Publication Date
CN108604572A true CN108604572A (zh) 2018-09-28

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CN201680081960.2A Pending CN108604572A (zh) 2015-12-16 2016-12-16 用于改善晶片平面度的方法和由该方法制成的接合晶片组件

Country Status (6)

Country Link
US (1) US9978582B2 (es)
JP (2) JP6952697B2 (es)
KR (1) KR20180095609A (es)
CN (1) CN108604572A (es)
TW (1) TWI765874B (es)
WO (1) WO2017106788A1 (es)

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CN111048429A (zh) * 2019-12-23 2020-04-21 武汉新芯集成电路制造有限公司 一种晶圆键合方法
CN112670225A (zh) * 2019-10-15 2021-04-16 爱思开海力士有限公司 晶圆支撑结构
WO2023028729A1 (en) * 2021-08-30 2023-03-09 Yangtze Memory Technologies Co., Ltd. Wafer stress control and semiconductor structure
US11929119B2 (en) 2021-06-30 2024-03-12 Yangtze Memory Technologies Co., Ltd. Three-dimensional memory devices and memory system
US11996152B2 (en) 2021-06-30 2024-05-28 Yangtze Memory Technologies Co., Ltd. Three-dimensional memory devices and methods for forming the same
US12020750B2 (en) 2021-06-30 2024-06-25 Yangtze Memory Technologies Co., Ltd. Three-dimensional memory devices

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US10847419B2 (en) * 2018-03-14 2020-11-24 Raytheon Company Stress compensation and relief in bonded wafers
CN108649021A (zh) * 2018-07-19 2018-10-12 长江存储科技有限责任公司 晶圆翘曲调整结构及其形成方法
CN109155235A (zh) * 2018-08-16 2019-01-04 长江存储科技有限责任公司 使用背面补偿结构的晶圆平整度控制
JP2020047617A (ja) * 2018-09-14 2020-03-26 キオクシア株式会社 基板処理装置、半導体装置の製造方法、および被加工基板
KR20230150404A (ko) * 2018-09-28 2023-10-30 램 리써치 코포레이션 비대칭 웨이퍼 보우 보상
US10896821B2 (en) * 2018-09-28 2021-01-19 Lam Research Corporation Asymmetric wafer bow compensation by physical vapor deposition
JP2020161685A (ja) * 2019-03-27 2020-10-01 東京エレクトロン株式会社 成膜装置および成膜方法
JP7259527B2 (ja) * 2019-04-26 2023-04-18 富士電機株式会社 半導体基板の製造方法および半導体装置の製造方法
US10790296B1 (en) * 2019-05-21 2020-09-29 Sandisk Technologies Llc Distortion-compensated wafer bonding method and apparatus using a temperature-controlled backside thermal expansion layer
FR3121548B1 (fr) * 2021-03-30 2024-02-16 Soitec Silicon On Insulator Procede de preparation d’un substrat avance, notamment pour des applications photoniques
WO2024072609A1 (en) * 2022-09-28 2024-04-04 Applied Materials, Inc. Correction of global curvature during stress management

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