CN108475678B - 自对准到具有侧壁电介质的场释放氧化物的漂移区注入 - Google Patents
自对准到具有侧壁电介质的场释放氧化物的漂移区注入 Download PDFInfo
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- CN108475678B CN108475678B CN201780007246.3A CN201780007246A CN108475678B CN 108475678 B CN108475678 B CN 108475678B CN 201780007246 A CN201780007246 A CN 201780007246A CN 108475678 B CN108475678 B CN 108475678B
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Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US15/003,776 US9583612B1 (en) | 2016-01-21 | 2016-01-21 | Drift region implant self-aligned to field relief oxide with sidewall dielectric |
| US15/003,776 | 2016-01-21 | ||
| PCT/US2017/014581 WO2017127813A1 (en) | 2016-01-21 | 2017-01-23 | Drift region implant self-aligned to field relief oxide with sidewall dielectric |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108475678A CN108475678A (zh) | 2018-08-31 |
| CN108475678B true CN108475678B (zh) | 2023-08-15 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201780007246.3A Active CN108475678B (zh) | 2016-01-21 | 2017-01-23 | 自对准到具有侧壁电介质的场释放氧化物的漂移区注入 |
Country Status (5)
| Country | Link |
|---|---|
| US (4) | US9583612B1 (enExample) |
| EP (1) | EP3430647A4 (enExample) |
| JP (2) | JP7089144B2 (enExample) |
| CN (1) | CN108475678B (enExample) |
| WO (1) | WO2017127813A1 (enExample) |
Families Citing this family (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9711402B1 (en) * | 2016-03-08 | 2017-07-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming contact metal |
| US10361296B2 (en) | 2017-06-29 | 2019-07-23 | Monolith Semiconductor Inc. | Metal oxide semiconductor (MOS) controlled devices and methods of making the same |
| US10424647B2 (en) * | 2017-10-19 | 2019-09-24 | Texas Instruments Incorporated | Transistors having gates with a lift-up region |
| US10566200B2 (en) * | 2018-04-03 | 2020-02-18 | Texas Instruments Incorporated | Method of fabricating transistors, including ambient oxidizing after etchings into barrier layers and anti-reflecting coatings |
| US11152505B2 (en) * | 2018-06-28 | 2021-10-19 | Texas Instruments Incorporated | Drain extended transistor |
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Also Published As
| Publication number | Publication date |
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| CN108475678A (zh) | 2018-08-31 |
| US20170213895A1 (en) | 2017-07-27 |
| JP7429090B2 (ja) | 2024-02-07 |
| US10497787B2 (en) | 2019-12-03 |
| JP2022031913A (ja) | 2022-02-22 |
| US10096685B2 (en) | 2018-10-09 |
| EP3430647A4 (en) | 2019-09-18 |
| US10861948B2 (en) | 2020-12-08 |
| JP7089144B2 (ja) | 2022-06-22 |
| WO2017127813A1 (en) | 2017-07-27 |
| US20170213893A1 (en) | 2017-07-27 |
| EP3430647A1 (en) | 2019-01-23 |
| US9583612B1 (en) | 2017-02-28 |
| JP2019503085A (ja) | 2019-01-31 |
| US20200083336A1 (en) | 2020-03-12 |
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