CN107887295A - 一种芯片键合装置及键合方法 - Google Patents

一种芯片键合装置及键合方法 Download PDF

Info

Publication number
CN107887295A
CN107887295A CN201610877730.9A CN201610877730A CN107887295A CN 107887295 A CN107887295 A CN 107887295A CN 201610877730 A CN201610877730 A CN 201610877730A CN 107887295 A CN107887295 A CN 107887295A
Authority
CN
China
Prior art keywords
chip
pick
head
substrate
unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201610877730.9A
Other languages
English (en)
Other versions
CN107887295B (zh
Inventor
王天明
姜晓玉
夏海
陈飞彪
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Micro Electronics Equipment Co Ltd
Original Assignee
Shanghai Micro Electronics Equipment Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to CN201610877730.9A priority Critical patent/CN107887295B/zh
Application filed by Shanghai Micro Electronics Equipment Co Ltd filed Critical Shanghai Micro Electronics Equipment Co Ltd
Priority to KR1020197011896A priority patent/KR102192202B1/ko
Priority to SG11201902829TA priority patent/SG11201902829TA/en
Priority to JP2019517224A priority patent/JP2019530247A/ja
Priority to US16/338,260 priority patent/US10658327B1/en
Priority to PCT/CN2017/103331 priority patent/WO2018059374A1/zh
Priority to TW106133486A priority patent/TWI628735B/zh
Publication of CN107887295A publication Critical patent/CN107887295A/zh
Application granted granted Critical
Publication of CN107887295B publication Critical patent/CN107887295B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67144—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67121—Apparatus for making assemblies not otherwise provided for, e.g. package constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67259—Position monitoring, e.g. misposition detection or presence detection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67282—Marking devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
    • H01L21/67712—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations the substrate being handled substantially vertically
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
    • H01L21/67721—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations the substrates to be conveyed not being semiconductor wafers or large planar substrates, e.g. chips, lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H01L21/681—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7565—Means for transporting the components to be connected
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75743—Suction holding means
    • H01L2224/75745—Suction holding means in the upper part of the bonding apparatus, e.g. in the bonding head
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75753—Means for optical alignment, e.g. sensors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/758—Means for moving parts
    • H01L2224/75821—Upper part of the bonding apparatus, i.e. bonding head
    • H01L2224/75822—Rotational mechanism
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/758—Means for moving parts
    • H01L2224/75841—Means for moving parts of the bonding head
    • H01L2224/75842—Rotational mechanism
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112—Aligning
    • H01L2224/81121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H01L2224/8113—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Die Bonding (AREA)

Abstract

本发明涉及一种芯片键合装置及键合方法，该装置包括芯片供应单元；基底供应单元；第一拾取组件，设置于芯片供应单元与基底供应单元间，包括第一转动部件和设置于第一转动部件上的第一拾取头；第二拾取组件，包括第二转动部件和设置于第二转动部件上的第二拾取头，第一拾取组件从芯片供应单元或者第二拾取组件拾取芯片，并将芯片移送至基底供应单元的基底上完成键合；以及视觉单元，用于实现第一拾取组件上芯片与基底对准，所述芯片供应单元、基底供应单元、第二拾取组件及视觉单元分别位于第一拾取头的四个工位上。本发明通过旋转实现芯片传送，提高芯片键合的产率；利用第二拾取组件实现芯片翻转，兼容芯片上的标记面朝上和朝下两种键合方式。

Description

一种芯片键合装置及键合方法
技术领域
本发明涉及芯片键合领域，特别涉及一种芯片键合装置及键合方法。
背景技术
芯片键合是将芯片与载片连接形成的一种互连形式。键合芯片一般以标记面朝上的方式放置在分离台上，通过芯片传输手将芯片键合到键合台上。目前的芯片键合装置需要从分离台上拾取芯片，经过长距离的直线传输才能到达键合台，将芯片键合到键合台上，大大影响了键合的产率；另外，芯片与键合台上的基底进行键合时，会对芯片上的标记面方向有要求，一部分要求标记面朝下键合，一部分要求标记面朝上键合，需要更换对应的键合装置，以符合键合时对标记面方向的要求，进一步降低了键合的产率。
发明内容
本发明提供一种芯片键合装置及键合方法，以解决现有的芯片键合产率低的问题。
为解决上述技术问题，本发明提供一种芯片键合装置，包括：
芯片供应单元，用于提供待键合的芯片；
基底供应单元，用于提供基底，与所述芯片供应单元相对设置；
第一拾取组件，设置于所述芯片供应单元与所述基底供应单元之间，包括第一转动部件和设置于所述第一转动部件上的第一拾取头；
第二拾取组件，设置于所述芯片供应单元与所述基底供应单元之间，包括第二转动部件和设置于所述第二转动部件上的第二拾取头，所述第一拾取组件从所述芯片供应单元或者所述第二拾取组件拾取芯片，并将所述芯片移送至所述基底供应单元的基底上完成键合；以及
视觉单元，用于实现所述第一拾取组件上芯片与所述基底对准，所述芯片供应单元、基底供应单元、第二拾取组件以及视觉单元分别位于所述第一拾取头的四个工位上。
较佳地，所述第一拾取头的数量为一个，所述第一拾取头由所述第一转动部件驱动在所述芯片供应单元、基底供应单元、第二拾取组件以及视觉单元所在的四个工位之间转换。
较佳地，所述第一拾取头的数量为多个，多个所述第一拾取头均匀设置于所述第一转动部件上，且呈环形间隔分布，每个所述第一拾取头由所述第一转动部件驱动在所述芯片供应单元、基底供应单元、第二拾取组件以及视觉单元所在的四个工位之间转换。
较佳地，所述第一拾取头的数量设有四个。
较佳地，所述第一转动部件转动一次的角度与相邻两个第一拾取头之间的角度相同。
较佳地，所述第二拾取头从所述芯片供应单元拾取芯片，由所述第二转动部件带动旋转，将所述芯片交接至所述第一拾取头。
较佳地，所述第二转动部件的旋转角度为90度。
较佳地，所述第一拾取头与第二拾取头均采用真空吸头。
较佳地，所述真空吸头可沿轴向做直线运动。
本发明还提供了一种芯片键合方法，应用于如上所述的芯片键合装置，包括如下步骤：
S1：将芯片以标记面朝上的方式上载至所述芯片供应单元，将基底上载至所述基底供应单元；
S2：判断基底要求的键合时芯片上标记面的方向；
S3：若要求标记面朝下键合，则所述第一拾取组件从所述芯片供应单元拾取芯片后将所述芯片移送至所述基底供应单元的基底上并完成键合；
S4：若要求标记面朝上键合，则由所述第二拾取组件从所述芯片供应单元拾取芯片，并交接至所述第一拾取组件，所述第一拾取组件将所述芯片移送至所述基底供应单元的基底上并完成键合。
较佳地，所述步骤S3及S4中均包括，设置一视觉单元扫描所述第一拾取组件上芯片的位置，实现所述芯片与所述基底对准。
与现有技术相比，本发明提供的芯片键合装置及键合方法，具有如下优点：
1.本发明中，所述基底供应单元与所述芯片供应单元相对设置，结合第一转动部件的旋转，实现芯片从芯片供应单元到基底供应单元的传送，将芯片的长距离直线传输转为垂向的翻转传输，从而大大提高了芯片键合的产率；
2.要求芯片上的标记面朝下键合时，直接利用第一拾取组件实现芯片的拾取和键合；若要求芯片上的标记面朝上键合，则利用第二拾取组件先拾取芯片，再利用第一拾取组件与第二拾取组件的交接，实现芯片的翻转，从而兼容芯片上的标记面朝上键合和朝下键合两种情况。
附图说明
图1为本发明一具体实施方式中芯片键合装置的结构示意图；
图2为本发明一具体实施方式中芯片的结构示意图；
图3为本发明一具体实施方式中第一拾取组件的结构示意图；
图4为本发明一具体实施方式中当芯片上的标记面朝上时，第一拾取组件与第二拾取组件的交接流程示意图。
图中：10-芯片供应单元、20-基底供应单元、30-第一拾取组件、31-第一转动部件、32-第一拾取头、40-第二拾取组件、41-第二转动部件、42-第二拾取头、50-视觉单元、60-芯片、61-标记面。
具体实施方式
为使本发明的上述目的、特征和优点能够更加明显易懂，下面结合附图对本发明的具体实施方式做详细的说明。需说明的是，本发明附图均采用简化的形式且均使用非精准的比例，仅用以方便、明晰地辅助说明本发明实施例的目的。
本发明提供的芯片键合装置，如图1至图3所示，包括：
芯片供应单元10，用于从晶片中分离芯片60，并提供待键合的芯片60；
基底供应单元20，用于提供基底，与所述芯片供应单元10相对设置，本实施例中，所述基底供应单元20倒置于所述芯片供应单元10上方；
第一拾取组件30，设置于所述芯片供应单元10与所述基底供应单元20之间，包括第一转动部件31和设置于所述第一转动部件31上的第一拾取头32；
第二拾取组件40，同样设置于所述芯片供应单元10与所述基底供应单元20之间，包括第二转动部件41和设置于所述第二转动部件41上的第二拾取头42，所述第一拾取组件30从所述芯片供应单元10或者所述第二拾取组件40拾取芯片60，并将所述芯片60移送至所述基底供应单元20的基底上完成键合；以及
视觉单元50，用于实现所述第一拾取组件30上芯片60与所述基底对准，所述芯片供应单元10、基底供应单元20、第二拾取组件40以及视觉单元50分别位于所述第一拾取头30的四个工位上。
具体地，本发明中的所述基底供应单元20倒置于所述芯片供应单元10上方，结合第一转动部件31的旋转，实现芯片60从芯片供应单元10到基底供应单元20的传送，将芯片60的长距离直线传输转为垂向的翻转传输，从而大大提高了芯片键合的产率。
较佳地，所述第一拾取头32的数量可以为一个，所述第一拾取头32由所述第一转动部件31驱动在所述芯片供应单元10、基底供应单元20、第二拾取组件40以及视觉单元50所在的四个工位之间转换，具体地，所述第一拾取头32在芯片供应单元10或第二拾取组件40的工位拾取芯片60；在视觉单元50的工位进行位置扫描；在基底供应单元20的工位进行键合。
较佳地，请重点参考图3，所述第一拾取头32的数量为多个(本实施例以4个为例)，4个所述第一拾取头32均匀设置于所述第一转动部件31上，且呈环形间隔分布，每个所述第一拾取头32由所述第一转动部件31驱动在所述芯片供应单元10、基底供应单元20、第二拾取组件40以及视觉单元50所在的四个工位之间转换。较佳地，请结合图1，所述基底供应单元20、芯片供应单元10、第二拾取组件40以及视觉单元50分别对应设置于所述第一拾取组件30的上下左右四个方向上，所述第一转动部件31转动停止时，分别有四个第一拾取头32分别与所述基底供应单元20、芯片供应单元10、第二拾取组件40以及视觉单元50一一对应。这样，每个第一拾取头32可在不同的工位处做不同的动作，进一步提高键合效率。
较佳地，所述第一转动部件31转动一次的角度与相邻两个第一拾取头32之间的角度相同，同样以四个第一拾取头32为例，第一转动部件31转动一次的角度为90°。
较佳地，请重点参考图1和图4，所述第二拾取头42从所述芯片供应单元10拾取芯片60，由所述第二转动部件41带动旋转，将所述芯片60交接至所述第一拾取头32，较佳地，所述第二转动部件41的旋转角度为90度。本发明利用第二拾取头42先拾取芯片60，通过第二转动部件41的旋转将芯片60移至某一个第一拾取头32处，再利用第一拾取头32与第二拾取头42的交接，实现芯片60的翻转。
较佳地，本实施例中，所述第一拾取头32与第二拾取头42均采用真空吸头，所述真空吸头可沿轴向做直线运动，便于芯片60的吸附拾取。
请重点参考图4，本发明还提供了一种芯片键合方法，应用于如上所述的芯片键合装置，包括如下步骤：
S1：将带有芯片60的晶片上载至所述芯片供应单元10，其中芯片60上的标记面61朝上，将基底上载至所述基底供应单元20；
S2：判断基底要求的键合时芯片60上标记面61的方向；
S3：若要求标记面61朝下键合，则所述第一拾取组件从所述芯片供应单元10拾取芯片60后将所述芯片60移送至所述基底供应单元20的基底上并完成键合，在该过程中，第二拾取组件40保持初始位置不动；
S4：若要求标记面61朝上键合，则由所述第二拾取组件40从所述芯片供应单元10拾取芯片60，并交接至所述第一拾取组件，整个交接过程如图4所示，首先，第二拾取头42吸附芯片60并转至交接位，某个第一拾取头32伸出并交接芯片60，然后带着芯片60缩回，再然后，第二拾取头42向下旋转恢复至初始位置，同时转动部件31带动该第一拾取头32旋转至键合位，第一拾取头32上升进行芯片60的键合；当然，第一拾取头32与第二拾取头42交接完成后，所述第一拾取组件将所述芯片60移送至所述基底供应单元20的基底上并完成键合。
较佳地，所述步骤S3及S4中均包括，设置一视觉单元50扫描所述第一拾取组件上芯片60的位置，实现所述芯片60与所述基底对准。
综上所述，本发明提供的芯片键合装置及键合方法，所述芯片键合装置包括芯片供应单元10，用于提供待键合的芯片60；基底供应单元20，用于提供基底，与所述芯片供应单元10相对设置；第一拾取组件30，设置于所述芯片供应单元10与所述基底供应单元20之间，包括第一转动部件31和设置于所述第一转动部件31上的第一拾取头32；第二拾取组件40，设置于所述芯片供应单元10与所述基底供应单元20之间，包括第二转动部件41和设置于所述第二转动部件41上的第二拾取头42，所述第一拾取组件30从所述芯片供应单元10或者所述第二拾取组件40拾取芯片60，并将所述芯片60移送至所述基底供应单元20的基底上完成键合；以及视觉单元50，用于实现所述第一拾取组件30上芯片60与所述基底对准，所述芯片供应单元10、基底供应单元20、第二拾取组件40以及视觉单元50分别位于所述第一拾取头42的四个工位上。本发明利用基底供应单元20与芯片供应单元10的位置关系，结合第一转动部件31的旋转，实现芯片60的传送，将芯片60的长距离直线传输转为垂向的翻转传输，从而大大提高了芯片键合的产率；另外，当要求芯片60上的标记面61朝下键合时，直接利用第一拾取组件30实现芯片60的拾取和键合；若要求芯片60上的标记面61朝上键合，则利用第二拾取组件40先拾取芯片60，再利用第一拾取组件30与第二拾取组件40的交接，实现芯片60的翻转，从而兼容芯片60上的标记面61朝上和朝下两种键合情况。
显然，本领域的技术人员可以对发明进行各种改动和变型而不脱离本发明的精神和范围。这样，倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包括这些改动和变型在内。

Claims (10)

1.一种芯片键合装置，其特征在于，包括：
芯片供应单元，用于提供待键合的芯片；
基底供应单元，用于提供基底，与所述芯片供应单元相对设置；
第一拾取组件，设置于所述芯片供应单元与所述基底供应单元之间，包括第一转动部件和设置于所述第一转动部件上的第一拾取头；
第二拾取组件，设置于所述芯片供应单元与所述基底供应单元之间，包括第二转动部件和设置于所述第二转动部件上的第二拾取头，所述第一拾取组件从所述芯片供应单元或者所述第二拾取组件拾取芯片，并将所述芯片移送至所述基底供应单元的基底上完成键合；以及
视觉单元，用于实现所述第一拾取组件上芯片与所述基底对准，所述芯片供应单元、基底供应单元、第二拾取组件以及视觉单元分别位于所述第一拾取头的四个工位上。
2.如权利要求1所述的芯片键合装置，其特征在于，所述第一拾取头的数量为一个，所述第一拾取头由所述第一转动部件驱动在所述芯片供应单元、基底供应单元、第二拾取组件以及视觉单元所在的四个工位之间转换。
3.如权利要求1所述的芯片键合装置，其特征在于，所述第一拾取头的数量为多个，多个所述第一拾取头均匀设置于所述第一转动部件上，且呈环形间隔分布，每个所述第一拾取头由所述第一转动部件驱动在所述芯片供应单元、基底供应单元、第二拾取组件以及视觉单元所在的四个工位之间转换。
4.如权利要求3所述的芯片键合装置，其特征在于，所述第一拾取头的数量设有四个。
5.如权利要求3所述的芯片键合装置，其特征在于，所述第一转动部件转动一次的角度与相邻两个第一拾取头之间的角度相同。
6.如权利要求1所述的芯片键合装置，其特征在于，所述第二拾取头从所述芯片供应单元拾取芯片，由所述第二转动部件带动旋转，将所述芯片交接至所述第一拾取头。
7.如权利要求6所述的芯片键合装置，其特征在于，所述第二转动部件的旋转角度为90度。
8.如权利要求6所述的芯片键合装置，其特征在于，所述第一拾取头与第二拾取头均采用真空吸头。
9.如权利要求8所述的芯片键合装置，其特征在于，所述真空吸头可沿轴向做直线运动。
10.一种芯片键合方法，应用于如权利要求1所述的芯片键合装置，其特征在于，包括如下步骤：
S1：将芯片以标记面朝上的方式上载至所述芯片供应单元，将基底上载至所述基底供应单元；
S2：判断基底要求的键合时芯片上标记面的方向；
S3：若要求标记面朝下键合，则所述第一拾取组件从所述芯片供应单元拾取芯片后，将所述芯片移送至所述基底供应单元的基底上并完成键合；
S4：若要求标记面朝上键合，则由所述第二拾取组件从所述芯片供应单元拾取芯片，并交接至所述第一拾取组件，所述第一拾取组件将所述芯片移送至所述基底供应单元的基底上并完成键合
如权利要求10所述的芯片键合方法，其特征在于，所述步骤S3及S4中均包括，设置一视觉单元扫描所述第一拾取组件上芯片的位置，实现所述芯片与所述基底对准。
CN201610877730.9A 2016-09-30 2016-09-30 一种芯片键合装置及键合方法 Active CN107887295B (zh)

Priority Applications (7)

Application Number Priority Date Filing Date Title
CN201610877730.9A CN107887295B (zh) 2016-09-30 2016-09-30 一种芯片键合装置及键合方法
SG11201902829TA SG11201902829TA (en) 2016-09-30 2017-09-26 Chip bonding apparatus and bonding method
JP2019517224A JP2019530247A (ja) 2016-09-30 2017-09-26 チップボンディング装置及びチップボンディング方法
US16/338,260 US10658327B1 (en) 2016-09-30 2017-09-26 Chip bonding apparatus and bonding method
KR1020197011896A KR102192202B1 (ko) 2016-09-30 2017-09-26 칩 본딩 장치 및 본딩 방법
PCT/CN2017/103331 WO2018059374A1 (zh) 2016-09-30 2017-09-26 一种芯片键合装置及键合方法
TW106133486A TWI628735B (zh) 2016-09-30 2017-09-29 Chip bonding device and bonding method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610877730.9A CN107887295B (zh) 2016-09-30 2016-09-30 一种芯片键合装置及键合方法

Publications (2)

Publication Number Publication Date
CN107887295A true CN107887295A (zh) 2018-04-06
CN107887295B CN107887295B (zh) 2019-07-23

Family

ID=61763126

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610877730.9A Active CN107887295B (zh) 2016-09-30 2016-09-30 一种芯片键合装置及键合方法

Country Status (7)

Country Link
US (1) US10658327B1 (zh)
JP (1) JP2019530247A (zh)
KR (1) KR102192202B1 (zh)
CN (1) CN107887295B (zh)
SG (1) SG11201902829TA (zh)
TW (1) TWI628735B (zh)
WO (1) WO2018059374A1 (zh)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111146128A (zh) * 2018-11-02 2020-05-12 细美事有限公司 裸片转移模块和具有该裸片转移模块的裸片接合设备
CN111380874A (zh) * 2018-12-28 2020-07-07 上海微电子装备（集团）股份有限公司 缺陷检测装置、键合设备以及键合方法
WO2021091478A1 (en) * 2019-11-08 2021-05-14 Semiconductor Technologies & Instruments Pte Ltd Component handler
TWI821752B (zh) * 2020-09-28 2023-11-11 新加坡商Ｐｙｘｉｓ Ｃｆ私人有限公司 用於將多個晶粒黏貼到載板的裝置和方法

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI809155B (zh) * 2018-09-28 2023-07-21 日商三星鑽石工業股份有限公司 晶圓分斷裝置、反轉裝置及搬運系統
CN111383972A (zh) * 2018-12-29 2020-07-07 上海微电子装备（集团）股份有限公司 一种键合装置及键合方法
US11282722B2 (en) * 2019-08-23 2022-03-22 YunJun Tang Chip front surface touchless pick and place tool or flip chip bonder
KR102386337B1 (ko) * 2019-11-08 2022-04-13 세메스 주식회사 다이 이송 모듈 및 이를 포함하는 다이 본딩 장치
KR102316940B1 (ko) * 2019-11-08 2021-10-25 세메스 주식회사 다이 이송 모듈 및 이를 포함하는 다이 본딩 장치
US20220059406A1 (en) * 2020-08-21 2022-02-24 Advanced Semiconductor Engineering, Inc. Method for manufacturing semiconductor package

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1613146A (zh) * 2002-01-07 2005-05-04 先进系统自动化有限公司 倒装芯片结合器及其方法
WO2007072714A1 (ja) * 2005-12-22 2007-06-28 Shibaura Mechatronics Corporation 電子部品の実装装置及び実装方法
CN101055846A (zh) * 2006-04-12 2007-10-17 中南大学 热超声倒装芯片键合机
CN101189705A (zh) * 2005-08-16 2008-05-28 松下电器产业株式会社 芯片反转装置和芯片反转方法，及芯片安装设备和芯片安装方法
CN103489811A (zh) * 2012-06-11 2014-01-01 北京中电科电子装备有限公司 键合设备上的双路拾片翻转机构
CN104157594A (zh) * 2013-05-14 2014-11-19 先进科技新加坡有限公司 带有多个用于传送电子器件进行键合的旋转传送臂的键合装置
CN104701199A (zh) * 2015-03-20 2015-06-10 北京中电科电子装备有限公司 一种倒装芯片键合设备

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3504166B2 (ja) 1998-11-25 2004-03-08 株式会社新川 フリップチップボンディング装置
JP3732082B2 (ja) * 2000-09-25 2006-01-05 株式会社新川 ボンディング装置およびボンディング方法
JP4394822B2 (ja) 2000-12-05 2010-01-06 パナソニック株式会社 部品実装装置
JP2002198398A (ja) * 2000-12-27 2002-07-12 Shibuya Kogyo Co Ltd ボンディング装置
DE10203601A1 (de) * 2002-01-30 2003-08-14 Siemens Ag Chipentnahmevorrichtung, Chipentnahmesystem, Bestücksystem und Verfahren zum Entnehmen von Chips von einem Wafer
JP3739752B2 (ja) * 2003-02-07 2006-01-25 株式会社 ハリーズ ランダム周期変速可能な小片移載装置
DE102006002367B3 (de) * 2006-01-17 2007-10-04 Mühlbauer Ag Vorrichtung und Verfahren zur Übertragung einer Mehrzahl von Chips von einem Wafer auf ein Substrat
JP2013143542A (ja) * 2012-01-12 2013-07-22 Tokyo Electron Ltd 半導体デバイス製造システム及び半導体デバイス製造方法
JP2014075531A (ja) * 2012-10-05 2014-04-24 Samsung Techwin Co Ltd 部品実装装置
WO2014087491A1 (ja) * 2012-12-04 2014-06-12 上野精機株式会社 移載装置
JP2015204420A (ja) 2014-04-15 2015-11-16 株式会社ディスコ 板状物の搬送装置および切削装置
KR101614204B1 (ko) * 2014-04-29 2016-04-20 세메스 주식회사 다이 픽업 유닛, 이를 포함하는 다이 본딩 장치 및 방법
KR102295986B1 (ko) * 2014-12-01 2021-08-31 삼성디스플레이 주식회사 칩 본딩 장치 및 칩 본딩 방법
DE102016117815B4 (de) * 2016-09-21 2018-04-12 Asm Assembly Systems Gmbh & Co. Kg Zwischenspeichern von FCOB Chips in einer Chip-Transfervorrichtung

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1613146A (zh) * 2002-01-07 2005-05-04 先进系统自动化有限公司 倒装芯片结合器及其方法
CN101189705A (zh) * 2005-08-16 2008-05-28 松下电器产业株式会社 芯片反转装置和芯片反转方法，及芯片安装设备和芯片安装方法
WO2007072714A1 (ja) * 2005-12-22 2007-06-28 Shibaura Mechatronics Corporation 電子部品の実装装置及び実装方法
CN101055846A (zh) * 2006-04-12 2007-10-17 中南大学 热超声倒装芯片键合机
CN103489811A (zh) * 2012-06-11 2014-01-01 北京中电科电子装备有限公司 键合设备上的双路拾片翻转机构
CN104157594A (zh) * 2013-05-14 2014-11-19 先进科技新加坡有限公司 带有多个用于传送电子器件进行键合的旋转传送臂的键合装置
CN104701199A (zh) * 2015-03-20 2015-06-10 北京中电科电子装备有限公司 一种倒装芯片键合设备

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111146128A (zh) * 2018-11-02 2020-05-12 细美事有限公司 裸片转移模块和具有该裸片转移模块的裸片接合设备
CN111146128B (zh) * 2018-11-02 2023-09-29 细美事有限公司 裸片转移模块和具有该裸片转移模块的裸片接合设备
CN111380874A (zh) * 2018-12-28 2020-07-07 上海微电子装备（集团）股份有限公司 缺陷检测装置、键合设备以及键合方法
WO2021091478A1 (en) * 2019-11-08 2021-05-14 Semiconductor Technologies & Instruments Pte Ltd Component handler
US11887876B2 (en) 2019-11-08 2024-01-30 Semiconductor Technologies & Instruments Pte Ltd Component handler
TWI821752B (zh) * 2020-09-28 2023-11-11 新加坡商Ｐｙｘｉｓ Ｃｆ私人有限公司 用於將多個晶粒黏貼到載板的裝置和方法

Also Published As

Publication number Publication date
KR102192202B1 (ko) 2020-12-16
CN107887295B (zh) 2019-07-23
JP2019530247A (ja) 2019-10-17
TWI628735B (zh) 2018-07-01
WO2018059374A1 (zh) 2018-04-05
TW201814820A (zh) 2018-04-16
US10658327B1 (en) 2020-05-19
KR20190053259A (ko) 2019-05-17
SG11201902829TA (en) 2019-05-30
US20200144218A1 (en) 2020-05-07

Similar Documents

Publication Publication Date Title
CN107887295A (zh) 一种芯片键合装置及键合方法
CN107887293A (zh) 一种批处理键合装置及键合方法
US8151451B2 (en) Electronic component bonding machine
CN104157594B (zh) 带有多个用于传送电子器件进行键合的旋转传送臂的键合装置
KR20080034836A (ko) 칩 반전 장치와 칩 반전 방법, 및 칩 탑재 장치와 칩 탑재방법
TWI612604B (zh) 倒裝晶片鍵合裝置及鍵合方法
CN104752283A (zh) 芯片倒装装置
TWI645489B (zh) 晶片接合裝置及其接合方法
TW201901832A (zh) 一種晶片鍵合裝置
TWI655707B (zh) Chip universal batch bonding device and method
CN108122787B (zh) 芯片键合装置和芯片键合方法
CN204632732U (zh) 芯片倒装装置
CN108511353A (zh) 一种芯片键合装置及方法
CN102897333B (zh) 太阳能槽式聚光镜封装方法
CN107665828A (zh) 一种自动键合装置及方法
CN206819980U (zh) 一种多工作台固晶机的上下料装置
CN207044684U (zh) 贴合机
CN108946152A (zh) 一种双轨自动测试平台及其测试方法
CN108840098A (zh) 一种单轨自动测试平台及其测试方法
CN207823421U (zh) 一种铝基板连线测试装置
CN206181589U (zh) 一种电路板的焊点分布识别自动浸锡设备
CN108499052A (zh) 一种乒乓球的胶球机
CN203199660U (zh) 一种磁芯组装机中的小车搬送装置
CN106494883A (zh) 一种全自动单晶硅抓取机械手

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant