TWI655707B - Chip universal batch bonding device and method - Google Patents

Chip universal batch bonding device and method Download PDF

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TWI655707B
TWI655707B TW106133489A TW106133489A TWI655707B TW I655707 B TWI655707 B TW I655707B TW 106133489 A TW106133489 A TW 106133489A TW 106133489 A TW106133489 A TW 106133489A TW I655707 B TWI655707 B TW I655707B
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batch bonding
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郭聳
朱岳彬
陳飛彪
夏海
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上海微電子裝備(集團)股份有限公司
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Abstract

本發明有關於一種芯片通用批鍵合裝置及方法,該裝置包括物料取放區和傳輸工作區,其中:物料取放區包括用於提供芯片的藍膜片取放區和用於存放基底的基底取放區,藍膜片取放區和基底取放區分設於傳輸工作區的兩端;傳輸工作區沿從藍膜片取放區至基底取放區的方向依次包括芯片拾取及分離區、芯片對準及精調區、以及芯片批鍵合區;傳輸工作區內設有芯片載板傳輸裝置,芯片載板傳輸裝置貫穿傳輸工作區,在芯片拾取及分離區、芯片對準及精調區、以及芯片批鍵合區之間移動送料。本發明通過兼容性設計,使裝置通用於兩種貼片方式,拓展了設備的應用範圍;另外,模組化的設計可以根據需求進行配置,增加了設備的市場梯度。

Description

芯片通用批鍵合裝置及方法
本發明有關於芯片鍵合領域,特別是有關於一種芯片通用批鍵合裝置及方法。
倒裝芯片鍵合製程是將芯片與載片連接形成的一種互連形式,如第1圖所示,將載片1上的多個芯片2以載板5承載的方式批量鍵合到基底4上,多個芯片2在載板5上位置被精確放置並吸附,鍵合過程中芯片2與載板5間被牢固定位,芯片2與芯片2間距L被精確保持,因此單個芯片2的串行鍵合被多個芯片2的並行鍵合取代從而有效提高了設備產率。另外,由於電子產品朝著輕、薄和小型化的趨勢發展,使得芯片鍵合技術的應用日益增多,將芯片鍵合製程與晶圓級封裝製程相結合,能夠製作出封裝尺寸更小、性能更高的封裝形式。如果將芯片鍵合製程與TSV(矽通孔)製程相結合,能夠製作出成本和性能更有競爭力的芯片結構。目前市場上存在3種fan-out(擴散型)鍵合製程,其中基於chip First的fan-out鍵合製程是得到廣泛應用的主流製程形式。如第2a圖和第2b圖所示,fan-out(擴散型)鍵合製程主要有die-up(芯片上標記朝上)和die-down(芯片上標記朝下)兩種貼片方式,其中,die-up貼片方式芯片2中標記3不與基底4接觸,die-down貼片方式中,芯片2的標記3與基底4接觸。針對上述兩種貼片方式,需要採用不同的鍵合裝置進行鍵合,即鍵合裝置不能通用,增加了生產成本。
另一方面,鍵合技術能夠在不縮小線寬的情況下,在有限面積內進行最大程度的芯片疊加與整合,同時縮減SoC晶片封裝體積與線路傳導長度,進而提升晶片傳輸效率。芯片-晶圓鍵合技術(chip-to-wafer,C2W)相對於晶圓-晶圓鍵合技術(wafer-to-wafer,W2W)具有更高的良率和更低的產品成本。因此,C2W技術如何在保證高鍵合精度的同時具有更高的產率是業界努力的目標。
本發明提供一種芯片通用批鍵合裝置及方法,以解決上述技術問題。
為解決上述技術問題,本發明提供一種芯片通用批鍵合裝置,包括物料取放區和傳輸工作區,其中:物料取放區包括用於提供芯片的藍膜片取放區和用於存放基底的基底取放區,藍膜片取放區和基底取放區分設於傳輸工作區的兩端;傳輸工作區沿從藍膜片取放區至基底取放區的方向依次包括芯片拾取及分離區、芯片對準及精調區、以及芯片批鍵合區;傳輸工作區內設有芯片載板傳輸裝置,芯片載板傳輸裝置貫穿傳輸工作區,在芯片拾取及分離區、芯片對準及精調區、以及芯片批鍵合區之間移動送料。
較佳地,芯片載板傳輸裝置包括第一運動台、安裝於第一運動台上的加壓裝置以及安裝於加壓裝置上的載板。
較佳地,芯片拾取及分離區內設有分離台、翻轉手以及取放裝置,芯片對準及精調區內設有精調單元,芯片批鍵合區內設有承載台。
較佳地,取放裝置包括支架,支架上安裝有可水平移動的移位裝置,移位裝置上安裝有可垂向移動的升降裝置,升降裝置上固定安裝有取放手。
較佳地,升降裝置上安裝有第一對準系統。
較佳地,精調單元包括第二運動台、以及安裝於第二運動台上的精調機械手和第二對準系統。
較佳地,承載台上安裝有第三對準系統。
較佳地,移位裝置上安裝有多個升降裝置,每個升降裝置下方分別安裝有取放手。
較佳地,藍膜片取放區內設有載片台和第一機械手,第一機械手拾取載片台上的芯片移送至分離台上。
較佳地,基底取放區內設有基片庫和第二機械手,第二機械手拾取承載台上鍵合完成後的基底,並移送至基片庫。
較佳地,分離台下方設有頂出機構,用於將放置於分離台上的芯片頂起。
本發明更提供了一種芯片通用批鍵合方法,應用於如上所述的芯片通用批鍵合裝置中,包括如下步驟:S1:將芯片從藍膜片取放區傳輸並交接至芯片拾取及分離區;S2:多個芯片在芯片拾取及分離區內被拾取並利用芯片載板傳輸裝置同時傳遞至芯片對準及精調區進行位置精度調整;S3:位置調整完成後的多個芯片利用芯片載板傳輸裝置傳遞至芯片批鍵合區完成批量鍵合。
較佳地,在步驟S2中,當要求芯片上的標記朝下鍵合時,芯片拾取及分離區內的翻轉手拾取芯片,翻轉後將芯片交接至芯片載板傳輸裝置;當要求芯片上的標記朝上鍵合時,芯片拾取及分離區內的取放裝置拾取芯片,經由芯片對準及精調區調整精度後交接至芯片載板傳輸裝置。
與習知技術相比,本發明提供的芯片通用批鍵合裝置及方法,該裝置包括物料取放區和傳輸工作區,其中:物料取放區包括用於提供芯片的藍膜片取放區和用於存放基底的基底取放區,藍膜片取放區和基底取放區分設於傳輸工作區的兩端;傳輸工作區沿從藍膜片取放區至基底取放區的方向依次包括芯片拾取及分離區、芯片對準及精調區、以及芯片批鍵合區;傳輸工作區內設有芯片載板傳輸裝置,芯片載板傳輸裝置貫穿傳輸工作區,在芯片拾取及分離區、芯片對準及精調區、以及芯片批鍵合區之間移動送料。本發明通過兼容性設計,使裝置通用於兩種貼片方式,拓展了設備的應用範圍;另外,模組化的設計可以根據需求進行配置,增加了設備的市場梯度。
為使本發明的上述目的、特徵和優點能夠更加明顯易懂,下面結合圖式對本發明的實施方式做詳細的說明。需說明的是,本發明圖式均採用簡化的形式且均使用非精准的比例,僅用以方便、明晰地輔助說明本發明實施例的目的。
實施例一
本發明提供的芯片通用批鍵合裝置,如第3圖和第4圖所示,包括物料取放區和傳輸工作區,其中:物料取放區包括用於提供芯片113的藍膜片取放區110和用於存放基底123的基底取放區120,藍膜片取放區110和基底取放區120分設於傳輸工作區的兩端,芯片113從藍膜片取放區110上料,鍵合完成後,收集至基底取放區120;傳輸工作區沿從藍膜片取放區110至基底取放區120的方向依次包括芯片拾取及分離區210、芯片對準及精調區220、以及芯片批鍵合區230;傳輸工作區內設有芯片載板傳輸裝置300,芯片載板傳輸裝置300貫穿傳輸工作區,在芯片拾取及分離區210、芯片對準及精調區220、以及芯片批鍵合區230之間移動送料。
本發明通過兼容性設計,使裝置通用於die-up和die-down兩種貼片方式,拓展了設備的應用範圍;另外,模組化的設計可以根據需求進行配置,增加了設備的市場梯度;另外,本發明採用芯片批鍵合方式,平衡了芯片拾取、芯片位置精調和芯片鍵合的時間,使鍵合設備在保證鍵合精度的同時提高了產率。
較佳地,請重點參考第5圖,芯片載板傳輸裝置300包括第一運動台310、安裝於第一運動台310上的加壓裝置320以及安裝於加壓裝置320上的載板330。載板330用於吸附、承載批量的芯片113,並將批量的芯片113鍵合到基底123上,加壓裝置320用於使載板330上吸附的批量的芯片113與基底123牢固結合。
較佳地,請重點參考第3圖和第4圖,芯片拾取及分離區210內設有分離台211、翻轉手212以及取放裝置213,芯片對準及精調區220內設有精調單元,芯片批鍵合區230內設有承載台231。具體地,分離台211上設有一用於承載一組芯片113(例如從1~n共n個芯片113)的載片,當然,每個芯片113上方均設有標記114,在die-down貼片方式時,採用翻轉手212實現拾取和翻轉芯片113的目的;在die-up貼片方式時,採用取放裝置213拾取和放置芯片113,經過精調單元的位置精度調整後,由芯片載板傳輸裝置300將芯片113移送至芯片批鍵合區230,與承載台231上的基底123進行批鍵合。
較佳地,請繼續參考第3圖,分離台211下方設有頂出機構219,用於將放置於分離台211上的芯片113頂起,便於翻轉手212或取放裝置213的拾取。
較佳地,請重點參考第6圖,取放裝置213包括支架214,支架214上安裝有可水平移動的移位裝置215,移位裝置215上安裝有可垂向移動的升降裝置216,升降裝置216上固定安裝有取放手217,移位裝置215帶動升降裝置216水平移動(X向),升降裝置216帶動取放手217垂向(Z向)移動,便於取放裝置213從分離台211上拾取芯片113以及將芯片113準確交接至精調單元。
較佳地,請繼續參考第3圖,支架214上更安裝有第一對準系統218,取放裝置213在拾取分離台211上的芯片113時,先利用第一對準系統218對芯片113位置進行掃描,確保取放手217準確拾取芯片113。
較佳地,請繼續參考第3圖,精調單元包括第二運動台221、以及安裝於第二運動台221上的精調機械手222和第二對準系統223,第二運動台221帶動精調機械手222和第二對準系統223在水平向(X向)移動,使第二對準系統223依次掃描載板330上的多個芯片113的位置,利用精調機械手222按照掃描的位置訊息及所需的位置訊息將多個芯片113精確放置到載板330上。
較佳地,請繼續參考第3圖,承載台231上安裝有第三對準系統232,第三對準系統232用於確定基底123上標記的位置,以及芯片113上的標記的位置,使二者完全對準鍵合。
較佳地,請繼續參考第3圖和第4圖,藍膜片取放區110內設有載片台111和第一機械手112,第一機械手112拾取載片台111上的芯片113移送至分離台211上;基底取放區120內設有基片庫121和第二機械手122,第二機械手122拾取承載台231上鍵合完成後的基底123,並移送至基片庫121。
請重點參考第7圖,本發明更提供了一種芯片通用批鍵合方法,應用於如上所述的芯片通用批鍵合裝置中,包括如下步驟:
S1:將芯片113從藍膜片取放區110傳輸並交接至芯片拾取及分離區210,具體地,第一機械手112抓取載片台111上的載片放置於分離台211;
S2:多個芯片113在芯片拾取及分離區210內被拾取並利用芯片載板傳輸裝置300同時傳遞至芯片對準及精調區220進行位置精度調整;
S3:位置調整完成後,利用芯片載板傳輸裝置300將多個芯片113傳遞至芯片批鍵合區230完成批量鍵合。
本發明採用芯片批鍵合方式,平衡了芯片拾取、芯片位置精調和芯片鍵合的時間,使鍵合設備在保證鍵合精度的同時提高了產率。
較佳地,在步驟S2中,當要求芯片113上的標記114朝下鍵合時,芯片拾取及分離區210內的翻轉手212拾取芯片113,翻轉後將芯片113交接至芯片載板傳輸裝置300,調整精度後送至承載台231上批鍵合;當要求芯片113上的標記114朝上鍵合時,芯片拾取及分離區210內的取放裝置213拾取芯片113,經由芯片對準及精調區220調整精度後交接至芯片載板傳輸裝置300,直接送至承載台231上批鍵合。本發明可通用於die-up和die-down兩種貼片方式,拓展了應用範圍。
實施例二
請重點參考第8圖至第10圖,本實施例相較於實施例一具有如下區別:移位裝置215上安裝有多個升降裝置216,每個升降裝置216下方分別安裝有取放手217,也就是說,移位裝置215在支架214上的一次移動,可同時帶動多個芯片113移動,提高工作效率,當然,為了配合多個取放手217的同時取放,更可在芯片對準及精調區220內設置多個精調機械手222(如第8圖所示),進一步提高工作效率。
綜上所述,本發明提供的芯片通用批鍵合裝置及方法,該裝置包括物料取放區和傳輸工作區,其中:物料取放區包括用於提供芯片113的藍膜片取放區110和用於存放基底123的基底取放區120,藍膜片取放區110和基底取放區120分設於傳輸工作區的兩端;傳輸工作區沿從藍膜片取放區110至基底取放區120的方向依次包括芯片拾取及分離區210、芯片對準及精調區220、以及芯片批鍵合區230;傳輸工作區內設有芯片載板傳輸裝置300,芯片載板傳輸裝置300貫穿傳輸工作區,在芯片拾取及分離區210、芯片對準及精調區220、以及芯片批鍵合區230之間移動送料。本發明通過兼容性設計,使裝置通用於兩種貼片方式,拓展了設備的應用範圍;另外,模組化的設計可以根據需求進行配置,增加了設備的市場梯度。
顯然,本領域具通常知識者可以對發明進行各種改動和變型而不脫離本發明的精神和範圍。這樣,倘若本發明的這些修改和變型屬於本發明申請專利範圍及其等同技術的範圍之內,則本發明也意圖包括這些改動和變型在內。
1‧‧‧載片
110‧‧‧藍膜片取放區
111‧‧‧載片台
112‧‧‧第一機械手
113‧‧‧芯片
114‧‧‧標記
120‧‧‧基底取放區
121‧‧‧基片庫
122‧‧‧第二機械手
123‧‧‧基底
2‧‧‧芯片
210‧‧‧芯片拾取及分離區
211‧‧‧分離台
212‧‧‧翻轉手
213‧‧‧取放裝置
214‧‧‧支架
215‧‧‧移位裝置
216‧‧‧升降裝置
217‧‧‧取放手
218‧‧‧第一對準系統
219‧‧‧頂出機構
220‧‧‧芯片對準及精調區
221‧‧‧第二運動台
222‧‧‧精調機械手
223‧‧‧第二對準系統
230‧‧‧芯片批鍵合區
231‧‧‧承載台
232‧‧‧第三對準系統
3‧‧‧標記
300‧‧‧芯片載板傳輸裝置
310‧‧‧第一運動台
320‧‧‧加壓裝置
330‧‧‧載板
4‧‧‧基底
5‧‧‧載板
第1圖為倒裝芯片批鍵合的製程流程示意圖。 第2a圖和第2b圖分別為擴散型鍵合製程的兩種貼片方法的示意圖。 第3圖為本發明實施例一中芯片通用批鍵合裝置的主視圖。 第4圖為本發明實施例一中芯片通用批鍵合裝置的俯視圖。 第5圖為本發明實施例一中芯片載板傳輸裝置的結構示意圖。 第6圖為本發明實施例一中取放裝置的結構示意圖。 第7圖為本發明實施例一中芯片通用批鍵合方法的流程示意圖。 第8圖為本發明實施例二中芯片通用批鍵合裝置的主視圖。 第9圖為本發明實施例二中芯片通用批鍵合裝置的俯視圖。 第10圖為本發明實施例二中取放裝置的結構示意圖。

Claims (13)

  1. 一種芯片通用批鍵合裝置,其包括物料取放區和傳輸工作區,其中: 該物料取放區包括用於提供芯片的藍膜片取放區和用於存放基底的基底取放區,該藍膜片取放區和基底取放區分設於該傳輸工作區的兩端; 該傳輸工作區沿從該藍膜片取放區至基底取放區的方向依次包括芯片拾取及分離區、芯片對準及精調區、以及芯片批鍵合區; 該傳輸工作區內設有芯片載板傳輸裝置,該芯片載板傳輸裝置貫穿該傳輸工作區,在該芯片拾取及分離區、芯片對準及精調區、以及芯片批鍵合區之間移動送料。
  2. 如申請專利範圍第1項所述之芯片通用批鍵合裝置,其中該芯片載板傳輸裝置包括第一運動台、安裝於該第一運動台上的加壓裝置以及安裝於該加壓裝置上的載板。
  3. 如申請專利範圍第2項所述之芯片通用批鍵合裝置,其中該芯片拾取及分離區內設有分離台、翻轉手以及取放裝置,該芯片對準及精調區內設有精調單元,該芯片批鍵合區內設有承載台。
  4. 如申請專利範圍第3項所述之芯片通用批鍵合裝置,其中該取放裝置包括支架,該支架上安裝有可水平移動的移位裝置,該移位裝置上安裝有可垂向移動的升降裝置,該升降裝置上固定安裝有取放手。
  5. 如申請專利範圍第4項所述之芯片通用批鍵合裝置,其中該升降裝置上安裝有第一對準系統。
  6. 如申請專利範圍第5項所述之芯片通用批鍵合裝置,其中該精調單元包括第二運動台、以及安裝於該第二運動台上的精調機械手和第二對準系統。
  7. 如申請專利範圍第6項所述之芯片通用批鍵合裝置,其中該承載台上安裝有第三對準系統。
  8. 如申請專利範圍第4項所述之芯片通用批鍵合裝置,其中該移位裝置上安裝有多個升降裝置,每個該升降裝置下方分別安裝有該取放手。
  9. 如申請專利範圍第3項所述之芯片通用批鍵合裝置,其中該藍膜片取放區內設有載片台和第一機械手,該第一機械手拾取該載片台上的芯片移送至該分離台上。
  10. 如申請專利範圍第3項所述之芯片通用批鍵合裝置,其中該基底取放區內設有基片庫和第二機械手,該第二機械手拾取該承載台上鍵合完成後的基底,並移送至該基片庫。
  11. 如申請專利範圍第3項所述之芯片通用批鍵合裝置,其中該分離台下方設有頂出機構,用於將放置於該分離台上的芯片頂起。
  12. 一種芯片通用批鍵合方法,應用於如申請專利範圍第1項所述之芯片通用批鍵合裝置中,其包括如下步驟: S1:將芯片從該藍膜片取放區傳輸並交接至該芯片拾取及分離區; S2:多個芯片在該芯片拾取及分離區內被拾取並利用芯片載板傳輸裝置同時傳遞至該芯片對準及精調區進行位置精度調整; S3:位置調整完成後的該多個芯片利用該芯片載板傳輸裝置傳遞至該芯片批鍵合區完成批量鍵合。
  13. 如申請專利範圍第12項所述之芯片通用批鍵合方法,其中在所述步驟S2中,當要求芯片上的標記朝下鍵合時,該芯片拾取及分離區內的翻轉手拾取芯片,翻轉後將該芯片交接至該芯片載板傳輸裝置;當要求芯片上的標記朝上鍵合時,該芯片拾取及分離區內的取放裝置拾取芯片,經由該芯片對準及精調區調整精度後交接至該芯片載板傳輸裝置。
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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2664198Y (zh) * 2003-08-18 2004-12-15 威盛电子股份有限公司 多芯片封装结构

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3504166B2 (ja) * 1998-11-25 2004-03-08 株式会社新川 フリップチップボンディング装置
JP4831091B2 (ja) 2008-02-21 2011-12-07 パナソニック株式会社 ダイボンディング装置及びダイボンディング方法
CN201522998U (zh) * 2009-11-06 2010-07-07 华中科技大学 一种芯片拾取与翻转装置
CN103367208B (zh) * 2013-07-02 2015-10-28 华中科技大学 一种用于高密度芯片的倒装键合平台
KR101503151B1 (ko) * 2013-08-23 2015-03-16 세메스 주식회사 다이 본딩 장치 및 이를 이용한 다이 본딩 방법
JP2015130414A (ja) 2014-01-08 2015-07-16 東レエンジニアリング株式会社 自動ボンディング装置
KR101614204B1 (ko) * 2014-04-29 2016-04-20 세메스 주식회사 다이 픽업 유닛, 이를 포함하는 다이 본딩 장치 및 방법
SE538792C2 (en) * 2015-02-06 2016-11-29 Stora Enso Oyj Apparatus and method for component assembly
US10743447B2 (en) * 2015-02-26 2020-08-11 Fuji Corporation Component mounting machine
CN107134418B (zh) 2016-02-29 2020-02-18 上海微电子装备(集团)股份有限公司 倒装芯片键合装置及键合方法
CN107134427B (zh) * 2016-02-29 2020-05-01 上海微电子装备(集团)股份有限公司 芯片键合装置及方法
CN107134422A (zh) 2016-02-29 2017-09-05 上海微电子装备(集团)股份有限公司 芯片键合装置及方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2664198Y (zh) * 2003-08-18 2004-12-15 威盛电子股份有限公司 多芯片封装结构

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CN107887294B (zh) 2020-04-10

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