CN107818950B - 半导体装置 - Google Patents

半导体装置 Download PDF

Info

Publication number
CN107818950B
CN107818950B CN201710822538.4A CN201710822538A CN107818950B CN 107818950 B CN107818950 B CN 107818950B CN 201710822538 A CN201710822538 A CN 201710822538A CN 107818950 B CN107818950 B CN 107818950B
Authority
CN
China
Prior art keywords
insulating plate
semiconductor device
case
circuit pattern
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201710822538.4A
Other languages
English (en)
Other versions
CN107818950A (zh
Inventor
小西康雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of CN107818950A publication Critical patent/CN107818950A/zh
Application granted granted Critical
Publication of CN107818950B publication Critical patent/CN107818950B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3185—Partial encapsulation or coating the coating covering also the sidewalls of the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10254—Diamond [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/1026—Compound semiconductors
    • H01L2924/1027—IV
    • H01L2924/10272—Silicon Carbide [SiC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/1026—Compound semiconductors
    • H01L2924/1032—III-V
    • H01L2924/1033—Gallium nitride [GaN]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/171—Frame
    • H01L2924/173—Connection portion, e.g. seal
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Materials Engineering (AREA)
  • Dispersion Chemistry (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

得到一种半导体装置，其能够省略粘结材料的涂敷工序和固化工序，缩短制造时间。在绝缘板(2)之上设置有电路图案(3)。半导体元件(4)与电路图案(3)接合。壳体(6)以包围电路图案(3)及半导体元件(4)的方式设置于绝缘板(2)之上。壳体(6)没有与绝缘板(2)粘结。硬化后的树脂(11)设置于壳体(6)内，对电路图案(3)及半导体元件(4)进行封装。

Description

半导体装置
技术领域
本发明涉及通过树脂对壳体内进行封装的半导体装置。
背景技术
半导体装置被利用于从发电及输电涵盖至能量的高效利用及再生为止的各种情况。就半导体装置而言，绝缘板之上的电路图案与半导体元件接合，以将它们包围的方式在绝缘板之上设置有壳体，壳体内通过树脂进行封装(例如，参照专利文献1)。树脂以液化的状态注入至壳体内，因此在直至树脂硬化为止的期间，需要防止树脂从绝缘板与壳体的间隙泄漏。
专利文献1：日本特开2000-323593号公报
当前，通过粘结材料将绝缘板与壳体粘结，封堵壳体树脂与绝缘板的间隙而防止漏液。因此，在注入树脂之前，需要将粘结材料以环状涂敷于绝缘板的整个外周部而固化。因此，存在粘结材料的涂敷工序和固化工序需要时间，制造时间变长的问题。
发明内容
本发明就是为了解决上述课题而提出的，其目的在于得到一种半导体装置，该半导体装置能够省略粘结材料的涂敷工序和固化工序，缩短制造时间。
本发明涉及的半导体装置的特征在于，具有：绝缘板；电路图案，其设置于所述绝缘板之上；半导体元件，其与所述电路图案接合；壳体，其以包围所述电路图案及所述半导体元件的方式设置于所述绝缘板之上，没有与所述绝缘板粘结；以及硬化后的树脂，其设置于所述壳体内，对所述电路图案及所述半导体元件进行封装。
发明的效果
在本发明中，壳体没有与绝缘板粘结，装置整体的固定由硬化后的树脂实现。因此，能够省略粘结材料的涂敷工序和固化工序，缩短制造时间。
附图说明
图1是表示本发明的实施方式1涉及的半导体装置的剖视图。
图2是表示本发明的实施方式1涉及的半导体装置的壳体的仰视图。
图3是表示本发明的实施方式2涉及的半导体装置的剖视图。
图4是表示本发明的实施方式2涉及的半导体装置的壳体的仰视图。
图5是表示本发明的实施方式3涉及的半导体装置的剖视图。
图6是表示本发明的实施方式4涉及的半导体装置的剖视图。
图7是表示本发明的实施方式5涉及的半导体装置的剖视图。
图8是表示本发明的实施方式6涉及的半导体装置的剖视图。
标号的说明
2绝缘板，3电路图案，4半导体元件，6壳体，11树脂，12原材料，13凹部，14、16、18弹性部件，15、17凸部
具体实施方式
参照附图，对本发明的实施方式涉及的半导体装置进行说明。对相同或对应的结构要素标注相同的标号，有时省略重复的说明。
实施方式1.
图1是表示本发明的实施方式1涉及的半导体装置的剖视图。图2是表示本发明的实施方式1涉及的半导体装置的壳体的仰视图。在散热板1之上设置有绝缘板2，在绝缘板2之上设置有电路图案3。散热板1、绝缘板2与电路图案3成为一体。
电流开关元件等半导体元件4通过焊料5与电路图案3接合。壳体6以包围电路图案3及半导体元件4的方式设置于绝缘板2之上。但是，壳体6没有与绝缘板2粘结，也没有进行通过螺钉实现的固定等。电极7、8被装配于或内置于壳体6中。半导体元件4的上表面电极通过导线9与电极7连接，电路图案3通过导线10与电极8连接。
环氧树脂类的树脂11设置于壳体6内，对电路图案3及半导体元件4等进行封装。没有硬化的原材料12以环状设置于绝缘板2的上表面与壳体6的下表面之间的间隙，与绝缘板2的上表面及壳体6的下表面密接。原材料12例如是聚酯类热塑性弹性体等，不仅在制造中、在制造后也不硬化，是具有比未硬化的树脂11高的粘度的原材料。
在本实施方式中，壳体6没有与绝缘板2粘结，装置整体的固定由硬化后的树脂11实现。因此，能够省略粘结材料的涂敷工序和固化工序，缩短制造时间。另外，在直至树脂11硬化为止的期间，通过原材料12，能够防止未硬化的树脂11从绝缘板2与壳体6的间隙漏出。
实施方式2.
图3是表示本发明的实施方式2涉及的半导体装置的剖视图。图4是表示本发明的实施方式2涉及的半导体装置的壳体的仰视图。在本实施方式中，取代实施方式1的原材料12，在壳体6的下表面以环状设置有凹部13。橡胶等弹性部件14以环状设置于壳体6的凹部13，与绝缘板2的上表面及壳体6的下表面密接。没有被压入至凹部13的状态下的弹性部件14的自然长度大于凹部13的深度。其他的结构与实施方式1相同。
在直至树脂11硬化为止的期间，由于半导体装置的自身重量或外部应力，弹性部件14与绝缘板2抵接。由此，能够消除绝缘板2与弹性部件14之间的间隙，可靠地确保气密性，因此能够防止未硬化的树脂11漏出。另外，与实施方式1相同地，壳体6没有与绝缘板2粘结，装置整体的固定由硬化后的树脂11实现。因此，能够省略粘结材料的涂敷工序和固化工序，缩短制造时间。
此外，在直至树脂11硬化为止的期间，优选通过夹具等按压散热板1和壳体6。另外，也可以将例如原材料及高度与电路图案3相同的凸部在弹性部件14的下方设置于绝缘板2而作为抵接的辅助。
实施方式3.
图5是表示本发明的实施方式3涉及的半导体装置的剖视图。在本实施方式中，取代实施方式1的原材料12，使在绝缘板2的上表面以环状设置的凸部15嵌合于在壳体6的下表面以环状设置的凹部13。凹部13及凸部15可以是多个，也可以是1个。其他结构与实施方式1相同。
在直至树脂11硬化为止的期间，能够通过嵌合后的凹部13及凸部15可靠地确保气密性。因此，能够防止未硬化的树脂11漏出。另外，与实施方式1相同地，壳体6没有与绝缘板2粘结，装置整体的固定是由硬化后的树脂11实现的。因此，能够省略粘结材料的涂敷工序和固化工序，缩短制造时间。
另外，凸部15的原材料及高度与电路图案3相同。由此，能够使用与电路图案3相同的工艺形成凸部15。另外，凹部13的深度大于或等于凸部15的高度。由此，能够消除由制造公差导致的嵌合故障。
实施方式4.
图6是表示本发明的实施方式4涉及的半导体装置的剖视图。在实施方式3的结构的基础上，在凹部13内，在凸部15之上设置有弹性部件16。弹性部件16例如是树脂质的阻绝层。通过设置弹性部件16，从而与实施方式3相比，能够提高防止树脂11泄漏的效果。由此，能够降低树脂11的粘度，因此半导体装置的部件构思的范围变广。其他结构及效果与实施方式3相同。
实施方式5.
图7是表示本发明的实施方式5涉及的半导体装置的剖视图。在本实施方式中，取代实施方式1的原材料12，使在壳体6的下表面以环状设置的凸部17咬入至具有弹性的树脂类等的绝缘板2。凸部17可以是多个，也可以是1个。也可以是，凸部17的剖面呈三角形状，前端倒圆角。其他结构与实施方式1相同。
在直至树脂11硬化为止的期间，通过凸部17咬入至绝缘板2，从而能够可靠地确保气密性。因此，能够防止未硬化的树脂11漏出。另外，与实施方式1相同地，壳体6没有与绝缘板2粘结，装置整体的固定是由硬化后的树脂11实现的。因此，能够省略粘结材料的涂敷工序和固化工序，缩短制造时间。
实施方式6.
图8是表示本发明的实施方式6涉及的半导体装置的剖视图。在本实施方式中，取代实施方式1的原材料12，在绝缘板2的上表面与壳体6的下表面之间的间隙以环状设置有例如树脂质的阻绝墨(resist ink)等弹性部件18。在壳体6的下表面设置的凸部17咬入至弹性部件18。凸部17可以是多个，也可以是1个。也可以是，凸部17的剖面呈三角形状，前端倒圆角。其他结构与实施方式1相同。
在直至树脂11硬化为止的期间，通过弹性部件18，能够防止未硬化的树脂11从绝缘板2与壳体6的间隙漏出。并且，通过凸部17咬入至绝缘板2，从而能够进一步提高防止漏液的效果，能够拓宽树脂11的粘度的选择范围。但是，如果是能够维持可防止漏液的厚度和弹力的弹性部件18，则也可以不需要凸部17。
另外，与实施方式1相同地，壳体6没有与绝缘板2粘结，装置整体的固定是由硬化后的树脂11实现的。因此，能够省略粘结材料的涂敷工序和固化工序，缩短制造时间。
此外，在实施方式1至6中，半导体元件4不限于由硅形成，也可以由带隙比硅宽的宽带隙半导体形成。宽带隙半导体例如是碳化硅、氮化镓类材料或者金刚石。对于这样的由宽带隙半导体形成的功率半导体元件，耐电压性和容许电流密度高，因此能够小型化。通过使用该小型化的元件，从而组装有该元件的半导体装置也能够小型化。另外，元件的耐热性高，因此能够将散热器的散热鳍片小型化，能够将水冷部空冷化，因此能够将半导体装置进一步小型化。另外，元件的电力损耗低且高效率，因此能够将半导体装置高效化。

Claims (12)

1.一种半导体装置，其特征在于，
具有：
绝缘板；
电路图案，其设置于所述绝缘板之上；
半导体元件，其与所述电路图案接合；
壳体，其以包围所述电路图案及所述半导体元件的方式设置于所述绝缘板之上，没有与所述绝缘板粘结；以及
硬化后的树脂，其设置于所述壳体内，对所述电路图案及所述半导体元件进行封装。
2.根据权利要求1所述的半导体装置，其特征在于，
还具有未硬化的原材料，该原材料以环状设置于所述绝缘板的上表面与所述壳体的下表面之间的间隙，与所述绝缘板的所述上表面及所述壳体的所述下表面密接，具有比未硬化的所述树脂高的粘度。
3.根据权利要求1所述的半导体装置，其特征在于，
还具有弹性部件，该弹性部件设置于在所述壳体的下表面以环状设置的凹部内，与所述绝缘板的上表面及所述壳体的所述下表面密接。
4.根据权利要求3所述的半导体装置，其特征在于，
没有被压入至所述凹部的状态下的所述弹性部件的自然长度大于所述凹部的深度。
5.根据权利要求1所述的半导体装置，其特征在于，
在所述绝缘板的上表面以环状设置的凸部嵌合于在所述壳体的下表面以环状设置的凹部。
6.根据权利要求5所述的半导体装置，其特征在于，
所述凸部的原材料及高度与所述电路图案相同。
7.根据权利要求5或6所述的半导体装置，其特征在于，
所述凹部的深度大于或等于所述凸部的高度。
8.根据权利要求5或6所述的半导体装置，其特征在于，
还具有弹性部件，该弹性部件在所述凹部内设置于所述凸部之上。
9.根据权利要求1所述的半导体装置，其特征在于，
在所述壳体的下表面以环状设置的凸部咬入至具有弹性的所述绝缘板。
10.根据权利要求1所述的半导体装置，其特征在于，
还具有弹性部件，该弹性部件以环状设置于所述绝缘板的上表面与所述壳体的下表面之间的间隙。
11.根据权利要求10所述的半导体装置，其特征在于，
在所述壳体的所述下表面以环状设置的凸部咬入至所述弹性部件。
12.根据权利要求1至6中任一项所述的半导体装置，其特征在于，
所述半导体元件由宽带隙半导体形成。
CN201710822538.4A 2016-09-13 2017-09-13 半导体装置 Active CN107818950B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2016178595A JP6627698B2 (ja) 2016-09-13 2016-09-13 半導体装置
JP2016-178595 2016-09-13

Publications (2)

Publication Number Publication Date
CN107818950A CN107818950A (zh) 2018-03-20
CN107818950B true CN107818950B (zh) 2020-06-19

Family

ID=61246950

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710822538.4A Active CN107818950B (zh) 2016-09-13 2017-09-13 半导体装置

Country Status (4)

Country Link
US (1) US10170383B2 (zh)
JP (1) JP6627698B2 (zh)
CN (1) CN107818950B (zh)
DE (1) DE102017214326B4 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6895126B2 (ja) * 2018-03-27 2021-06-30 三菱電機株式会社 半導体パッケージ

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201352557Y (zh) * 2009-02-13 2009-11-25 亚洲光学股份有限公司 影像感测模块
CN103250242A (zh) * 2010-11-25 2013-08-14 三菱电机株式会社 半导体装置以及半导体装置的制造方法
CN105633023A (zh) * 2014-11-21 2016-06-01 富士电机株式会社 半导体装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58184743A (ja) * 1982-04-23 1983-10-28 Hitachi Ltd モ−ルド型半導体装置
JPS61194754A (ja) * 1985-02-22 1986-08-29 Toshiba Corp 半導体装置
JPH11145343A (ja) * 1997-11-10 1999-05-28 Hitachi Ltd 樹脂封止型半導体装置及びその製造方法
JP2000323593A (ja) 1999-05-06 2000-11-24 Yazaki Corp 半導体装置
JP2004103846A (ja) * 2002-09-10 2004-04-02 Mitsubishi Electric Corp 電力用半導体装置
JP2014203978A (ja) * 2013-04-05 2014-10-27 三菱電機株式会社 パワーモジュール
JP6215577B2 (ja) * 2013-05-31 2017-10-18 株式会社ヨコオ 半導体パッケージ容器、半導体装置、電子機器
JP6057926B2 (ja) * 2014-01-09 2017-01-11 三菱電機株式会社 半導体装置
JP2016178595A (ja) 2015-03-23 2016-10-06 シャープ株式会社 受信装置、受信方法、及びプログラム

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201352557Y (zh) * 2009-02-13 2009-11-25 亚洲光学股份有限公司 影像感测模块
CN103250242A (zh) * 2010-11-25 2013-08-14 三菱电机株式会社 半导体装置以及半导体装置的制造方法
CN105633023A (zh) * 2014-11-21 2016-06-01 富士电机株式会社 半导体装置

Also Published As

Publication number Publication date
JP2018046103A (ja) 2018-03-22
US20180076104A1 (en) 2018-03-15
JP6627698B2 (ja) 2020-01-08
DE102017214326B4 (de) 2023-11-30
CN107818950A (zh) 2018-03-20
DE102017214326A1 (de) 2018-03-15
US10170383B2 (en) 2019-01-01

Similar Documents

Publication Publication Date Title
US7868436B2 (en) Semiconductor device
WO2012070261A1 (ja) 半導体装置および半導体装置の製造方法
US10748830B2 (en) Semiconductor device
US20130056883A1 (en) Semiconductor device and method of manufacturing the same
KR101398404B1 (ko) 기계적으로 분리된 리드 부착물을 갖는 플라스틱오버몰딩된 패키지들
CN109659284B (zh) 半导体装置
US9524929B2 (en) Semiconductor module package and method of manufacturing the same
WO2007129486A1 (ja) 半導体装置およびその製造方法
JP6057926B2 (ja) 半導体装置
JP6057927B2 (ja) 半導体装置
JP2015041716A (ja) 電力用半導体装置および電力用半導体装置の製造方法
US20140001613A1 (en) Semiconductor package
CN111341731A (zh) 半导体装置
US20200194324A1 (en) Power semiconductor device and method of manufacturing power semiconductor device
CN107818950B (zh) 半导体装置
JP2010050395A (ja) 半導体装置およびその製造方法
JP6486579B1 (ja) 半導体装置
US10937708B2 (en) Power module and method of manufacturing the same
JP5368492B2 (ja) パワー半導体装置
JP2009026960A (ja) 半導体装置
CN110970372A (zh) 包括具有嵌入式半导体管芯的间隔件的半导体器件组件
US11037845B2 (en) Semiconductor device and manufacturing method thereof
CN108735614B (zh) 半导体装置及半导体装置的制造方法
JP2010219385A (ja) 半導体装置
JP6743439B2 (ja) 半導体装置および半導体装置の製造方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant