CN107749411B - 双面SiP的三维封装结构 - Google Patents

双面SiP的三维封装结构 Download PDF

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CN107749411B
CN107749411B CN201710874462.XA CN201710874462A CN107749411B CN 107749411 B CN107749411 B CN 107749411B CN 201710874462 A CN201710874462 A CN 201710874462A CN 107749411 B CN107749411 B CN 107749411B
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passive device
conductive component
chip
packaging structure
fan
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林耀剑
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JCET Group Co Ltd
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Abstract

本发明涉及一种双面SiP的三维封装结构，它包括核心转接板（1），所述核心转接板（1）正面贴装有扇出型晶圆级封装结构（2）和第一被动元件（3），所述扇出型晶圆级封装结构（2）和第一被动元件（3）外围设置有第一3D导电部件（4），第一3D导电部件（4）正面露出于第一塑封料（5），所述所述核心转接板（1）背面贴装有芯片（7）和第二被动元件（8），所述芯片（7）和第二被动元件（8）外围设置有第二3D导电部件（6），所述第二3D导电部件（6）背面露出于第二塑封料（9）。本发明能够使用预制的窄中心距3D导电部件成为堆叠封装的支撑结构，可以降低封装模组的尺寸高度，提高封装模组的高频性能以及高度设计和翘曲控制的灵活性。

Description

双面SiP的三维封装结构
技术领域
本发明涉及一种双面SiP的三维封装结构，属于半导体封装技术领域。
背景技术
根据半导体技术的发展，电子器件变得微型化并且越来越轻以满足用户的需求，因此，用于实现与单个封装相同或不同的半导体芯片的多芯片封装技术得到增强。与半导体芯片所实现的封装相比，多芯片封装就封装大小或重量以及安装过程而言是有利的，具体地讲，多芯片封装主要应用于要求微型化和减重的便携式通信终端。
在这些多芯片封装中，封装基板堆叠在另一个封装基板上的层叠型封装被称为堆叠封装（package on package，以下称为“PoP” ）。由于随着半导体封装技术的发展，半导体封装的容量已变得更高，厚度变得更薄并且尺寸变得更小，堆叠的芯片数量最近已经增大。
常规的层叠封装采用焊料球印刷工艺和回流工艺，问题在于，当增大焊料球的尺寸或高度以便增大封装之间的距离时，焊料球会产生开裂或破碎。
另外随着封装制程中的高密度线路、多种封装材料的使用、以及各种芯片以及功能器件的使用，使得整个封装体很复杂，各种材质的搭配不易平衡，容易导致整体的翘曲变形。
发明内容
本发明所要解决的技术问题是针对上述现有技术提供一种双面SiP的三维封装结构，它能够使用预制的窄中心距3D导电部件成为堆叠封装的支撑结构，模组中使用薄型晶圆级封装和其他器件的组合，可以降低封装模组的尺寸高度，提高封装模组的高频性能以及高度设计和翘曲控制的灵活性。
本发明解决上述问题所采用的技术方案为：、一种双面SiP的三维封装结构，它包括核心转接板，所述核心转接板正面贴装有扇出型晶圆级封装结构和第一被动元件，所述扇出型晶圆级封装结构和第一被动元件外围设置有第一3D导电部件，所述扇出型晶圆级封装结构、第一被动元件和第一3D导电部件外包封有第一塑封料，第一3D导电部件正面露出于第一塑封料，所述所述核心转接板背面贴装有芯片和第二被动元件，所述芯片和第二被动元件外围设置有第二3D导电部件，所述芯片、第二被动元件和第二3D导电部件外包封有第二塑封料，所述第二3D导电部件背面露出于第二塑封料，所述第二3D导电部件背面设置有第一焊球。
所述扇出型晶圆级封装结构和第一被动元件位于同一水平线上，所述芯片和第二被动元件位于同一水平线上，所述扇出型晶圆级封装结构和第二被动元件位于同一垂直线上，所述第一被动元件和芯片至少有一部分位于同一垂直线上。
所述核心转接板包括转接板最外介电层与转接板内部介电层，所述转接板最外介电层比转接板内部介电层具有低的CTE和高的E。
所述第一3D导电部件包括上线路层和下线路层，所述上线路层和下线路层之间通过中间铜柱相连接，所述上线路层、下线路层和中间铜柱外包覆有绝缘材料，所述上线路层和下线路层露出于绝缘材料。
所述中间铜柱沿竖直方向开设有通孔，所述通孔内填充有树脂或复合材料。
所述中间铜柱沿竖直方向开设有通槽，所述通槽内填充有树脂或复合材料。
一种双面SiP的三维封装结构，它包括第一基板和核心转接板，所述第一基板正面贴装有芯片和第二被动元件，所述芯片和第二被动元件外围设置有第二3D导电部件，所述芯片、第二被动元件和第二3D导电部件外包封有第二塑封料，所述核心转接板正面贴装有扇出型晶圆级封装结构和第一被动元件，所述扇出型晶圆级封装结构和第一被动元件外围设置有第一3D导电部件，所述扇出型晶圆级封装结构、第一被动元件和第一3D导电部件外包封有第一塑封料，所述芯片和第二3D导电部件正面通过第一焊球与核心转接板背面相连接，所述核心转接板与第二塑封料之间设置有底部填充胶，所述第一基板背面设置有第二焊球。
一种双面SiP的三维封装结构，它包括核心转接板，所述核心转接板背面和正面分别通过底部填充胶贴装有第一模组和第二模组，所述第一模组包括第一基板，所述第一基板正面贴装有芯片和第二被动元件，所述芯片和第二被动元件外围设置有第二3D导电部件，所述芯片、第二被动元件和第二3D导电部件外包封有第二塑封料，所述第二模组包括第二基板，所述第二基板背面贴装有扇出型晶圆级封装结构和第一被动元件，所述扇出型晶圆级封装结构和第一被动元件外围设置有第一3D导电部件，所述扇出型晶圆级封装结构、第一被动元件和第一3D导电部件外包封有第一塑封料，所述扇出型晶圆级封装结构和第一被动元件背面通过第一焊球与核心转接板正面相连接，所述芯片和第二被动元件正面通过第一焊球与核心转接板背面相连接。
所述第二基板正面贴装控制芯片或功能器件。
与现有技术相比，本发明的优点在于：
1、封装模组中使用晶圆级或者面板级制作的重布线核心转接板以及内部使用的晶圆级封装结构可以降低整体封装模组的高度和尺寸；
2、主芯片、其他芯片（如MEMS、控制芯片、集成无源器件）采用晶圆级封装结构，使用低损耗的绝缘材料，可以提高高频性能；另外晶圆级封装结构可以单独另外制作，可以在测试合格之后应用于本模组封装中，可防止多芯片单独植入SiP模组却在最终测试不合格，可以减少芯片损失，且保证最终产品的高良率；
3、可以提高整体封装模组的高度设计的灵活性和翘曲控制的稳定性：上下部分的3D导电部件是预制单独设计的，可以有全金属柱和金属柱中填充树脂的组合，或金属平行侧壁中填充复合材料的组合；具有灵活的CTE设计可以来控制整体结构的翘曲，其高度设计也可以进行灵活的设计；扇出型晶圆级封装也可以通过调整塑封的厚度和凸块设计的高度来调整翘曲度。同时金属平行侧壁中填充复合材料的组合可以提供高深度/间距比的3D低成本导电部件。
附图说明
图1为本发明一种双面SiP的三维封装结构实施例1的示意图。
图2为本发明一种双面SiP的三维封装结构实施例2的示意图。
图3为图1中第一3D导电部件的结构示意图。
图4为图1中第一3D导电部件另一实施例的结构示意图。
图5为图1中第一3D导电部件采用金属平行侧壁中填充复合材料组合的实施例的结构示意图。
图6为本发明一种双面SiP的三维封装结构实施例3的示意图。
图7为本发明一种双面SiP的三维封装结构实施例4的示意图。
其中：
核心转接板1
转接板最外介电层1.1
转接板内部介电层1.2
扇出型晶圆级封装结构2
第一被动元件3
第一3D导电部件4
上线路层4.1
中间铜柱4.2
下线路层4.3
绝缘材料4.4
树脂或复合材料4.5
第一塑封料5
第二3D导电部件6
芯片7
第二被动元件8
第二塑封料9
第一焊球10
第一基板11
第二焊球12
底部填充胶13
第二基板14。
具体实施方式
以下结合附图实施例对本发明作进一步详细描述。
实施例1：
参见图1，本实施例中的一种双面SiP的三维封装结构，它包括核心转接板1，所述核心转接板1正面贴装有扇出型晶圆级封装结构2和第一被动元件3，所述扇出型晶圆级封装结构2和第一被动元件3外围设置有第一3D导电部件4，所述扇出型晶圆级封装结构2、第一被动元件3和第一3D导电部件4外包封有第一塑封料5，第一3D导电部件4正面露出于第一塑封料5，所述所述核心转接板1背面贴装有芯片7和第二被动元件8，所述芯片7和第二被动元件8外围设置有第二3D导电部件6，所述芯片7、第二被动元件8和第二3D导电部件6外包封有第二塑封料9，所述第二3D导电部件6背面露出于第二塑封料9，所述第二3D导电部件6背面设置有第一焊球10；
所述扇出型晶圆级封装结构2和第一被动元件3位于同一水平线上，所述芯片7和第二被动元件8位于同一水平线上，所述扇出型晶圆级封装结构2和第二被动元件8位于同一垂直线上，所述第一被动元件3和芯片7至少有一部分位于同一垂直线上，可保证芯片、扇出型晶圆级封装以及被动元件之间最短的信号传输线路，减少传输线路中的损耗，保证信号传输的稳定性；
所述第一导电部件4和第二导电部件6由相同材料、同种工艺制成；
参见图2，所述核心转接板1包括转接板最外介电层1.1 与转接板内部介电层1.2，所述转接板最外介电层1.1与转接板内部介电层1.2的材料结构和性能不同，所述转接板最外介电层1.1比转接板内部介电层1.2具有低的CTE （热膨胀系数）和高的E（扬氏模量），以便与塑封料和埋入的元器件有更接好的界面性能匹配；
参见图3，所述第一3D导电部件4包括上线路层4.1和下线路层4.3，所述上线路层4.1和下线路层4.3之间通过中间铜柱4.2相连接，所述上线路层4.1、下线路层4.3和中间铜柱4.2外包覆有绝缘材料4.4，所述上线路层4.1和下线路层4.3露出于绝缘材料4.4；
参见图4，所述中间铜柱4.2沿竖直方向开设有通孔，所述通孔内填充有树脂或复合材料4.5；
参见图5，所述中间铜柱4.2沿竖直方向开设有通槽，所述通槽内填充有树脂或复合材料4.5。
实施例2：
参见图6，本实施例中的一种双面SiP的三维封装结构，它包括第一基板11和核心转接板1，所述第一基板11正面贴装有芯片7和第二被动元件8，所述芯片7和第二被动元件8外围设置有第二3D导电部件6，所述芯片7、第二被动元件8和第二3D导电部件6外包封有第二塑封料9，所述核心转接板1正面贴装有扇出型晶圆级封装结构2和第一被动元件3，所述扇出型晶圆级封装结构2和第一被动元件3外围设置有第一3D导电部件4，所述扇出型晶圆级封装结构2、第一被动元件3和第一3D导电部件4外包封有第一塑封料5，所述芯片7和第二3D导电部件6正面通过第一焊球10与核心转接板1背面相连接，所述核心转接板1与第二塑封料9之间设置有底部填充胶13，所述第一基板11背面设置有第二焊球12。
实施例3：
参加图7，本实施例中的一种双面SiP的三维封装结构，它包括核心转接板1，所述核心转接板1背面和正面分别通过底部填充胶13贴装有第一模组和第二模组，所述第一模组包括第一基板11，所述第一基板11正面贴装有芯片7和第二被动元件8，所述芯片7和第二被动元件8外围设置有第二3D导电部件6，所述芯片7、第二被动元件8和第二3D导电部件6外包封有第二塑封料9，所述第二模组包括第二基板14，所述第二基板14背面贴装有扇出型晶圆级封装结构2和第一被动元件3，所述扇出型晶圆级封装结构2和第一被动元件3外围设置有第一3D导电部件4，所述扇出型晶圆级封装结构2、第一被动元件3和第一3D导电部件4外包封有第一塑封料5，所述扇出型晶圆级封装结构2和第一被动元件3背面通过第一焊球10与核心转接板1正面相连接，所述芯片7和第二被动元件8正面通过第一焊球10与核心转接板1背面相连接。
所述第二基板14正面可再贴装所需的其他的控制芯片或功能器件。
除上述实施例外，本发明还包括有其他实施方式，凡采用等同变换或者等效替换方式形成的技术方案，均应落入本发明权利要求的保护范围之内。

Claims (8)

1.一种双面SiP的三维封装结构，其特征在于：它包括核心转接板（1），所述核心转接板（1）正面贴装有扇出型晶圆级封装结构（2）和第一被动元件（3），所述扇出型晶圆级封装结构（2）和第一被动元件（3）外围设置有第一3D导电部件（4），所述扇出型晶圆级封装结构（2）、第一被动元件（3）和第一3D导电部件（4）外包封有第一塑封料（5），第一3D导电部件（4）正面露出于第一塑封料（5），所述核心转接板（1）背面贴装有芯片（7）和第二被动元件（8），所述芯片（7）和第二被动元件（8）外围设置有第二3D导电部件（6），所述芯片（7）、第二被动元件（8）和第二3D导电部件（6）外包封有第二塑封料（9），所述第二3D导电部件（6）背面露出于第二塑封料（9），所述第二3D导电部件（6）背面设置有第一焊球（10）；
所述扇出型晶圆级封装结构（2）和第一被动元件（3）位于同一水平线上，所述芯片（7）和第二被动元件（8）位于同一水平线上，所述扇出型晶圆级封装结构（2）和第二被动元件（8）位于同一垂直线上，所述第一被动元件（3）和芯片（7）至少有一部分位于同一垂直线上。
2.根据权利要求1所述的一种双面SiP的三维封装结构，其特征在于：所述核心转接板（1）包括转接板最外介电层（1.1）与转接板内部介电层（1.2），所述转接板最外介电层（1.1）比转接板内部介电层（1.2）具有低的热膨胀系数和高的杨氏模量。
3.根据权利要求1所述的一种双面SiP的三维封装结构，其特征在于：所述第一3D导电部件（4）包括上线路层（4.1）和下线路层（4.3），所述上线路层（4.1）和下线路层（4.3）之间通过中间铜柱（4.2）相连接，所述上线路层（4.1）、下线路层（4.3）和中间铜柱（4.2）外包覆有绝缘材料（4.4），所述上线路层（4.1）和下线路层（4.3）露出于绝缘材料（4.4）。
4.根据权利要求3所述的一种双面SiP的三维封装结构，其特征在于：所述中间铜柱（4.2）沿竖直方向开设有通孔，所述通孔内填充有树脂或复合材料（4.5）。
5.根据权利要求3所述的一种双面SiP的三维封装结构，其特征在于：所述中间铜柱（4.2）沿竖直方向开设有通槽，所述通槽内填充有树脂或复合材料（4.5）。
6.一种双面SiP的三维封装结构，其特征在于：它包括第一基板（11）和核心转接板（1），所述第一基板（11）正面贴装有芯片（7）和第二被动元件（8），所述芯片（7）和第二被动元件（8）外围设置有第二3D导电部件（6），所述芯片（7）、第二被动元件（8）和第二3D导电部件（6）外包封有第二塑封料（9），所述核心转接板（1）正面贴装有扇出型晶圆级封装结构（2）和第一被动元件（3），所述扇出型晶圆级封装结构（2）和第一被动元件（3）外围设置有第一3D导电部件（4），所述扇出型晶圆级封装结构（2）、第一被动元件（3）和第一3D导电部件（4）外包封有第一塑封料（5），所述芯片（7）和第二3D导电部件（6）正面通过第一焊球（10）与核心转接板（1）背面相连接，所述核心转接板（1）与第二塑封料（9）之间设置有底部填充胶（13），所述第一基板（11）背面设置有第二焊球（12）。
7.一种双面SiP的三维封装结构，其特征在于：它包括核心转接板（1），所述核心转接板（1）背面和正面分别通过底部填充胶（13）贴装有第一模组和第二模组，所述第一模组包括第一基板（11），所述第一基板（11）正面贴装有芯片（7）和第二被动元件（8），所述芯片（7）和第二被动元件（8）外围设置有第二3D导电部件（6），所述芯片（7）、第二被动元件（8）和第二3D导电部件（6）外包封有第二塑封料（9），所述第二模组包括第二基板（14），所述第二基板（14）背面贴装有扇出型晶圆级封装结构（2）和第一被动元件（3），所述扇出型晶圆级封装结构（2）和第一被动元件（3）外围设置有第一3D导电部件（4），所述扇出型晶圆级封装结构（2）、第一被动元件（3）和第一3D导电部件（4）外包封有第一塑封料（5），所述扇出型晶圆级封装结构（2）和第一被动元件（3）背面通过第一焊球（10）与核心转接板（1）正面相连接，所述芯片（7）和第二被动元件（8）正面通过第一焊球（10）与核心转接板（1）背面相连接。
8.根据权利要求7所述的一种双面SiP的三维封装结构，其特征在于：所述第二基板（14）正面贴装控制芯片或功能器件。
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