CN112234026A - 一种3d芯片封装 - Google Patents
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Abstract
本发明涉及一种3D芯片封装,属于集成电路封装领域。本发明的所述3D芯片封装包括一种或多种半导体器件;一种位于半导体器件下的主转接板;一种位于主转接板下的印刷电路板;一种支撑转接板,所述支撑转接板放置在与所述半导体器件平面相同的平面上,或者放置在所述主转接板和所述半导体器件之间,通过通孔和外部连接端子,从而实现相互电气连接。本发明能确保在堆叠半导体器件时,在各种尺寸的半导体器件之间堆叠时的稳定性。
Description
技术领域
本发明属于集成电路封装技术领域,具体涉及一种3D芯片封装。
背景技术
目前,通过研究多种结构的晶圆级封装技术,实现小型化、轻质和高性能的要求,人们提出了很多构想。同时,在电子工业中,人们针对低成本制造轻质、紧凑、高速、多功能、高性能的高可靠性产品,提出了更高的要求。
在片上系统SoC的实现中,由于技术限制、高成本等原因,到目前为止在技术实现上还存在一定的局限性,而SiP具有小批量生产中的成本优势,由于传统的2D封装已经不能满摩尔定律的发展需求,因此3D封装技术应运而生。然而,根据不同的裸芯片尺寸,由于堆叠裸芯片时的不均匀性,芯片堆叠过程可能会受到限制,并且过程的可靠性可能会减弱。
发明内容
(一)要解决的技术问题
本发明要解决的技术问题是如何提供一种3D芯片封装,以确保在堆叠半导体器件时在各种尺寸的半导体器件之间堆叠时的稳定性。。
(二)技术方案
为了解决上述技术问题,本发明提出一种3D芯片封装,该芯片封装包括:
一种半导体器件;
一种位于半导体器件下的主转接板;
一种位于主转接板下的印刷电路板;
一种支撑转接板,该转接板与所述半导体器件放置在同一平面上,或放置在所述主转接板和所述半导体器件之间,
其中每个主转接板,半导体器件和支撑转接板均包括:一个基于印刷电路板厚度方向的通孔。
进一步地,该芯片封装包括:
一个在多个半导体器件之间的外部连接端子,与通孔连接,从而实现相互电气互连。
进一步地,该芯片封装包括:
一种在所述主转接板与所述印刷电路板之间形成的外部连接端子,并与通孔相连,从而实现相互电气连接。
进一步地,该芯片封装包括:
一个半导体器件和支撑转接板之间形成的外部连接端子,并与通孔连接,从而实现相互电气互连。
进一步地,所述主转接板包括:一个电路层,所述电路层内层有电路形状;所述支持转接板包括:一个电路层,所述电路层内层有电路形状。
进一步地,所述印刷电路板包括在其中内置的半导体器件。
本发明还提供一种3D芯片封装,该芯片封装包括:
多种半导体器件;
一种支撑转接板,设置在所述半导体器件的平面的同一平面上的,或设置在多个所述半导体器件之间的,
其中每个半导体器件和支撑转接板包括:一个基于印刷电路板的厚度方向形成的通孔。
进一步地,该芯片封装包括:
一种在多个所述半导体器件之间形成的外部连接端子,并与通孔相连,从而实现相互电气连接。
进一步地,该芯片封装包括:
一种在所述半导体器件和所述支撑转接板之间的外部连接端子,并与通孔相连,从而实现相互电气连接。
进一步地,该芯片封装包括:
一种在所述多个半导体器件之下的主转接板;主转接板包括一个基于印刷电路板的厚度方向形成的通孔
一种印刷电路板,在主转接板的下方。
(三)有益效果
本发明提出一种3D芯片封装,所述3D芯片封装包括一种或多种半导体器件;一种位于半导体器件下的主转接板;一种位于主转接板下的印刷电路板;一种支撑转接板,所述支撑转接板放置在与所述半导体器件平面相同的平面上,或者放置在所述主转接板和所述半导体器件之间,通过通孔和外部连接端子,从而实现相互电气连接。本发明能确保在堆叠半导体器件时,在各种尺寸的半导体器件之间堆叠时的稳定性。
附图说明
图1为根据本发明的一个实施例,所述的3D芯片封装结构的剖面图的详细展示;
图2为根据本发明的另一实施例,所述的3D芯片封装结构的剖面图的详细展示。
具体实施方式
为使本发明的目的、内容和优点更加清楚,下面结合附图和实施例,对本发明的具体实施方式作进一步详细描述。
在本发明的优选实例中,提出了一种三维(3D)芯片封装方法,包括:一种或多种半导体器件;一种位于半导体器件下的主转接板;一种位于主转接板下的印刷电路板;一种支撑转接板,所述支撑转接板放置在与所述半导体器件平面相同的平面上,或者放置在所述主转接板和所述半导体器件之间,其特征为:每个主转接板、半导体器件和支撑转接板包括一个基于印刷电路板的厚度方向形成的通孔,并且在每个主转接板、半导体器件和支撑转接板之间形成外部连接端子,并与通孔连接,从而实现相互电气连接。
在本发明的优选实例中,所述3D芯片封装中,所述支撑转接板和所述主转接板可以包括:一个电路层,所述电路层具有形成在其内层上的(印刷)电路图形;所述印刷电路板可包括其中内置的半导体器件。
如图1所示,所述3D芯片封装100可包括:一个印刷电路板110,一个主转接板120,支撑转接板130:131和132(以下简称为数字“130”),半导体140:141,142,143,144,145和146(以下简称为数字“140”)。所述主转接板120在所述印刷电路板110上。所述印制电路板110是在印刷电路板区域中作为核心基板应用的典型绝缘层,或者是一个在绝缘层上的一层或多层电路的印刷电路板。
关于绝缘层,可以使用一个树脂绝缘层,热固性树脂如环氧树脂,热塑性树脂如聚酰亚胺,上述树脂都浸渍有增强材料,如玻璃或预先填充的有机材料,可以使用预浸料,或热固性树脂或/和光固化树脂,但本发明不受特别限制。
如图1所示,所述印刷电路板110可包括在其下部形成的一个外部连接端子150。所述印刷电路板110可包括半导体器件140:141、142、143、144、145和146以外的半导体器件。所述半导体器件是与所述印刷电路板110电气连接以执行预定功能的元件,并且可以在所述印刷电路板110中内置器件,例如,集成电路芯片。此外,虽然未显示,但显然在所述印刷电路板110中内置了半导体器件,并且通过诸如通孔等方式进行了电气连接。
所述主转接板120包括:一个在内部层上的有(印刷)电路图形的电路层。所述半导体器件140可以在所述主转接板120上。主转接板120和支撑转接板130的材料强度大于普通印刷电路板的强度。
在本例中,可以有多个半导体器件140。所述半导体器件140可安装在所述印刷电路板上,例如,一个集成电路(IC)半导体器件、一个集成无源器件(IPD)、一个二极管等,而且本发明不限于此。
所述支撑转接板130可以和所述半导体器件140的平面设置在同一平面上,或者设置在所述主转接板120和所述半导体器件140之间。
在本例中,所述支撑转接板130与所述半导体器件140位于同一平面上,如图1所示,所述支撑转接板130设置在与所述半导体器件140相同的层上,当设置在与所述半导体器件140相同的平面上时,所述支撑转接板130可以具有的高度,与基于所述印刷电路板的厚度方向的所述半导体140的高度相对应,同时考虑堆叠中的稳定性。
这里,“对应”一词可表示具有与所述半导体器件140相同的厚度。然而,“相同”一词在数学意义上可能表示的厚度并不完全相同,而在考虑设计误差、制造误差、测量误差等因素时,表示的厚度基本上相同。
所述支撑转接板130可以包括:一个在其内部层上的具有(印刷)电路图形的电路层。所述支撑转接板130可能具有适用于在多个所述半导体器件140之间堆叠的稳定性的结构,可能以支撑的方式适用于所述主要转接板120上方的半导体设备140的外围设备,即使上部半导体器件142的尺寸大于下部半导体器件141的尺寸,也可以确保堆叠的稳定性。
每个所述主转接板120、所述半导体器件140和所述支撑转接板130可以包括:一个基于印刷电路板的厚度方向形成的通孔190。可以通过使用YAG激光或CO2激光等激光钻孔方法,或使用诸如CNC钻头的机器钻头的方法,根据要应用的对象(所述主转接板120,所述半导体器件140,所述支撑转接板130等等)来对所述通孔190进行加工。
在所述印刷电路板110和所述主转接板120之间形成一个外部连接端子160,并与所述通孔190连接,从而实现相互电气连接。在多个所述半导体器件140之间形成一个外部连接端子180,并与所述通孔190连接,从而实现相互电气连接。外部连接端子180在半导体器件140和支撑转接板130之间,并与通孔190连接,从而实现相互电气连接。一个在所述支撑转接板130和所述主转接板120之间的外部连接端子170,与通孔190连接,从而实现相互电气连接。在结构之间的外部连接端子180、170和160,实现相互电气连接。
图2是根据本发明的另一实施例,所述3D芯片封装结构的详细剖视图,对所述半导体器件之间的所述支撑转接板进行描述。
在第二实施例的结构介绍中,将省略与本发明第一实施例的结构相同的介绍,并且只描述它们之间的区别。
如图2所示,所述三维芯片封装100可包括多个半导体器件140:141、142、143、144、145、146和147(下称“140”),而支撑转接板130:131、132和133(下称“130”)可在多个半导体器件140之间设置,或在半导体器件140的同一平面上设置。在本例中,所述支撑转接板130是在多个半导体器件140之间设置的,如图2所示,所述支撑转接板130被堆叠在垂直叠加的半导体器件142和144之间。
此外,每个所述半导体器件140和所述支撑转接板130可以包括:一个基于印刷电路板的厚度方向形成的通孔190。
所述3D半导体封装100还可以包括:一个设置在多个半导体器件140之间的外部连接端子180,并与通孔190连接,从而实现相互电气连接。所述外部连接端子180可在半导体器件140和支撑转接板130之间,并与所述通孔190连接,从而实现相互电气连接。所述3D芯片封装100还可以包括:一个在多个半导体器件140下面的主转接板120和一个在所述主转接板120下面的印刷电路板110。
在本例中,所述印刷电路板110可以作为一个在印刷电路板区域中用作核心基板的典型绝缘层,或者一个在绝缘层上形成一层或多层电路中的印刷电路板。
关于绝缘层,可以使用一个树脂绝缘层,热固性树脂如环氧树脂,热塑性树脂如聚酰亚胺,上述树脂都浸渍有增强材料,如玻璃或预先填充的有机材料,例如,可以使用预浸料,或热固性树脂或/和光固化树脂,但本发明不受特别限制。
如图2所示,所述印刷电路板110在低部位置可包括一个外部连接端子190。
所述印刷电路板110可包括140:141、142、143、144、145、146和147以外的半导体器件。在本例中,所述半导体器件是与所述印刷电路板110电气连接以执行预定功能的器件,并且表示一个器件可内置在所述印刷电路板110中,例如集成电路(IC)芯片。此外,虽然没有示出,但很明显,所述半导体器件是内置在印刷电路板110中的,并且运行时的电气连接是通过通孔或类似方式进行的。
所述主转接板120还可以包括:一个基于印刷电路板的厚度方向形成的通孔190。
在一般的半导体封装中,应将半导体器件堆叠为以下形式,即,将半导体器件的尺寸缩小到靠近封装的上限,以确保其在封装中的稳定性。因此在半导体封装的设计自由度上有一个限制。
当半导体器件的堆叠方式使上部半导体器件的尺寸大于下部半导体器件的尺寸时,将会完全显示出非均匀状态,因此,产品的可靠性可能会减弱,并且在电信号连接中也可能存在限制。
因此,根据本发明第二实施例,在所述3D芯片封装中,可在堆叠半导体器件时应用所述支撑转接板,因此,无论半导体器件的尺寸大小如何,半导体器件都可以根据该半导体器件的需要自由地布置,此外,可以通过通孔进行各器件之间的电气连接,从而将所述3D芯片封装的总体尺寸减小到尽可能小。
如上所述,根据本发明的实施例,在3D芯片封装中,在堆叠包括半导体器件的3D芯片封装时,可以应用支撑转接板,从而即使采用了各种尺寸的半导体器件,也可以确保半导体器件之间的稳定性,从而提高产品的可靠性。
根据本发明的实施例,可以应用支撑转接板,因此可以省去除标准尺寸半导体器件之外的具有特定尺寸的半导体器件的单独制造过程,从而降低成本并提高产品的生产率。
根据本发明的实施例,当不同尺寸的半导体器件叠加时,可以克服信号连接实现中的结构脆弱性和局限性。
以上所述仅是本发明的优选实施方式,应当指出,对于本技术领域的普通技术人员来说,在不脱离本发明技术原理的前提下,还可以做出若干改进和变形,这些改进和变形也应视为本发明的保护范围。
Claims (10)
1.一种3D芯片封装,其特征在于,该芯片封装包括:
一种半导体器件;
一种位于半导体器件下的主转接板;
一种位于主转接板下的印刷电路板;
一种支撑转接板,该转接板与所述半导体器件放置在同一平面上,或放置在所述主转接板和所述半导体器件之间,
其中每个主转接板,半导体器件和支撑转接板均包括:一个基于印刷电路板厚度方向的通孔。
2.如权利要求1所述的3D芯片封装,其特征在于,该芯片封装包括:
一个在多个半导体器件之间的外部连接端子,与通孔连接,从而实现相互电气互连。
3.如权利要求1所述的3D芯片封装,其特征在于,该芯片封装包括:
一种在所述主转接板与所述印刷电路板之间形成的外部连接端子,并与通孔相连,从而实现相互电气连接。
4.如权利要求1所述的3D芯片封装,其特征在于,该芯片封装包括:
一个半导体器件和支撑转接板之间形成的外部连接端子,并与通孔连接,从而实现相互电气互连。
5.如权利要求1所述的3D芯片封装,其特征在于:所述主转接板包括:一个电路层,所述电路层内层有电路形状;所述支持转接板包括:一个电路层,所述电路层内层有电路形状。
6.如权利要求1所述的3D芯片封装,其特征在于:所述印刷电路板包括在其中内置的半导体器件。
7.一种3D芯片封装,其特征在于,该芯片封装包括:
多种半导体器件;
一种支撑转接板,设置在所述半导体器件的平面的同一平面上的,或设置在多个所述半导体器件之间的,
其中每个半导体器件和支撑转接板包括:一个基于印刷电路板的厚度方向形成的通孔。
8.如权利要求7所述的3D芯片封装,其特征在于,该芯片封装包括:
一种在多个所述半导体器件之间形成的外部连接端子,并与通孔相连,从而实现相互电气连接。
9.如权利要求7所述的3D芯片封装,其特征在于,该芯片封装包括:
一种在所述半导体器件和所述支撑转接板之间的外部连接端子,并与通孔相连,从而实现相互电气连接。
10.如权利要求7所述的3D芯片封装,其特征在于,该芯片封装包括:
一种在所述多个半导体器件之下的主转接板;主转接板包括一个基于印刷电路板的厚度方向形成的通孔
一种印刷电路板,在主转接板的下方。
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