KR20060118363A - 오프셋 집적 회로 패키지-온-패키지 적층 시스템 - Google Patents
오프셋 집적 회로 패키지-온-패키지 적층 시스템 Download PDFInfo
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- KR20060118363A KR20060118363A KR1020060043994A KR20060043994A KR20060118363A KR 20060118363 A KR20060118363 A KR 20060118363A KR 1020060043994 A KR1020060043994 A KR 1020060043994A KR 20060043994 A KR20060043994 A KR 20060043994A KR 20060118363 A KR20060118363 A KR 20060118363A
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
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- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
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Abstract
Description
Claims (10)
- 오프셋 집적 회로 패키지-온-패키지 적층 방법(1000)으로서,베이스 기판(104)을 제공하는 단계와;상기 베이스 기판(104) 위에 컨택 패드(119)를 형성하는 단계와;상기 베이스 기판(104) 위에 제 1 집적 회로(110)를 실장하는 단계와;상기 제 1 집적 회로(110) 주위에 베이스 패키지 본체(116)를 형성하는 단계와;오프셋 기판(122)을 제공하는 단계와;상기 오프셋 기판(122) 위에 제 2 집적 회로(128)를 실장하는 단계와; 그리고상기 베이스 패키지 본체(116) 위에 상기 오프셋 기판(122)을 배치하는 것을 비롯하여, 상기 컨택 패드(119)에 상기 오프셋 기판(122)을 결합하는 단계를 포함하는 것을 특징으로 하는 오프셋 집적 회로 패키지-온-패키지 적층 방법(1000).
- 제 1 항에 있어서,상기 베이스 기판(104) 위에 수동 소자(204), 능동 소자(808) 또는 이들의 조합을 실장하는 단계를 더 포함하는 것을 특징으로 하는 오프셋 집적 회로 패키지-온-패키지 적층 방법(1000).
- 제 1 항에 있어서,오프셋 패키지(120)가 베이스 몰드 캡(804)의 코너 위에 놓이는 상태로, 상기 베이스 기판(104) 위에 상기 오프셋 패키지(120)를 실장하는 단계를 더 포함하는 것을 특징으로 하는 오프셋 집적 회로 패키지-온-패키지 적층 방법(1000).
- 제 1 항에 있어서,상기 베이스 패키지 본체(116)와 상기 오프셋 기판(122) 사이에 갭 필러 접착제(502)를 제공하는 단계를 더 포함하는 것을 특징으로 하는 오프셋 집적 회로 패키지-온-패키지 적층 방법(1000).
- 제 1 항에 있어서,오프셋 패키지(120)가 베이스 몰드 캡(904)의 하나의 에지와 정렬되는 상태로, 상기 베이스 기판(104) 위에 상기 오프셋 패키지(120)를 실장하는 단계를 더 포함하는 것을 특징으로 하는 오프셋 집적 회로 패키지-온-패키지 적층 방법(1000).
- 오프셋 집적 회로 패키지-온-패키지 적층 시스템(100)으로서,베이스 기판(104)과;상기 베이스 기판(104) 위에 형성되는 컨택 패드(119)와;상기 베이스 기판(104) 위에 실장되는 제 1 집적 회로(110)와;상기 제 1 집적 회로(110) 주위에 몰딩되는 베이스 패키지 본체(116)와;오프셋 기판(122)과; 그리고상기 오프셋 기판(122) 위에 실장되는 제 2 집적 회로(128)를 포함하고,상기 오프셋 기판(122)은 상기 컨택 패드(119)에 결합되고, 상기 베이스 패키지 본체(116) 위에 배치되는 것을 특징으로 하는 오프셋 집적 회로 패키지-온-패키지 적층 시스템(100).
- 제 6 항에 있어서,상기 베이스 기판(104) 위에 실장되는 수동 소자(204), 능동 소자(808) 또는 이들의 조합을 더 포함하는 것을 특징으로 하는 오프셋 집적 회로 패키지-온-패키지 적층 시스템(100).
- 제 6 항에 있어서,상기 베이스 기판(104) 위에 실장되는 오프셋 패키지(120)를 더 포함하고, 상기 오프셋 패키지(120)는 베이스 몰드 캡(804)의 코너에 놓이는 것을 특징으로 하는 오프셋 집적 회로 패키지-온-패키지 적층 시스템(100).
- 제 6 항에 있어서,상기 베이스 패키지 본체(116)와 상기 오프셋 기판(122) 사이에 갭 필러 접착제(502)를 더 포함하는 것을 특징으로 하는 오프셋 집적 회로 패키지-온-패키지 적층 시스템(100).
- 제 6 항에 있어서,상기 베이스 기판(104) 위에 실장되는 오프셋 패키지(120)를 더 포함하고, 상기 오프셋 패키지(120)는 베이스 몰드 캡(904)의 하나의 에지와 정렬되는 것을 특징으로 하는 오프셋 집적 회로 패키지-온-패키지 적층 시스템(100).
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US59488405P | 2005-05-16 | 2005-05-16 | |
US60/594,884 | 2005-05-16 | ||
US11/383,403 US7518224B2 (en) | 2005-05-16 | 2006-05-15 | Offset integrated circuit package-on-package stacking system |
US11/383,403 | 2006-05-15 |
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KR20060118363A true KR20060118363A (ko) | 2006-11-23 |
KR101076062B1 KR101076062B1 (ko) | 2011-10-21 |
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US (1) | US7518224B2 (ko) |
JP (1) | JP4402074B2 (ko) |
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TW (1) | TWI334639B (ko) |
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US7518224B2 (en) | 2009-04-14 |
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