CN107431019A - 芯片和芯片夹的安装方法 - Google Patents
芯片和芯片夹的安装方法 Download PDFInfo
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- CN107431019A CN107431019A CN201580068422.5A CN201580068422A CN107431019A CN 107431019 A CN107431019 A CN 107431019A CN 201580068422 A CN201580068422 A CN 201580068422A CN 107431019 A CN107431019 A CN 107431019A
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- chip
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Classifications
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Abstract
一种芯片和芯片夹的安装方法,包含:提供芯片夹、芯片和基板,在芯片夹和芯片上层压可烧结银膜,将粘剂堆积到基板上,将芯片放置到基板上,将芯片夹放置到芯片和基板上,从而形成基板‑芯片‑芯片夹组合件,以及烧结该基板‑芯片‑芯片夹组合件。
Description
技术领域
本申请涉及并要求2014年12月17日提交的名称为“芯片和芯片夹的安装方法”的第62/093,004号美国专利申请的优先权,其全文以引用方式并入本申请。
背景技术
本申请整体上涉及将电子元件安装到基板或引线框的方法,更具体地,涉及包括对用于实行该方法的材料进行烧结的方法。
烧结的银芯片安装膜将纳米银粉末的独特物理性质和革新的化学配方结合到一起成为革新的产品,其能够结合多个电子设备从而制造极其可靠的导温、导电性强的界面。参考第2012/0114927A1号美国专利申请公开,其全文并入本申请,在其工序中,烧结的银芯片安装膜被独特地设置从而与已有的生产设备相配合,并且实现大量生产。这项技术涵盖了宽范围(从电子和自动设备的大型区域半导体开关元件和电力模块到移动技术和LED照明的小规模离散元件)的多种设备和应用。该技术通过相比于传统结合技术提高电力或照明输出或可靠性从而提升了现有设备的性能。该烧结膜使得能够使用新的高温SiC和GaN半导体和新的设备设计,该设计实现了现有技术无法达到的电子效率。
银芯片安装糊和膜是用于将电子设备安装到静态基板或安装到另一设备的结合材料。银膜是独特的,因为其能够施用于或层压到独立的芯片、芯片背面或晶片。在一个实施例中,该芯片通过足够致密化该膜并建立材料与连接部分之间的紧密连接的力而被放置在预加热的基板上。在施加的热和压力下,该膜烧结并将芯片连接到基板。所获得的芯片与基板之间的接头是金属银,其具有如图1所示的结构和性质。
在很多半导体组合件中,通过连接在芯片顶部的芯片夹提供设备的电连接。这样的设置确保比线连接更低的电阻和更好的性能。通过将铜芯片夹焊接到一个或两个焊盘及其对应导线来完成芯片夹连接。该工序典型地采用高铅焊接材料,并且需要对该焊接工序(特别是在焊接回流工序的熔化阶段对芯片和芯片夹定位)的良好控制。
发明内容
使用可烧结银膜的芯片和芯片夹的安装方法非常适合离散组合件的大量生产。该方法在烧结之前采用可分散的粘剂来将芯片和芯片夹设置在引线框上。该芯片夹还能够用于连接至引线框的基体。下述烧结步骤可以在任何商业可行的烧结机中进行。
本申请的一个方面涉及一种芯片和芯片夹的安装方法,其包含:提供芯片夹、芯片和基板;在该芯片夹和该芯片上层压可烧结银膜;将粘剂堆积在该基板上;将该芯片放置在该基板上;将该芯片夹放置在该芯片和该基板上从而制造出基板-芯片-芯片夹组合件;并且烧结基板-芯片-芯片夹组合件。
本申请的实施例可以进一步包括通过采用2-3MPa或更大的压力和130℃的温度以及30秒的持续时间来层压可烧结银膜。芯片可以独立层压或作为整体晶片层压再切割。芯片夹可以独立层压或以铜片的形式层压再切割或压印。可以在能够提供特定压力和温度的层压机中或在芯片粘合机中完成对可烧结银膜的层压。可以将层压的芯片收集并储存在窝伏尔组件中或切割带上。可以将层压的芯片夹收集并储存在带、盘或窝伏尔组件上。可以将粘剂涂抹在基板上从而在将元件移动到烧结机之前将该组合件的元件放置并固定到位置上。该粘剂将芯片和芯片夹临时安装到基板上。在基板、芯片和芯片夹的烧结过程中,该粘剂蒸发,同时并不干涉烧结过程。可以通过芯片粘合机将该芯片放置到基板上,并通过粘剂将该芯片固定到位置上。可以通过夹取放置机或环氧芯片粘合机将该芯片夹放置到基板上,并通过粘剂将该芯片夹固定到位置上。对基板、芯片和芯片夹的烧结可以包括具有压力工具和热板的烧结机。烧结可以包括采用10MPa的压力和250℃的温度以及60秒的持续时间。可以将该芯片夹以连接到基板的基体的形式与可烧结银膜层压在一起。芯片夹之间的间隔可以与位于基板上的芯片相适应。通过这里描述的方法能够形成焊接接头。芯片夹能够均匀地将压力传递到芯片和基板的底座。
附图说明
结合附图,至少一个实施例的多个方面在下文进行讨论,其并不是用于限制。其中,附图、具体实施方式或任何权利要求中的技术特征均用附图标记所标识。附图标记单纯用于使附图、附体实施方式和权利要求书更好理解。据此,无论有无附图标记,其均不对保护范围产生任何限定作用。在附图中,每个相同或几乎相同的元件在不同附图中均采用相似的附图标记。为了清晰明了,并不是每个元件都在每个附图中出现。附图用于说明和解释,而非用于对本发明的限定。
图1是芯片和基板之间的成品接头(其为金属银)的拍照照片;
图2A至图2F是本申请的一个实施例的芯片和芯片夹的安装方法的概略视图;
图3A至图3C是本申请的一个实施例的芯片夹设计的概略横截面视图;
图4A和图4B示出了本申请的一个实施例的芯片夹设计;
图5是本申请的一个实施例的具有芯片和芯片夹的组合件安装的概略透视图;
图6A至图6C示出了本申请的一个实施例的引线框、芯片夹和芯片;
图7A和图7B示出了涂抹在引线框上从而使芯片和芯片夹保持在位置上的粘剂;
图8A至图8C是本申请的实施例的完整芯片和芯片夹组件的拍照照片;
图9A至图9H是通过CSAM进行的接头分析的拍照照片;
图10A和图10B是通过SEM进行的接头分析的拍照照片;
图11A至图11E是完整的芯片和芯片夹组件的接头分析的拍照照片;
图12A是具有层压之前的具有芯片夹的引线框的视图;
图12B是层压之前的芯片夹的视图;
图13A是具有层压之后的具有芯片夹的引线框的视图;
图13B是层压之后的芯片夹的视图。
具体实施方式
烧结技术对于芯片夹焊接来说是优秀的替代品,因为烧结提供了无空隙、导电和导热性强的粘合,并且避免了对有毒的含铅焊接剂的使用。本申请描述了通过烧结工序进行的独特地适合大量生产安装有芯片夹的动力组件的方法。本申请实施例的方法采用了可烧结银膜和特殊粘剂从而确保元件的精确定位和可靠连接。在此公开了一种采用预涂膜的可烧结银膜的单独步骤的芯片和芯片夹的安装方法。该银膜的组成和用途均记载在第2012/0114927A1号美国专利申请公开中。参照图2A至图2F,通过图示描述了该方法,其示出了芯片10和芯片夹12。
在特定实施例中,在该方法(图2A)中采用的材料可以包括芯片、芯片夹和基板(即引线框)。在第一步骤(图2B)中,根据第2012/0114927A1号美国专利申请公开中所描述的方法,将组合件的两个元件(即芯片10和芯片夹12)与可烧结银膜14层压在一起。在特定实施例中,层压压力为0.5-20MPa,温度为100-200℃,持续少于1秒至90秒。在特定实施例中,层压参数可以包括采用2-3MPa或更大的压力、130℃的温度和30秒的持续时间。芯片可以独立层压或作为整体晶片层压再切割。类似地,芯片夹可以独立层压或以铜片的形式层压再切割或压印。可以在能够提供特定压力和温度的层压机中或在芯片粘合机(例如,BESemiconductor Industries N.V.公司生产的DataconTM 2200 evo多片芯片粘合机或类似的机器)中完成层压。将层压的芯片收集并储存在窝伏尔组件中或切割带上。将层压的芯片夹收集并储存在带、盘或窝伏尔组件上。
在第二步骤(图2C)中,将粘剂16涂抹在基板(或引线框)18上从而在将该部件移动到烧结机之前将该组合件的元件放置并固定到位置上。该粘剂的功能是将芯片10和芯片夹12临时安装到引线框18上。在烧结过程中,粘剂蒸发,同时并不干涉烧结过程。
在下一个步骤(图2D)中,通过粘剂16将该芯片10放置到引线框18上并固定到位置上。可以通过BE Semiconductor Industries N.V.公司生产的ESECTM 2100芯片粘合机或类似的机器完成芯片的放置。
在第四步骤(图2E)中,通过标准夹取放置机或同等的环氧芯片粘合机(例如ESECTM2100)将该芯片夹12放置到引线框18上。通过粘剂将该芯片夹12固定到位置上。可以通过夹取放置机(例如夹取放置机或类似的机器)来完成芯片夹的放置。
在最后的步骤(图2F)中,将承载着所有芯片和芯片夹的引线框18移动到烧结机(热板20)。在特定实施例中,烧结的压力为3-25MPa,温度为190-300℃,实施1-180秒。在特定实施例中,以10MPa的压力和250℃的温度实施60秒来烧结该部件。可以通过BoschmanTechnologies公司生产的SinterstarTM Innovate-F-XL压机或类似的机器来完成该烧结步骤。
芯片夹的形状可以有所不同,其取决于芯片和引线框的设计从而容纳电连接。芯片夹的设计还可以减轻烧结工序所产生的热压力。图3A、图3B和图3C示出了芯片夹设计的例子。图3A示出了芯片夹30。图3B示出了芯片夹32。图3C示出了芯片夹34。如图所示,芯片夹30和32分别被构造为其一个线脚与引线框相连接。芯片夹34被构造为其一个线脚与引线框相连接。在特定实施例中,芯片夹设计可以体现为图4A和图4B中的设计。如图所示,芯片夹40被设计为固定芯片42和引线框44。应该理解的是,根据芯片和/或引线框的尺寸和形状,可以采用任意数量的芯片夹设计。
步骤示范
目标组合件
图5示出了本申请的一个实施例的具有芯片和芯片夹元件的组合件。如图所示,该组合件包括芯片夹50和芯片52,其被构造为固定到引线框54。
材料和元件
图6A示出了本申请的一个实施例的模范引线框,图6B示出了本申请的一个实施例的模范芯片夹设计,而图6C示出了本申请的一个实施例的模范芯片。还提供了银膜和粘剂。
工序细节
将芯片和芯片夹与Alpha Metals,Inc公司生产的可烧结银膜8020层压在一起。将粘剂涂抹到引线框的如下文所示的位置上。在一个实施例中,该粘剂以DATA600而被销售,并且是Alpha Metals,Inc公司的商业产品。
图7A和图7B示出了涂抹在引线框上从而将芯片和芯片夹固定在位置上的粘剂。
将芯片和芯片夹放置到引线框上的八个位置上,并且在Boschman Technologies公司生产的SinterstarTM烧结机中烧结。组合件俯视和侧视光学视图显示出芯片与基板之间、芯片夹与芯片之间的良好的烧结连接。
芯片夹设计是独特的,其允许均匀压力从芯片夹的顶部传递到芯片区域和芯片的底座。相反地,芯片工具是独特的,其被设计为在整个芯片夹的顶部区域上施加均匀压力。由此,可以在同一步骤中烧结芯片夹、芯片和基板或引线框。
另外,芯片工具(也叫做动态嵌入)可以被聚集成一列从而同时在每个独立芯片、一组芯片或所有芯片上施加均匀压力。平坦且作为三维组合件的组合件可以通过动态嵌入工具结构而高效地操作。一列引线框或组合件可以并行地烧结,唯一的限制是其层压面积。
该芯片夹和工具设计实现了高产量和高收率。因此,实现了成本目标,同时具有高可靠性和无导线系统所带来的益处。
图8A至图8C是本申请的实施例的完整芯片和芯片夹安装组件的照片展示。
通过共焦扫描声学显微镜(CSAM)进行的接头分析
扫描声学显微镜显示了在所有界面上(即芯片夹与芯片之间、芯片与基板之间)的均匀和完整的连接。
图9A至图9H是通过CSAM进行的接头分析的照片展示。
通过扫描电子显微镜(SEM)进行的接头分析
将安装好的元件横切开,通过扫描电子显微镜检测连接。芯片和芯片夹均连接到一起。在所连接的部件之间形成了大约15μm的均匀的完整烧结的银粘接。
图10A和图10B是通过SEM进行的接头分析的照片展示。图11A至图11E是完整的芯片和芯片夹安装组件的接头分析的照片展示。
芯片夹层压在引线框上的工序
芯片夹可以如上所述单独地,或以连接到引线框的基体的形式与可烧结银膜层压在一起。在此情况下,芯片夹之间的空隙与位于基板或引线框上方的芯片相适应。图12A、图12B、图13A和图13B示出了该设计在层压前和层压后的示例。为了将芯片夹安装到芯片的顶部,芯片夹将被定位和放置在已经预先安装了芯片的基板引线框的顶部。之后的烧结步骤与上述相似。
图12A是层压之前的具有芯片夹的引线框的视图。图12B是层压之前的芯片夹的视图。图13A是层压之后的具有芯片夹的引线框的视图。图13B是层压之后的芯片夹的视图。
或者,平坦的铜箔(具有或不具有银镀层)可以与可烧结银膜层压在一起。在之后的步骤中,可以修整并压印铜箔从而制造出如图13B所示的具有芯片夹的引线框。
在此讨论的方法和设备的实施例并不是对本申请所描述或图示的元件的结构和布置的限制。该方法和设备能够在其它实施例中实施,并且能够以各种方式来实践或进行。在此提供具体实施的例子仅仅是为了示例性的目的,而非用于限制。具体地,与任一或更多实施例相关的操作、元件和特征均不应该从任何其它实施例中的相似角色中所排除。
并且,在此使用的措辞和术语是用于描述,其不应该作为限制。这里系统和方法的任何单数的实施例或元件或操作也可以包含具有复数的这些元件的实施例,并且这里任何复数的实施例或元件或操作也可以包含具有单数的这些元件的实施例。单数或复数的形式并不应该限制所公开的系统或方法,以及组件、操作或元件。在此所使用的“包括”、“包含”、“具有”、“含有”、“囊括”以及其变化的含义是其包含之后所列出的项目以及其等价物以及额外的项目。“或”可以解释为可以包含,所以任何采用“或”来描述的术语可以表示单独一个、多于一个以及所有所述术语。任何前后、左右、俯仰、上下、和垂直水平均是为了方便描述,而非将本系统和方法或其组件限制到位置或空间方向。
具有所描述的至少一个实施例的几个方面,可以认为,本领域技术人员很容易进行各种变换、更改和改进。这些变换、更改和改进应该作为本公开的一部分,并且应该在本发明的保护范围之内。据此,以上描述和附图仅仅是用于示例,而本发明的保护范围应该通过权利要求书及其等价物的适当结构来决定。
Claims (20)
1.一种芯片和芯片夹的安装方法,包含:
提供芯片夹、芯片和基板;
在该芯片夹和该芯片上层压可烧结银膜;
将粘剂堆积到该基板上;
将该芯片放置到该基板上;
将该芯片夹放置到该芯片和该基板上,从而形成基板-芯片-芯片夹组合件;以及
烧结该基板-芯片-芯片夹组合件。
2.根据权利要求1所述的方法,其中,对该可烧结银膜的层压包括采用0.5-20MPa的压力、100-200℃的温度、少于1秒至90秒的持续时间。
3.根据权利要求1所述的方法,其中,对该可烧结银膜的层压包括采用2-3MPa或更大的压力、130℃的温度和30秒的持续时间。
4.根据权利要求1所述的方法,其中,该芯片独立层压或作为整体晶片层压再切割。
5.根据权利要求1所述的方法,其中,该芯片夹独立层压或以铜片的形式层压再切割或压印。
6.根据权利要求1所述的方法,其中,在能够提供特定压力和温度的层压机中或在芯片粘合机中完成对该可烧结银膜的层压。
7.根据权利要求1所述的方法,其中,将层压的该芯片收集并储存在窝伏尔组件中或切割带上。
8.根据权利要求1所述的方法,其中,将层压的该芯片夹收集并储存在带、盘或窝伏尔组件上。
9.根据权利要求1所述的方法,其中,将该粘剂涂抹在该基板上从而在将该元件移动到烧结机之前将该组合件的元件放置并固定到位置上。
10.根据权利要求8所述的方法,其中,该粘剂将该芯片和该芯片夹临时安装到该基板上。
11.根据权利要求10所述的方法,其中,在该基板、芯片和芯片夹的烧结过程中,该粘剂蒸发,同时并不干涉烧结过程。
12.根据权利要求1所述的方法,其中,通过芯片粘合机将该芯片放置到该基板上,并通过该粘剂将该芯片固定到位置上。
13.根据权利要求1所述的方法,其中,通过夹取放置机或环氧芯片粘合机将该芯片夹放置到该基板上,并通过该粘剂将该芯片夹固定到位置上。
14.根据权利要求1所述的方法,其中,对该基板、芯片和芯片夹的烧结包括具有压力工具和热板的烧结机。
15.根据权利要求14所述的方法,其中,烧结包括采用3-25MPa的压力和190-300℃的温度以及1-180秒的持续时间。
16.根据权利要求14所述的方法,其中,烧结包括采用10MPa的压力和250℃的温度以及60秒的持续时间。
17.根据权利要求1所述的方法,还包括多个芯片夹,其中,将该芯片夹以连接到该基板的基体的形式与该可烧结银膜层压在一起。
18.根据权利要求17所述的方法,其中,该芯片夹之间的间隔与位于该基板上的该芯片相适应。
19.通过权利要求1的方法形成的焊接接头。
20.一种芯片夹,其能够均匀地将压力传递到芯片和基板的底座,该芯片夹被构造成用于实现权利要求1的方法。
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EP3234988A4 (en) | 2018-09-12 |
JP6466594B2 (ja) | 2019-02-06 |
CN107431019B (zh) | 2021-10-08 |
KR20170107994A (ko) | 2017-09-26 |
EP3234988A1 (en) | 2017-10-25 |
TW202030808A (zh) | 2020-08-16 |
MY188980A (en) | 2022-01-17 |
TWI726629B (zh) | 2021-05-01 |
TWI689020B (zh) | 2020-03-21 |
US11289447B2 (en) | 2022-03-29 |
JP2018504788A (ja) | 2018-02-15 |
TW201626474A (zh) | 2016-07-16 |
SG11201704928UA (en) | 2017-07-28 |
TW202030807A (zh) | 2020-08-16 |
TWI839472B (zh) | 2024-04-21 |
WO2016100470A1 (en) | 2016-06-23 |
KR102052326B1 (ko) | 2019-12-05 |
US20180166415A1 (en) | 2018-06-14 |
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