CN106950768A - 像素单元及其驱动方法 - Google Patents

像素单元及其驱动方法 Download PDF

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CN106950768A
CN106950768A CN201710124747.1A CN201710124747A CN106950768A CN 106950768 A CN106950768 A CN 106950768A CN 201710124747 A CN201710124747 A CN 201710124747A CN 106950768 A CN106950768 A CN 106950768A
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pixel
tft
area
thin film
film transistor
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CN106950768B (zh
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张蒙蒙
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to CN201710124747.1A priority Critical patent/CN106950768B/zh
Priority to US15/539,689 priority patent/US10247994B2/en
Priority to PCT/CN2017/080068 priority patent/WO2018157447A1/zh
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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Abstract

本发明提供一种像素单元及其驱动方法，通过将电荷共享薄膜晶体管的源极与其所在子像素的下一行子像素对应的扫描线电性连接，并将该子像素扫描时下一行子像素对应的扫描线的电位设置为阵列基板公共电压，使得该子像素的主区与次区具有不同电位，且不需要额外设置阵列基板公共电压走线，相比现有技术，减少了阵列基板中的布线数量，增大液晶显示面板的开口率，有利于实现液晶显示面板的窄边框。

Description

像素单元及其驱动方法
技术领域
本发明涉及显示技术领域，尤其涉及一种像素单元及其驱动方法。
背景技术
液晶显示器(Liquid Crystal Display，LCD)是目前最广泛使用的平板显示器之一，液晶面板是液晶显示器的核心组成部分。液晶面板通常是由一彩膜基板(ColorFilter，CF)、一薄膜晶体管阵列基板(Thin Film Transistor Array Substrate，TFTArray Substrate)以及一配置于两基板间的液晶层(Liquid Crystal Layer)所构成。一般阵列基板、彩膜基板上分别设置像素电极、公共电极。当电压被施加到像素电极与公共电极便会在液晶层中产生电场，该电场决定了液晶分子的取向，从而调整入射到液晶层的光的偏振，使液晶面板显示图像。
为了增大视角，现有技术通常将像素电极设计为“米”字型结构。像素电极包含条状的竖直主干和条状的水平主干，且竖直主干和水平主干中心垂直相交，所谓中心垂直相交是指竖直主干和水平主干相互垂直，且二者将整个像素电极面积平均分成4个区域(domain)。每个像素电极区域都由与竖直主干或水平主干呈±45°、±135°角度的条状分支(Slit)平铺组成，各条状分支与竖直主干和水平主干位于同一平面上，形成上下和左右均镜像对称的“米”字型的像素电极结构。
这种“米”字型的像素电极结构，因每一像素电极区域内的条状分支与竖直主干和水平主干的夹角相同，会存在一定的视觉色差或视觉色偏，液晶面板的穿透率也会下降。为了改善视觉色差或视觉色偏，现有技术会将一个像素单元分成主区和次区，在主区内设置一个独立的主区像素电极、在次区内设置一个独立的次区像素电极，主区像素电极与次区像素电极均采用上述的“米”字型结构设计。如图1所示，每一个像素单元内均包括：主区薄膜晶体管T100、次区薄膜晶体管T200、电荷共享薄膜晶体管T300、主区液晶电容C100、以及次区液晶电容C200,所述主区薄膜晶体管T100的栅极电性连接该像素单元对应的扫描线Gate，源极电性连接该像素单元对应的数据线Data，漏极电性连接主区液晶电容C100的一端，所述次区薄膜晶体管T200的栅极电性连接该像素单元对应的扫描线Gate，源极电性连接该像素单元对应的数据线Data，漏极电性连接次区液晶电容C200的一端，所述电荷共享薄膜晶体管T300的栅极电性连接该像素单元对应的扫描线Gate，源极电性连接阵列基板公共电压Acom，漏极电性连接次区液晶电容C200的一端，所述主区液晶电容C100与次区液晶电容C200的另一端均电性连接彩膜基板公共电压Ccom，工作时，主区薄膜晶体管T100为主区像素电极充电、次区薄膜晶体管T200为次区像素电极充电、电荷共享薄膜晶体管T300为次区像素电极放电，从而使得主区与次区产生不同的电位，以增大视角，但该像素单元为了将电荷共享薄膜晶体管T300的源极电性连接至阵列基板公共电压Acom，需要在阵列基板上设置阵列基板公共电压走线，这会降低液晶显示面板的开口率，增加液晶显示面板的边框宽度。
发明内容
本发明的目的在于提供一种像素单元，能够增大液晶显示面板的开口率，减小液晶显示面板的边框宽度。
本发明的目的还在于提供一种像素单元的驱动方法，能够增大液晶显示面板的开口率，减小液晶显示面板的边框宽度。
为实现上述目的，本发明提供一种像素单元，包括：阵列排布的多个子像素、多条平行间隔排列的水平的扫描线、以及多条平行间隔排列的竖直的数据线；
每一行子像素对应一条扫描线，每一列子像素对应一条数据线，每一个子像素均包括：主区薄膜晶体管、次区薄膜晶体管和电荷共享薄膜晶体管；
设n和m均为正整数，在第n行第m列子像素中：所述主区薄膜晶体管的栅极电性连接第n条扫描线，源极电性连接第m条数据线，漏极电性连接主区像素电极；
所述次区薄膜晶体管的栅极电性连接第n条扫描线，源极电性连接第m条数据线，漏极电性连接次区像素电极；
所述电荷共享薄膜晶体管的栅极电性连接第n条扫描线，源极电性连接第n+1条扫描线，漏极电性连接次区像素电极；
所述第n条扫描线提供高电位时，所述第n+1条扫描线提供阵列基板公共电压，其余的扫描线均提供低电位。
所述主区像素电极和彩膜基板公共电极共同组成主区液晶电容；
所示次区像素电极和彩膜基板公共电极共同组成次区液晶电容。
所述主区像素电极与次区像素电极均为米字型结构，材料均为ITO。
所述主区薄膜晶体管的栅极、次区薄膜晶体管的栅极、电荷共享薄膜晶体管的栅极、以及扫描线位于第一金属层，所述主区薄膜晶体管的源极和漏极、次区薄膜晶体管的源极和漏极、电荷共享薄膜晶体管的源极和漏极、以及数据线位于与所述第一金属层绝缘层叠的第二金属层。
所述像素单元在驱动时的扫描方向为从第一行子像素向最后一行子像素进行扫描。
本发明还提供一种像素单元的驱动方法，包括如下步骤：
步骤1、提供一像素单元，包括：阵列排布的多个子像素、多条平行间隔排列的水平的扫描线、以及多条平行间隔排列的竖直的数据线；
每一行子像素对应一条扫描线，每一列子像素对应一条数据线，每一个子像素均包括：主区薄膜晶体管、次区薄膜晶体管、电荷共享薄膜晶体管、主区液晶电容以及次区液晶电容；
设n和m均为正整数，在第n行第m列子像素中：所述主区薄膜晶体管的栅极电性连接第n条扫描线，源极电性连接第m条数据线，漏极电性连接主区液晶电容的一端；
所述次区薄膜晶体管的栅极电性连接第n条扫描线，源极电性连接第m条数据线，漏极电性连接次区液晶电容的一端；
所述电荷共享薄膜晶体管的栅极电性连接第n条扫描线，源极电性连接第n+1条扫描线，漏极电性连接次区液晶电容的一端；
所述主区液晶电容与次区液晶电容的另一端均电性连接彩膜基板公共电压；
步骤2、依次对各行子像素进行扫描；
每一行子像素的扫描过程均为：设当前扫描的子像素行数为第n行，所述第n条扫描线提供高电位，所述第n+1条扫描线提供阵列基板公共电压，其余的扫描线均提供低电位，所述主区薄膜晶体管、次区薄膜晶体管、以及电荷共享薄膜晶体管均打开，所述主区薄膜晶体管为主区液晶电容充电，所述次区薄膜晶体管为次区液晶电容充电，所述电荷共享薄膜晶体管为次区液晶电容放电，使得次区液晶电容两端的电压低于所述主区液晶电容两端的电压。
所述主区液晶电容的一端为主区像素电极，另一端为公共电极；
所述次区液晶电容的一端为次区像素电极，另一端为公共电极。
所述主区像素电极与次区像素电极均为米字型结构，材料均为ITO。
所述主区薄膜晶体管的栅极、次区薄膜晶体管的栅极、电荷共享薄膜晶体管的栅极、以及扫描线位于第一金属层，所述主区薄膜晶体管的源极和漏极、次区薄膜晶体管的源极和漏极、电荷共享薄膜晶体管的源极和漏极、以及数据线位于与所述第一金属层绝缘层叠的第二金属层。
所述像素单元的扫描方向为从第一行子像素向最后一行子像素进行扫描。
本发明的有益效果：本发明提供一种像素单元，其通过将电荷共享薄膜晶体管的源极与其所在子像素的下一行子像素对应的扫描线电性连接，并将该子像素扫描时下一行子像素对应的扫描线的电位设置为阵列基板公共电压，使得该子像素的主区与次区具有不同电位，且不需要额外设置阵列基板公共电压走线，相比现有技术，减少了阵列基板中的布线数量，增大液晶显示面板的开口率，有利于实现液晶显示面板的窄边框。本发明还提供一种像素单元的驱动方法，能够减少阵列基板中的布线数量和边框宽度，增大液晶显示面板的开口率。
附图说明
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图中，
图1为现有的像素单元的电路图；
图2为本发明的像素单元中一个子像素的电路图；
图3为本发明的像素单元的时序图；
图4为本发明的像素单元的结构图；
图5为本发明的像素单元的驱动方法的流程图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图2及图4，本发明提供一种像素单元，包括：阵列排布的多个子像素10、多条平行间隔排列的水平的扫描线20、以及多条平行间隔排列的竖直的数据线30；
其中，每一行子像素10对应一条扫描线20，每一列子像素10对应一条数据线30，请参阅图2，每一个子像素10均包括：主区薄膜晶体管T1、次区薄膜晶体管T2和电荷共享薄膜晶体管T3；
具体地，设n和m均为正整数，在第n行第m列子像素10中：所述主区薄膜晶体管T1的栅极电性连接第n条扫描线G(n)，源极电性连接第m条数据线Data(m)，漏极电性连接主区像素电极100；所述次区薄膜晶体管T2的栅极电性连接第n条扫描线G(n)，源极电性连接第m条数据线Data(m)，漏极电性连接次区像素电极200；所述电荷共享薄膜晶体管T3的栅极电性连接第n条扫描线G(n)，源极电性连接第n+1条扫描线G(n+1)，漏极电性连接次区像素电极200；所述第n条扫描线G(n)提供高电位VGH时，所述第n+1条扫描线G(n+1)提供阵列基板公共电压Acom，其余的扫描线20均提供低电位VGL。
需要说明的是，如图4所示，每一个子像素10均分为主区(main)和次区(sub)，在主区内设置有一个独立的主区像素电极100，在次区内设置有一个独立的次区像素电极200，所述主区像素电极100与彩膜基板上的公共电极(未图示)共同形成主区液晶电容C1，所述次区像素电极200与彩膜基板公共电极共同形成次区液晶电容C1，也即所述主区液晶电容C1的一端为主区像素电极100，另一端为彩膜基板公共电极，所述次区液晶电容C2的一端为次区像素电极200，另一端为彩膜基板公共电极，所述彩膜基板公共电极接入彩膜基板公共电压Ccom，也即所述主区液晶电容C1与次区液晶电容C2的另一端均电性连接彩膜基板公共电压Ccom。
优选地，所述主区像素电极100与次区像素电极200均为米字型结构，材料均优选氧化铟锡(Indium tin oxide，ITO)。
进一步地，如图4所示，所述主区薄膜晶体管T1的栅极、次区薄膜晶体管T2的栅极、电荷共享薄膜晶体管T3的栅极、以及扫描线20均位于第一金属层，所述主区薄膜晶体管T1的源极和漏极、次区薄膜晶体管T2的源极和漏极、电荷共享薄膜晶体管T3的源极和漏极、以及数据线30均位于与所述第一金属层绝缘层叠的第二金属层。
值得一提的是，所述像素单元在驱动时的扫描方向为从第一行子像素10向最后一行子像素10进行扫描，即第n+1行子像素10在第n子像素10之后进行扫描。
请同时参阅图2及图3，本发明的像素单元的工作过程为：首先，所述第n条扫描线G(n)提供高电位VGH，所述第n+1条扫描线G(n+1)提供阵列基板公共电压Acom，其余的扫描线20均提供低电位VGL，使得第n行子像素10中的主区薄膜晶体管T1、次区薄膜晶体管T2、以及电荷共享薄膜晶体管T3均打开，所述主区薄膜晶体管T1为主区液晶电容C1充电，所述次区薄膜晶体管T2为次区液晶电容C1充电，所述电荷共享薄膜晶体管T3为次区液晶电容C1放电，使得次区液晶电容C1两端的电压低于所述主区液晶电容C1两端的电压，接着第n+1条扫描线G(n)提供高电位VGH，第n+2条扫描线G(n+2)提供阵列基板公共电压Acom，其余的扫描线20均提供低电位VGL，使得第n+1行子像素10中的主区薄膜晶体管T1、次区薄膜晶体管T2、以及电荷共享薄膜晶体管T3均打开，所述主区薄膜晶体管T1为主区液晶电容C1充电，所述次区薄膜晶体管T2为次区液晶电容C1充电，所述电荷共享薄膜晶体管T3为次区液晶电容C1放电，使得次区液晶电容C1两端的电压低于所述主区液晶电容C1两端的电压，依次类推直至最后一行子像素10。
具体地，所述阵列基板公共电压Acom可设置在彩膜基板公共电压Ccom附近，具体电压值需根据产品具体调节，同时所述阵列基板公共电压Acom大于低电位VGL且小于高电位VGH。
本发明通过将电荷共享薄膜晶体管T3的源极与其所在子像素10的下一行子像素10对应的扫描线20电性连接，并将该子像素10扫描时下一行子像素10对应的扫描线20的电位设置为阵列基板公共电压Acom，使得该子像素10的主区与次区具有不同电位，相比于现有技术，不需要额外设置阵列基板公共电压走线，有效减少了阵列基板中的布线数量，增大液晶显示面板的开口率，有利于实现液晶显示面板的窄边框。
请参阅图5，本发明还提供一种像素单元的驱动方法，包括如下步骤：
步骤1、请参阅图2及图4，提供一上述像素单元，具体结构在此不再赘述。
步骤2、依次对各行子像素10进行扫描；
每一行子像素10的扫描过程均为：设当前扫描的子像素10行数为第n行，所述第n条扫描线G(n)提供高电位VGH，所述第n+1条扫描线G(n+1)提供阵列基板公共电压Acom，其余的扫描线20均提供低电位VGL，所述主区薄膜晶体管T1、次区薄膜晶体管T2、以及电荷共享薄膜晶体管T3均打开，所述主区薄膜晶体管T1为主区液晶电容C1充电，所述次区薄膜晶体管T2为次区液晶电容C1充电，所述电荷共享薄膜晶体管T3为次区液晶电容C1放电，使得次区液晶电容C1两端的电压低于所述主区液晶电容C1两端的电压。
具体地，扫描时，按照从第一行子像素10向最后一行子像素10的方向进行扫描，即第n+1行子像素10在第n子像素10之后进行扫描，也即在第n行子像素10扫描时第n+1行子像素10对应的扫描线G(n+1)的电位为阵列基板公共电压Acom，使得第n行子像素10的主区与次区具有不同电位，相比于现有技术，不需要额外设置阵列基板公共电压走线，有效减少了阵列基板中的布线数量，增大液晶显示面板的开口率，有利于实现液晶显示面板的窄边框。
具体地，所述阵列基板公共电压Acom可设置在彩膜基板公共电压Ccom附近，具体电压值需根据产品具体调节，同时所述阵列基板公共电压Acom大于低电位VGL且小于高电位VGH。
综上所述，本发明提供一种像素单元，其通过将电荷共享薄膜晶体管的源极与其所在子像素的下一行子像素对应的扫描线电性连接，并将该子像素扫描时下一行子像素对应的扫描线的电位设置为阵列基板公共电压，使得该子像素的主区与次区具有不同电位，且不需要额外设置阵列基板公共电压走线，相比现有技术，减少了阵列基板中的布线数量，增大液晶显示面板的开口率，有利于实现液晶显示面板的窄边框。本发明还提供一种像素单元的驱动方法，能够减少阵列基板中的布线数量和边框宽度，增大液晶显示面板的开口率。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (10)

1.一种像素单元，其特征在于，包括：阵列排布的多个子像素(10)、多条平行间隔排列的水平的扫描线(20)、以及多条平行间隔排列的竖直的数据线(30)；
每一行子像素(10)对应一条扫描线(20)，每一列子像素(10)对应一条数据线(30)，每一个子像素(10)均包括：主区薄膜晶体管(T1)、次区薄膜晶体管(T2)和电荷共享薄膜晶体管(T3)；
设n和m均为正整数，在第n行第m列子像素(10)中：所述主区薄膜晶体管(T1)的栅极电性连接第n条扫描线(G(n))，源极电性连接第m条数据线(Data(m))，漏极电性连接主区像素电极(100)；
所述次区薄膜晶体管(T2)的栅极电性连接第n条扫描线(G(n))，源极电性连接第m条数据线(Data(m))，漏极电性连接次区像素电极(200)；
所述电荷共享薄膜晶体管(T3)的栅极电性连接第n条扫描线(G(n))，源极电性连接第n+1条扫描线(G(n+1))，漏极电性连接次区像素电极(200)；
所述第n条扫描线(G(n))提供高电位(VGH)时，所述第n+1条扫描线(G(n+1))提供阵列基板公共电压(Acom)，其余的扫描线(20)均提供低电位(VGL)。
2.如权利要求1所述的像素单元，其特征在于，所述主区像素电极(100)和彩膜基板公共电极共同组成主区液晶电容(C1)；
所示次区像素电极(100)和彩膜基板公共电极共同组成次区液晶电容(C2)。
3.如权利要求1所述的像素单元，其特征在于，所述主区像素电极(100)与次区像素电极(200)均为米字型结构，材料均为ITO。
4.如权利要求1所述的像素单元，其特征在于，所述主区薄膜晶体管(T1)的栅极、次区薄膜晶体管(T2)的栅极、电荷共享薄膜晶体管(T3)的栅极、以及扫描线(20)位于第一金属层，所述主区薄膜晶体管(T1)的源极和漏极、次区薄膜晶体管(T2)的源极和漏极、电荷共享薄膜晶体管(T3)的源极和漏极、以及数据线(30)位于与所述第一金属层绝缘层叠的第二金属层。
5.如权利要求1所述的像素单元，其特征在于，所述像素单元在驱动时的扫描方向为从第一行子像素(10)向最后一行子像素(10)进行扫描。
6.一种像素单元的驱动方法，其特征在于，包括如下步骤：
步骤1、提供一像素单元，包括：阵列排布的多个子像素(10)、多条平行间隔排列的水平的扫描线(20)、以及多条平行间隔排列的竖直的数据线(30)；
每一行子像素(10)对应一条扫描线(20)，每一列子像素(10)对应一条数据线(20)，每一个子像素(10)均包括：主区薄膜晶体管(T1)、次区薄膜晶体管(T2)、电荷共享薄膜晶体管(T3)、主区液晶电容(C1)以及次区液晶电容(C2)；
设n和m均为正整数，在第n行第m列子像素(10)中：所述主区薄膜晶体管(T1)的栅极电性连接第n条扫描线(G(n))，源极电性连接第m条数据线(Data(m))，漏极电性连接主区液晶电容(C1)的一端；
所述次区薄膜晶体管(T2)的栅极电性连接第n条扫描线(G(n))，源极电性连接第m条数据线(Data(m))，漏极电性连接次区液晶电容(C2)的一端；
所述电荷共享薄膜晶体管(T3)的栅极电性连接第n条扫描线(G(n))，源极电性连接第n+1条扫描线(G(n+1))，漏极电性连接次区液晶电容(C2)的一端；
所述主区液晶电容(C1)与次区液晶电容(C2)的另一端均电性连接彩膜基板公共电压(Ccom)；
步骤2、依次对各行子像素(10)进行扫描；
每一行子像素(10)的扫描过程均为：设当前扫描的子像素(10)行数为第n行，所述第n条扫描线(G(n))提供高电位(VGH)，所述第n+1条扫描线(G(n+1))提供阵列基板公共电压(Acom)，其余的扫描线(20)均提供低电位(VGL)，所述主区薄膜晶体管(T1)、次区薄膜晶体管(T2)、以及电荷共享薄膜晶体管(T3)均打开，所述主区薄膜晶体管(T1)为主区液晶电容(C1)充电，所述次区薄膜晶体管(T2)为次区液晶电容(C1)充电，所述电荷共享薄膜晶体管(T3)为次区液晶电容(C1)放电，使得次区液晶电容(C1)两端的电压低于所述主区液晶电容(C1)两端的电压。
7.如权利要求6所述的像素单元的驱动方法，其特征在于，所述主区液晶电容(C1)的一端为主区像素电极(100)，另一端为彩膜基板公共电极；
所述次区液晶电容(C2)的一端为次区像素电极(200)，另一端为彩膜基板公共电极。
8.如权利要求7所述的像素单元的驱动方法，其特征在于，所述主区像素电极(100)与次区像素电极(200)均为米字型结构，材料均为ITO。
9.如权利要求6所述的像素单元的驱动方法，其特征在于，所述主区薄膜晶体管(T1)的栅极、次区薄膜晶体管(T2)的栅极、电荷共享薄膜晶体管(T3)的栅极、以及扫描线(20)位于第一金属层，所述主区薄膜晶体管(T1)的源极和漏极、次区薄膜晶体管(T2)的源极和漏极、电荷共享薄膜晶体管(T3)的源极和漏极、以及数据线(30)位于与所述第一金属层绝缘层叠的第二金属层。
10.如权利要求6所述的像素单元的驱动方法，其特征在于，所述像素单元在驱动时的扫描方向为从第一行子像素(10)向最后一行子像素(10)进行扫描。
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US20180373105A1 (en) 2018-12-27

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