WO2023004864A1 - 显示面板及显示装置 - Google Patents

显示面板及显示装置 Download PDF

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Publication number
WO2023004864A1
WO2023004864A1 PCT/CN2021/110901 CN2021110901W WO2023004864A1 WO 2023004864 A1 WO2023004864 A1 WO 2023004864A1 CN 2021110901 W CN2021110901 W CN 2021110901W WO 2023004864 A1 WO2023004864 A1 WO 2023004864A1
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WIPO (PCT)
Prior art keywords
thin film
pixel electrode
substrate
film transistor
display panel
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PCT/CN2021/110901
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English (en)
French (fr)
Inventor
李维
Original Assignee
深圳市华星光电半导体显示技术有限公司
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Application filed by 深圳市华星光电半导体显示技术有限公司 filed Critical 深圳市华星光电半导体显示技术有限公司
Priority to US17/623,602 priority Critical patent/US20240036417A1/en
Publication of WO2023004864A1 publication Critical patent/WO2023004864A1/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134345—Subdivided pixels, e.g. for grey scale or redundancy
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/121—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background

Definitions

  • the invention relates to the field of display equipment, in particular to a display panel and a display device.
  • the area of the second pixel electrode is smaller than the area of the first pixel electrode.
  • the orthographic projection of the first wiring on the first pixel electrode corresponds to the midline of the first pixel electrode.
  • the orthographic projection of the second wiring on the second pixel electrode corresponds to the middle line of the second pixel electrode.
  • the present invention also provides a display device, which includes the above-mentioned display panel.
  • FIG. 5 is an enlarged view of the planar structure of the display panel in the dotted box B in FIG. 3;
  • sub-pixel 3 sub-pixel 3; thin film transistor 4;
  • connection should be understood in a broad sense, for example, it can be a fixed connection or a detachable connection. Connected, or integrally connected; it can be mechanically connected, or electrically connected, or can communicate with each other; it can be directly connected, or indirectly connected through an intermediary, and it can be the internal communication of two components or the interaction of two components relation.
  • installation connection
  • connection connection
  • connection should be understood in a broad sense, for example, it can be a fixed connection or a detachable connection. Connected, or integrally connected; it can be mechanically connected, or electrically connected, or can communicate with each other; it can be directly connected, or indirectly connected through an intermediary, and it can be the internal communication of two components or the interaction of two components relation.
  • An embodiment of the present invention provides a display panel.
  • the display panel includes a substrate 8, several scanning lines (Gate) 1, several data lines (Data) 2, several sub-pixels 3, and several shared electrodes. line (S_Com) 6 and common electrode line (A_Com) 7 .
  • the sub-pixels 3 are distributed in an array on the substrate 8 and are electrically connected to the scan lines 1 , the data lines 2 and the shared electrode lines 6 .
  • the scanning lines 1 and the data lines 2 are insulated and intersected on the substrate 8 to form a grid structure. Specifically, the scanning lines 1 are distributed on the substrate 8 at intervals along the first direction, the data lines 2 are distributed on the substrate 8 at intervals along the second direction, and there is a Data line 2.
  • the shared electrode lines 6 are parallel to the data lines 2 , and there is a shared electrode line 6 between two adjacent data lines 2 .
  • the scanning line 1 scans row by row, controls each sub-pixel 3 to turn on row by row, and then inputs a display signal through the data line 2, so that each row of sub-pixels 3 emits light, thereby forming a display screen .
  • first direction and the second direction are perpendicular to each other.
  • first direction is a horizontal direction
  • second direction is a vertical direction.
  • each sub-pixel 3 includes two thin film transistors 4 and two pixel electrodes.
  • the thin film transistor 4 includes a first thin film transistor 41 and a second thin film transistor 42.
  • the orthographic projections on the substrate 8 are coincident.
  • the first TFT 41 has a first gate, a first source and a first drain. Wherein, the first gate is electrically connected to the scan line 1 , and the first source is electrically connected to the data line 2 .
  • the second transistor has a second gate, a second source 421 and a second drain 422 . As shown in FIG. 3 , the second gate is electrically connected to the scan line 1 , and the second source 421 is electrically connected to the shared electrode line 6 .
  • the pixel electrodes include a first pixel electrode 51 and a second pixel electrode 52 , the area of the first pixel electrode 51 is smaller than the area of the second pixel electrode 52 .
  • the first pixel electrode 51 may be a 4-domain pixel electrode
  • the second pixel electrode 52 may be an 8-domain pixel electrode.
  • the first pixel electrode 51 is arranged on one side of the scanning line 1
  • the second pixel electrode 52 is arranged on the side of the scanning line 1 away from the first pixel electrode 51
  • the first thin film transistor 41 and the second thin film transistor 42 are located between the first pixel electrode 51 and the second pixel electrode 52 .
  • the first pixel electrode 51 is electrically connected to the first drain of the first thin film transistor 41 .
  • the second pixel electrode 52 is electrically connected to the first drain of the first thin film transistor 41 and the second drain 422 of the second thin film transistor 42 .
  • the scan line 1 controls the energization of the first pixel electrode 51 and the second pixel electrode 52 through the first thin film transistor 41 , so as to control the display of the sub-pixel 3 .
  • the shared electrode line 6 makes the voltage value on the second pixel electrode 52 different from the voltage value on the first pixel electrode 51 through the second thin film transistor 42, thereby corresponding to the liquid crystal of the first pixel electrode 51.
  • the deflection angle is different from the liquid crystal deflection angle corresponding to the second pixel electrode 52 , thereby increasing the viewing angle of the display panel and improving the display effect of the display panel.
  • the shared electrode lines 6 include a first wiring 61 , a second wiring 62 and a third wiring 63 .
  • the first wiring 61 corresponds to the first pixel electrode 51
  • the orthographic projection of the first wiring 61 on the substrate 8 coincides with the perpendicular bisector 5L of the first pixel electrode 51 .
  • the second wiring 62 corresponds to the second pixel electrode 52
  • the orthographic projection of the second wiring 62 on the substrate 8 coincides with the perpendicular bisector 5L of the second pixel point.
  • the third wiring 63 is located between the first wiring 61 and the third wiring 63, and electrically connects the first wiring 61 and the second wiring 62 to the second thin film transistor 42 connect.
  • the horizontal distance between the third connection terminal and the second drain 422 is equal to 0, so the orthographic projection of the third wiring 63 of the shared electrode line 6 on the substrate 8 is identical to that of the second film
  • the orthographic projections of the transistors 42 on the substrate 8 overlap, so that the second thin film transistor 42 can be directly electrically connected to the main line of the shared electrode line 6, reducing the generation of branch lines on the shared electrode line 6, thereby
  • the overlapping between the shared electrode lines 6 and the scanning lines 1 is reduced, thereby reducing circuit defects caused by particle effects and electrostatic effects at the overlapping positions of the lines, and reducing production costs.
  • the scan line 1 separates the first pixel electrode 51 and the second pixel electrode 52 of the sub-pixel 3 up and down.
  • the common electrode lines 7 are arranged between two adjacent scanning lines 1, and form a number of horizontally connected "II"-shaped structure traces, and several electrode regions 71 surrounded by the "II"-shaped structure traces .
  • the first pixel electrode 51 and the second pixel electrode 52 in the sub-pixel 3 are respectively arranged in two electrode regions 71 on both sides of the scanning line 1 .
  • An embodiment of the present invention also provides a display device, the display device includes the above-mentioned display panel, and the display panel provides a display screen for the display device.
  • the display device may be any electronic product or component with a display function, such as a mobile phone, a notebook computer, a television, and the like.
  • the main line and the branch line of the shared electrode line are combined into one, and the thin film transistor electrically connected to the branch line of the shared electrode line in the prior art is directly connected to the shared electrode line
  • the main line is electrically connected, thereby reducing the branch lines of the shared electrode line, and compared with the prior art, the number of crossing overlaps between the shared electrode line and the scanning line is also reduced by at least half, thereby reducing the overlap of the lines
  • the probability of circuit defects due to particle effects and electrostatic effects reduces the influence of overlapping wiring on circuits, improves the circuit stability of the display panel and the yield rate of the display panel, and reduces the difficulty of maintenance of the display panel.
  • An embodiment of the present invention provides a display panel.
  • the display panel includes a substrate 8, several scanning lines (Gate) 1, several data lines (Data) 2, several sub-pixels 3, and several shared electrodes line (S_Com) 6 and common electrode line (A_Com) 7 .
  • the substrate 8 can be a rigid substrate or a flexible substrate.
  • the substrate 8 may be a glass substrate, a quartz substrate, or the like.
  • materials such as polyimide (PI) can be used for it.
  • the sub-pixels 3 are distributed in an array on the substrate 8 and are electrically connected to the scan lines 1 , the data lines 2 and the shared electrode lines 6 .
  • the scanning lines 1 and the data lines 2 are insulated and intersected on the substrate 8 to form a grid structure. Specifically, the scanning lines 1 are distributed on the substrate 8 at intervals along the first direction, the data lines 2 are distributed on the substrate 8 at intervals along the second direction, and there is a Data line 2.
  • the shared electrode lines 6 are parallel to the data lines 2 , and there is a shared electrode line 6 between two adjacent data lines 2 .
  • the scanning line 1 scans row by row, controls each sub-pixel 3 to turn on row by row, and then inputs a display signal through the data line 2, so that each row of sub-pixels 3 emits light, thereby forming a display screen .
  • the first direction is a horizontal direction
  • the second direction is a vertical direction
  • each sub-pixel 3 includes a thin film transistor 4 and a pixel electrode.
  • the thin film transistor 4 includes a first thin film transistor 41 and a second thin film transistor 42.
  • the orthographic projections on the substrate 8 are coincident.
  • the first TFT 41 has a first gate, a first source and a first drain. Wherein, the first gate is electrically connected to the scan line 1 , and the first source is electrically connected to the data line 2 .
  • the second transistor has a second gate, a second source 421 and a second drain 422 . As shown in FIG. 6 , the second gate is electrically connected to the scan line 1 , and the second source 421 is electrically connected to the shared electrode line 6 .
  • the pixel electrodes include a first pixel electrode 51 and a second pixel electrode 52 , the area of the first pixel electrode 51 is smaller than the area of the second pixel electrode 52 .
  • the first pixel electrode 51 may be a 4-domain pixel electrode
  • the second pixel electrode 52 may be an 8-domain pixel electrode.
  • the first pixel electrode 51 is arranged on one side of the scanning line 1
  • the second pixel electrode 52 is arranged on the side of the scanning line 1 away from the first pixel electrode 51
  • the first thin film transistor 41 and the second thin film transistor 42 are located between the first pixel electrode 51 and the second pixel electrode 52 .
  • first pixel electrode 51 is electrically connected to the first drain of the first thin film transistor 41
  • second pixel electrode 52 is electrically connected to the first drain of the first thin film transistor 41 and the second The second drain 422 of the TFT 42 is electrically connected.
  • the scan line 1 controls the energization of the first pixel electrode 51 and the second pixel electrode 52 through the first thin film transistor 41 , so as to control the display of the sub-pixel 3 .
  • the shared electrode line 6 makes the voltage value on the second pixel electrode 52 different from the voltage value on the first pixel electrode 51 through the second thin film transistor 42, thereby corresponding to the liquid crystal of the first pixel electrode 51.
  • the deflection angle is different from the liquid crystal deflection angle corresponding to the second pixel electrode 52 , thereby increasing the viewing angle of the display panel and improving the display effect of the display panel.
  • the shared electrode lines 6 include a first wiring 61 , a second wiring 62 and a third wiring 63 .
  • the first wiring 61 corresponds to the first pixel electrode 51
  • the orthographic projection of the first wiring 61 on the substrate 8 coincides with the perpendicular bisector 5L of the first pixel electrode 51 .
  • the second wiring 62 corresponds to the second pixel electrode 52
  • the orthographic projection of the second wiring 62 on the substrate 8 coincides with the perpendicular bisector 5L of the second pixel point.
  • the third wiring 63 is located between the first wiring 61 and the third wiring 63, and electrically connects the first wiring 61 and the second wiring 62 to the second thin film transistor 42 connect.
  • the third trace 63 is a "]"-shaped or “]"-shaped folded line, specifically, the third trace 63 in the embodiment of the present invention adopts a "]"-shaped folded line.
  • the third wire 63 has a first connection end, a second connection end and a third connection end.
  • the first connection end is electrically connected to the first wiring 61 .
  • the second connection end is electrically connected to the second wiring 62 .
  • the third connection end is located on the middle section of the third wiring 63 , and the third connection end is electrically connected to the second drain 422 of the second thin film transistor 42 .
  • the horizontal distance between the third connection terminal and the second drain 422 is equal to 0, so the orthographic projection of the third wiring 63 of the shared electrode line 6 on the substrate 8 is identical to that of the second film
  • the orthographic projections of the transistors 42 on the substrate 8 overlap, so that the second thin film transistor 42 can be directly electrically connected to the main line of the shared electrode line 6, reducing the generation of branch lines on the shared electrode line 6, thereby The overlapping between the shared electrode lines 6 and the scanning lines 1 is reduced, thereby reducing circuit defects caused by particle effects and electrostatic effects at the intersections of the lines.
  • the scan line 1 separates the first pixel electrode 51 and the second pixel electrode 52 of the sub-pixel 3 up and down.
  • the common electrode lines 7 are arranged between two adjacent scanning lines 1, and form a number of horizontally connected "II"-shaped structure traces, and several electrode regions 71 surrounded by the "II"-shaped structure traces .
  • the first pixel electrode 51 and the second pixel electrode 52 in the sub-pixel 3 are respectively arranged in two electrode regions 71 on both sides of the scanning line 1 .
  • An embodiment of the present invention also provides a display device, the display device includes the above-mentioned display panel, and the display panel provides a display screen for the display device.
  • the display device may be any electronic product or component with a display function, such as a mobile phone, a notebook computer, a television, and the like.
  • the main line and the branch line of the shared electrode line are combined into one, and the thin film transistor electrically connected to the branch line of the shared electrode line in the prior art is directly connected to the shared electrode line
  • the main line is electrically connected, thereby reducing the branch lines of the shared electrode line, and compared with the prior art, the number of crossing overlaps between the shared electrode line and the scanning line is also reduced by at least half, thereby reducing the overlap of the lines.

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  • Nonlinear Science (AREA)
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  • Engineering & Computer Science (AREA)
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  • Crystallography & Structural Chemistry (AREA)
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Abstract

一种显示面板及显示装置。显示面板包括基板（8）、若干子像素（3）和若干共享电极线（6）。子像素（3）阵列分布在基板（8）上，且每一子像素（3）中包括薄膜晶体管（4）。共享电极线（6）间隔分布在基板（8）上，并与薄膜晶体管（4）电连接。共享电极线（6）在基板（8）上的正投影与薄膜晶体管（4）在基板（8）上正投影部分重合。

Description

显示面板及显示装置 技术领域
本发明涉及显示设备领域，特别是一种显示面板及显示装置。
 背景技术
液晶显示面板（Liquid Crystal Display，LCD）具有低成本、低功耗和高性能的优点，在电子、数码产品等领域有着广泛的运用。所述液晶显示面板通常由彩色滤光片基板、薄膜晶体管阵列基板以及配置于两基板间的液晶层所构成，并分别在两基板的相对内侧设置像素电极、公共电极，通过施加电压控制液晶分子改变方向，将背光模组的光线折射出来产生画面。而液晶显示面板中像素单元的驱动则需通过栅极驱动电路和源极驱动电路驱动相应的扫描线（Gate）及数据线（Data）加以实现。
在液晶显示面板的GSS（Gate & S_Com）电路中，由于扫描线（Gate）与共享电极线（S_Com）之间交叉重叠地方多，而在走线的交叠出容易产生粒子效应和静电效应，而粒子效应和静电效应会影响显示面板中电路的稳定性，造成电路短路等问题，进而影响显示面板的显示，降低了液晶显示面板的良品率。并且，部分GSS电路故障中，很难通过设备检测出或定位到电路缺陷的位置，但又由于电路缺陷存在严重影响了面板的显示，导致生产出的面板直接报废，提高了生产成本。
 技术问题
本发明的目的是提供一种显示面板及显示装置，以解决现有技术中显示面板的电路稳定性差、生产良品率低以及检测难度高等技术问题。
 技术解决方案
为实现上述目的，本发明提供一种显示面板，所述显示面板包括基板、若干子像素、若干共享电极线、若干扫描线以及若干数据线。所述子像素阵列分布在所述基板上，且每一子像素中包括薄膜晶体管。所述共享电极线沿第二方向间隔分布在所述基板上，并与所述薄膜晶体管电连接。所述共享电极线在所述基板上的正投影与所述薄膜晶体管在所述基板上正投影部分重合。所述扫描线沿第一方向间隔分布在所述基板上，每一扫描线与相邻一列的子像素电连接。所述数据线沿第二方向间隔分布在所述基板上，且相邻两根共享电极线之间设有一数据线。所述第一方向垂直于所述第二方向。
进一步地，所述子像素包括至少两个薄膜晶体管，所述薄膜晶体管包括第一薄膜晶体管和第二薄膜晶体管。所述第一薄膜晶体管与所述扫描线和所述数据线电连接。所述第二薄膜晶体管与所述扫描线和所述共享电极线电连接。
进一步地，所述共享电极线与所述第二薄膜晶体管之间的水平距离等于0。
进一步地，所述子像素还包括第一像素电极和第二像素电极。所述第一像素电极设于所述扫描线的一侧，并与所述第一薄膜晶体管电连接。所述第二像素电极设于所述扫描线远离所述第一像素电极的一侧，并与所述第一薄膜晶体管和所述第二薄膜晶体管电连接。
进一步地，所述第二像素电极的面积小于所述第一像素电极的面积。
进一步地，所述共享电极线包括第一走线、第二走线以及第三走线。所述第一走线与所述第一像素电极对应设置。所述第二走线与所述第二像素电极对应设置。所述第三走线连接所述第一走线和所述第二走线，并与所述第二薄膜晶体管电连接。
进一步地，所述第一走线在所述第一像素电极上的正投影与所述第一像素电极的中分线相对应。所述第二走线在所述第二像素电极上的正投影与所述第二像素电极的中分线相对应。
进一步地，所述薄膜晶体管在所述基板上的正投影与所述扫描线在所述基板上的正投影重合。
进一步地，所述显示面板还包括公共电极线，所述公共电极线围绕像素电极设置。
本发明中还提供一种显示装置，所述显示装置包括如上所述的显示面板。
 有益效果
本发明的优点是：本发明中所提供的一种显示面板和显示装置，通过将共享电极线的主线路与分支线路二合一，使薄膜晶体管直接与共享电极线的主线路电连接，从而减少共享电极线的分支线路，减少了共享电极线与扫描线之间的交叉重叠，进而减少走线交叠处由于粒子效应和静电效应而产生的电路缺陷，减少交叠的走线对电路的影响，提升显示面板的电路稳定性以及显示面板的良品率，并降低显示面板的检修难度。
 附图说明
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明实施例1中显示面板的平面结构示意图；
图2为图1虚线框A中显示面板的平面结构放大图；
图3为本发明实施例1中显示面板中部分部件的平面结构透视图；
图4为本发明实施例2中显示面板的平面结构示意图；
图5为图3虚线框B中显示面板的平面结构放大图；
图6为本发明实施例2中显示面板中部分部件的平面结构透视图。
图中部件表示如下：
扫描线1；数据线2；
子像素3；薄膜晶体管4；
第一薄膜晶体管41；第二薄膜晶体管42；
第二源极421；第二漏极422；
第一像素电极51；第二像素电极52；
垂直平分线5L；共享电极线6；
第一走线61；第二走线62；
第三走线63；公共电极线7；
电极区域71；基板8。
 本发明的实施方式
以下参考说明书附图介绍本发明的优选实施例，证明本发明可以实施，所述发明实施例可以向本领域中的技术人员完整介绍本发明，使其技术内容更加清楚和便于理解。本发明可以通过许多不同形式的发明实施例来得以体现，本发明的保护范围并非仅限于文中提到的实施例。
在附图中，结构相同的部件以相同数字标号表示，各处结构或功能相似的组件以相似数字标号表示。附图所示的每一部件的尺寸和厚度是任意示出的，本发明并没有限定每个组件的尺寸和厚度。为了使图示更清晰，附图中有些地方适当夸大了部件的厚度。
本发明的说明书和权利要求书以及上述附图中的术语“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。应当理解，这样描述的对象在适当情况下可以互换。此外，术语“包括”和“具有”以及他们的任何变形，意图在于覆盖不排他的包含。
在本发明的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接或可以相互通讯；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通或两个元件的相互作用关系。对于本领域的普通技术人员而言，可以根据具体情况理解上述术语在本申请中的具体含义。
实施例1
本发明实施例中提供一种显示面板，如图1所示，所述显示面板包括一基板8、若干扫描线（Gate）1、若干数据线（Data）2、若干子像素3，若干共享电极线（S_Com）6以及公共电极线（A_Com）7。
所述基板8可以为硬性基板或柔性基板。当所述基板8为硬性基板时，其可以为玻璃基板、石英基板等。让所述基板8为柔性基板时，其可以采用聚酰亚胺（PI）等材料。
所述子像素3阵列分布在所述基板8上，并与所述扫描线1、所述数据线2以及所述共享电极线6电性连接。所述扫描线1与所述数据线2绝缘相交在所述基板8上，形成网格状结构。具体的，所述扫描线1沿第一方向间隔分布在所述基板8上，所述数据线2沿第二方向间隔分布在所述基板8上，并且相邻两列子像素3之间具有一数据线2。所述共享电极线6平行于所述数据线2，并且相邻的两根数据线2之间具有一共享电极线6。在各子像素3需要显示时，所述扫描线1逐行进行扫描，控制各子像素3逐行打开，再通过所述数据线2输入显示信号，使得各列子像素3发光，从而形成显示画面。
其中，所述第一方向与所述第二方向互相垂直，在本发明实施例中，所述第一方向为水平方向，所述第二方向为垂直方向。
如图2所述，每一子像素3中都包括两个薄膜晶体管4和两个像素电极。
所述薄膜晶体管4包括一第一薄膜晶体管41以及一第二薄膜晶体管42，所述第一薄膜晶体管41和所述第二薄膜晶体管42在所述基板8上的正投影与所述扫描线1在所述基板8上的正投影重合。所述第一薄膜晶体管41具有一第一栅极、一第一源极以及一第一漏极。其中，所述第一栅极与所述扫描线1电连接，所述第一源极与所述数据线2电连接。所述第二晶体管具有一第二栅极、一第二源极421以及一第二漏极422。如图3所示，所述第二栅极与所述扫描线1电连接，所述第二源极421与所述共享电极线6电连接。
如图2所示，所述像素电极包括一第一像素电极51以及一第二像素电极52，所述第一像素电极51的面积小于所述第二像素电极52的面积。具体的，所述第一像素电极51可以采用4畴像素电极，所述第二像素电极52可以采用8畴像素电极。所述第一像素电极51设于所述扫描线1的一侧，所述第二像素电极52设于所述扫描线1远离所述第一像素电极51的一侧，所述第一薄膜晶体管41和所述第二薄膜晶体管42位于所述第一像素电极51与所述第二像素电极52之间。所述第一像素电极51与所述第一薄膜晶体管41的第一漏极电连接。如图3所示，所述第二像素电极52与所述第一薄膜晶体管41的第一漏极和所述第二薄膜晶体管42的第二漏极422电连接。
所述扫描线1通过所述第一薄膜晶体管41控制第一像素电极51和第二像素电极52的通电情况，从而控制子像素3的显示。所述共享电极线6通过所述第二薄膜晶体管42使所述第二像素电极52上的电压值与所述第一像素电极51上的电压值不同，从而对应于第一像素电极51的液晶偏转角度与对应于第二像素电极52的液晶偏转角度不同，进而加大显示面板的可视角度，提升显示面板的显示效果。
如图3所示，所述共享电极线6包括第一走线61、第二走线62以及第三走线63。所述第一走线61与所述第一像素电极51相对应，并且所述第一走线61在所述基板8上的正投影与所述第一像素电极51的垂直平分线5L重合。所述第二走线62与所述第二像素电极52相对应，并且所述第二走线62在所述基板8上的正投影与所述第二像素点的垂直平分线5L重合。所述第三走线63位于所述第一走线61和第三走线63之间，并且将所述第一走线61和所述第二走线62与所述第二薄膜晶体管42电连接。
所述第三走线63为直线，其具有一第一连接端、一第二连接端以及一第三连接端。所述第一连接端与所述第一走线61电连接。所述第二连接端与所述第二走线62电连接。所述第三连接端位于所述第一连接端和所述第二连接端之间，并且所述第三连接端与所述第二薄膜晶体管42的第二漏极422电连接。
所述第三连接端与所述第二漏极422之间的水平距离等于0，因此所述共享电极线6的第三走线63在所述基板8上的正投影与所述第二薄膜晶体管42在所述基板8上的正投影部分重合，使所述第二薄膜晶体管42能够直接与所述共享电极线6的主线路电连接，减少了共享电极线6上分支线路的产生，从而减少了共享电极线6与所述扫描线1之间的交叉重叠，进而减少走线交叠处由于粒子效应和静电效应所产生的电路缺陷，降低生产成本。
如图1所示，所述扫描线1将所述子像素3的第一像素电极51和所述第二像素电极52上下分离开。所述公共电极线7设于相邻的两根扫描线1之间，并形成若干水平向相连的“Ⅱ”形结构走线，以及被“Ⅱ”形结构走线围出的若干电极区域71。所述子像素3中的第一像素电极51和第二像素电极52分别设于所述扫描线1两侧的两个电极区域71中。
本发明实施例中还提供一种显示装置，所述显示装置中包括如上所述的显示面板，所述显示面板为所述显示装置提供显示画面。所述显示装置可以为任何具有显示功能的电子产品或部件，例如手机、笔记本电脑、电视机等。
本发明实施例中所提供的显示面板和显示装置，将共享电极线的主线路与分支线路二合一，将现有技术中与共享电极线的分支线路电连接的薄膜晶体管直接与共享电极线的主线路电连接，从而减少共享电极线的分支线路，与现有技术相比共享电极线与扫描线之间的交叉重叠次数也随之减少了至少一半，进而也减少了走线交叠处由于粒子效应和静电效应而产生电路缺陷的概率，减少交叠的走线对电路的影响，提升显示面板的电路稳定性以及显示面板的良品率，并降低显示面板的检修难度。
实施例2
本发明实施例中提供一种显示面板，如图4所述，所述显示面板包括一基板8、若干扫描线（Gate）1、若干数据线（Data）2、若干子像素3，若干共享电极线（S_Com）6以及公共电极线（A_Com）7。
所述基板8可以为硬性基板或柔性基板。当所述基板8为硬性基板时，其可以为玻璃基板、石英基板等。让所述基板8为柔性基板时，其可以采用聚酰亚胺（PI）等材料。
所述子像素3阵列分布在所述基板8上，并与所述扫描线1、所述数据线2以及所述共享电极线6电性连接。所述扫描线1与所述数据线2绝缘相交在所述基板8上，形成网格状结构。具体的，所述扫描线1沿第一方向间隔分布在所述基板8上，所述数据线2沿第二方向间隔分布在所述基板8上，并且相邻两列子像素3之间具有一数据线2。所述共享电极线6平行于所述数据线2，并且相邻的两根数据线2之间具有一共享电极线6。在各子像素3需要显示时，所述扫描线1逐行进行扫描，控制各子像素3逐行打开，再通过所述数据线2输入显示信号，使得各列子像素3发光，从而形成显示画面。
其中，所述第一方向为水平方向，所述第二方向为垂直方向。
如图5所述，每一子像素3中都包括薄膜晶体管4和像素电极。
所述薄膜晶体管4包括一第一薄膜晶体管41以及一第二薄膜晶体管42，所述第一薄膜晶体管41和所述第二薄膜晶体管42在所述基板8上的正投影与所述扫描线1在所述基板8上的正投影重合。所述第一薄膜晶体管41具有一第一栅极、一第一源极以及一第一漏极。其中，所述第一栅极与所述扫描线1电连接，所述第一源极与所述数据线2电连接。所述第二晶体管具有一第二栅极、一第二源极421以及一第二漏极422。如图6所示，所述第二栅极与所述扫描线1电连接，所述第二源极421与所述共享电极线6电连接。
如图5所示，所述像素电极包括一第一像素电极51以及一第二像素电极52，所述第一像素电极51的面积小于所述第二像素电极52的面积。具体的，所述第一像素电极51可以采用4畴像素电极，所述第二像素电极52可以采用8畴像素电极。所述第一像素电极51设于所述扫描线1的一侧，所述第二像素电极52设于所述扫描线1远离所述第一像素电极51的一侧，所述第一薄膜晶体管41和所述第二薄膜晶体管42位于所述第一像素电极51与所述第二像素电极52之间。并且，所述第一像素电极51与所述第一薄膜晶体管41的第一漏极电连接，所述第二像素电极52与所述第一薄膜晶体管41的第一漏极和所述第二薄膜晶体管42的第二漏极422电连接。
所述扫描线1通过所述第一薄膜晶体管41控制第一像素电极51和第二像素电极52的通电情况，从而控制子像素3的显示。所述共享电极线6通过所述第二薄膜晶体管42使所述第二像素电极52上的电压值与所述第一像素电极51上的电压值不同，从而对应于第一像素电极51的液晶偏转角度与对应于第二像素电极52的液晶偏转角度不同，进而加大显示面板的可视角度，提升显示面板的显示效果。
如图6所示，所述共享电极线6包括第一走线61、第二走线62以及第三走线63。所述第一走线61与所述第一像素电极51相对应，并且所述第一走线61在所述基板8上的正投影与所述第一像素电极51的垂直平分线5L重合。所述第二走线62与所述第二像素电极52相对应，并且所述第二走线62在所述基板8上的正投影与所述第二像素点的垂直平分线5L重合。所述第三走线63位于所述第一走线61和第三走线63之间，并且将所述第一走线61和所述第二走线62与所述第二薄膜晶体管42电连接。
所述第三走线63为“]”形或“〕”形折线，具体的，本发明实施例中的第三走线63所采用的为“]”形折线。所述第三走线63具有一第一连接端、一第二连接端以及一第三连接端。所述第一连接端与所述第一走线61电连接。所述第二连接端与所述第二走线62电连接。所述第三连接端位于所述第三走线63的中间段上，并且所述第三连接端与所述第二薄膜晶体管42的第二漏极422电连接。
所述第三连接端与所述第二漏极422之间的水平距离等于0，因此所述共享电极线6的第三走线63在所述基板8上的正投影与所述第二薄膜晶体管42在所述基板8上的正投影部分重合，使所述第二薄膜晶体管42能够直接与所述共享电极线6的主线路电连接，减少了共享电极线6上分支线路的产生，从而减少了共享电极线6与所述扫描线1之间的交叉重叠，进而减少走线交叠处由于粒子效应和静电效应所产生的电路缺陷。
如图4所示，所述扫描线1将所述子像素3的第一像素电极51和所述第二像素电极52上下分离开。所述公共电极线7设于相邻的两根扫描线1之间，并形成若干水平向相连的“Ⅱ”形结构走线，以及被“Ⅱ”形结构走线围出的若干电极区域71。所述子像素3中的第一像素电极51和第二像素电极52分别设于所述扫描线1两侧的两个电极区域71中。
本发明实施例中还提供一种显示装置，所述显示装置中包括如上所述的显示面板，所述显示面板为所述显示装置提供显示画面。所述显示装置可以为任何具有显示功能的电子产品或部件，例如手机、笔记本电脑、电视机等。
本发明实施例中所提供的显示面板和显示装置，将共享电极线的主线路与分支线路二合一，将现有技术中与共享电极线的分支线路电连接的薄膜晶体管直接与共享电极线的主线路电连接，从而减少共享电极线的分支线路，与现有技术相比共享电极线与扫描线之间的交叉重叠次数也随之减少了至少一半，进而也减少了走线交叠处由于粒子效应和静电效应而产生电路缺陷的概率，减少交叠的走线对电路的影响，提升显示面板的电路稳定性以及显示面板的良品率，并降低显示面板的检修难度，降低生产成本。
虽然在本文中参照了特定的实施方式来描述本发明，但是应该理解的是，这些实施例仅仅是本发明的原理和应用的示例。因此应该理解的是，可以对示例性的实施例进行许多修改，并且可以设计出其他的布置，只要不偏离所附权利要求所限定的本发明的精神和范围。应该理解的是，可以通过不同于原始权利要求所描述的方式来结合不同的从属权利要求和本文中所述的特征。还可以理解的是，结合单独实施例所描述的特征可以使用在其他所述实施例中。

Claims (10)

  1. 一种显示面板，其包括：
    基板；
    若干子像素，阵列分布在所述基板上，且每一子像素中包括薄膜晶体管；
    若干共享电极线，沿第二方向间隔分布在所述基板上，并与所述薄膜晶体管电连接；
    所述共享电极线在所述基板上的正投影与所述薄膜晶体管在所述基板上正投影部分重合；
    若干扫描线，沿第一方向间隔分布在所述基板上，每一扫描线与相邻一列的子像素电连接；以及
    若干数据线，沿所述第二方向间隔分布在所述基板上，且相邻两根共享电极线之间设有一数据线；
    所述第一方向垂直于所述第二方向。
  2. 如权利要求1所述的显示面板，其中，所述子像素包括至少两个薄膜晶体管，所述薄膜晶体管包括：
    第一薄膜晶体管，与所述扫描线和所述数据线电连接；以及
    第二薄膜晶体管，与所述扫描线和所述共享电极线电连接。
  3. 如权利要求2所述的显示面板，其中，所述共享电极线与所述第二薄膜晶体管之间的水平距离等于0。
  4. 如权利要求2所述的显示面板，其中，所述子像素还包括：
    第一像素电极，设于所述扫描线的一侧，并与所述第一薄膜晶体管电连接；以及
    第二像素电极，设于所述扫描线远离所述第一像素电极的一侧，并与所述第一薄膜晶体管和所述第二薄膜晶体管电连接。
  5. 如权利要求4所述的显示面板，其中，所述第二像素电极的面积小于所述第一像素电极的面积。
  6. 如权利要求4所述的显示面板，其中，所述共享电极线包括：
    第一走线，其与所述第一像素电极对应设置；
    第二走线，其与所述第二像素电极对应设置；以及
    第三走线，连接所述第一走线和所述第二走线，并与所述第二薄膜晶体管电连接。
  7. 如权利要求6所述的显示面板，其中，
    所述第一走线在所述第一像素电极上的正投影与所述第一像素电极的中分线相对应；以及
    所述第二走线在所述第二像素电极上的正投影与所述第二像素电极的中分线相对应。
  8. 如权利要求1所述的显示面板，其中，所述薄膜晶体管在所述基板上的正投影与所述扫描线在所述基板上的正投影重合。
  9. 如权利要求1所述的显示面板，其还包括：
    公共电极线，围绕像素电极设置。
  10. 一种显示装置，其中，包括如权利要求1所述的显示面板。
PCT/CN2021/110901 2021-07-29 2021-08-05 显示面板及显示装置 WO2023004864A1 (zh)

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