CN106816410B - 阵列基板及其制作方法 - Google Patents

阵列基板及其制作方法 Download PDF

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Publication number
CN106816410B
CN106816410B CN201710175245.1A CN201710175245A CN106816410B CN 106816410 B CN106816410 B CN 106816410B CN 201710175245 A CN201710175245 A CN 201710175245A CN 106816410 B CN106816410 B CN 106816410B
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layer
drain electrode
ohmic contact
amorphous silicon
array substrate
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CN106816410A (zh
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谭志威
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to CN201710175245.1A priority Critical patent/CN106816410B/zh
Priority to US15/529,508 priority patent/US10181479B2/en
Priority to PCT/CN2017/080507 priority patent/WO2018170971A1/zh
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    • G—PHYSICS
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    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
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    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
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    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Nonlinear Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Mathematical Physics (AREA)
  • Optics & Photonics (AREA)
  • Manufacturing & Machinery (AREA)
  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)

Abstract

本发明提供一种阵列基板的制作方法及阵列基板。本发明的阵列基板的制作方法，结合COA技术与BOA技术，先在衬底基板上制作黑色矩阵，再在黑色矩阵上方制作顶栅型的TFT器件，最后在TFT器件上方制作彩色滤光层，其中，像素电极直接设于漏极上与漏极相接触，该制作方法可以提高TFT器件的电学性能及性能稳定性，提升显示面板的品质，相对于现有阵列基板的制作方法，缩减了所使用的光罩和制程，制作方法简单，节约生产成本。本发明的阵列基板，制作方法简单，TFT器件电学性能好、性能稳定，可提升显示面板的品质。

Description

阵列基板及其制作方法
技术领域
本发明涉及显示技术领域，尤其涉及一种阵列基板及其制作方法。
背景技术
在显示技术领域，有源式液晶显示器(Active Matrix Liquid Crystal Display，AMLCD)是目前最广泛使用的平板显示器之一，液晶面板是有源式液晶显示器的核心组成部分。传统的液晶面板通常是由一彩色滤光片(Color Filter，CF)基板、一薄膜晶体管(ThinFilm Transistor，TFT)阵列基板以及一配置于两基板间的液晶层(Liquid CrystalLayer)所构成，其工作原理是在两片平行的玻璃基板当中放置液晶分子，两片玻璃基板中间有许多垂直和水平的细小电线，通过通电与否来控制液晶分子改变方向，将背光模组的光线折射出来产生画面。其中薄膜晶体管阵列基板上制备TFT阵列，用于驱动液晶的旋转，控制每个像素的显示。
薄膜晶体管具有多种结构，目前，主流的AMLCD多采用底栅型TFT阵列基板结构，如图1所示，为现有一种底栅型TFT阵列基板的结构示意图，所述底栅型TFT阵列基板包括玻璃基板100、设于玻璃基板100上的栅极200、设于栅极200与玻璃基板100上的栅极绝缘层(GI)300、设于栅极绝缘层300上的有源层(active layer)400、设于有源层400与栅极绝缘层300上的间隔的源极510和漏极520、设于源极510、漏极520、有源层400与栅极绝缘层300上的钝化层(PV)600。该底栅型TFT阵列基板的制作方法包括：
步骤101、提供一玻璃基板100，在所述玻璃基板100上沉积第一金属层(M1)，对第一金属层进行图案化处理，得到栅极200；在栅极200与玻璃基板100上沉积形成栅极绝缘层300；
步骤102、在所述栅极绝缘层300上依次沉积未掺杂非晶硅层(a-si)与硼离子掺杂非晶硅层，采用灰阶光罩(gray tone Mask)或半色调光罩(half tone Mask)等高阶光罩对未掺杂非晶硅层与硼离子掺杂非晶硅层进行图案化处理，得到有源层400，其中，硼离子掺杂非晶硅层经图案化后形成有源层400的N型欧姆接触层410；
步骤103、在所述有源层400及栅极绝缘层300上沉积第二金属层(M2)，对所述第二金属层进行图案化处理，得到源极510与漏极520；
步骤104、在所述源极510、漏极520、有源层400与栅极绝缘层300上沉积形成钝化层600。
另外，底栅型TFT阵列基板制作过程中，在形成钝化层600之后，为实现漏极520与像素电极的连接，还需要在所述钝化层600上形成对应于所述漏极520上方的过孔。
现在主流的AMLCD采用底栅型TFT阵列基板主要出于下面考量：一方面底栅型TFT的栅极200可以作为遮光层，屏蔽来自于背光(back light)模组的光线对于有源层400的照射，从而避免产生光电流影响器件稳定性；另一方面栅极绝缘层300/非晶硅层/硼离子掺杂非晶硅层的薄膜沉积顺序合理，界面影响小，蚀刻方便。
然而，在形成过孔的制程中，很容易发生因为杂质(particle)等因素造成的过孔异常或与像素电极桥接不良，从而降低产品良率。另外主流AMLCD中黑色矩阵(BlackMatrix，BM)和彩色滤光层通常制作在CF基板侧，这样不仅会使CF基板制程复杂，更因为要考虑CF基板与TFT阵列基板对组时的偏移量而不得不加宽黑色矩阵，从而使产品的开口率下降。
COA(Color Filter on Array)技术是将彩色滤光层即R、G、B色阻直接制备在的阵列基板上的技术，而BOA(Black Matrix on Array)技术是将黑色矩阵直接制备在的阵列基板上的技术。因为COA显示面板中RGB色阻制作在TFT阵列基板之上，不存在彩膜基板与阵列基板的对位问题，所以可以降低显示面板制备过程中对盒制程的难度，避免了对盒时的误差，然而现有COA型阵列基板中，彩色滤光层通常设于TFT器件与像素电极之间，从而通常需要在彩色滤光层上设置开口(OPEN)以实现层间的连接，这在后续制程中很容易导致气泡(bubble)的产生。
发明内容
本发明的目的在于提供一种阵列基板的制作方法，可以提高TFT器件的电学性能及性能稳定性，提升显示面板的品质，且缩减了所使用的光罩和制程，制作方法简单，节约生产成本。
本发明的目的还在于提供一种阵列基板，制作方法简单，TFT器件电学性能及性能稳定高，可提升显示面板的品质。
为实现上述目的，本发明提供一种阵列基板的制作方法，包括如下步骤：
步骤S1、提供一衬底基板，在所述衬底基板上涂布一层黑色光阻材料，经曝光显影后，得到黑色矩阵；然后在黑色矩阵、及衬底基板上沉积形成隔离层；
步骤S2、在所述隔离层上依次沉积第二金属层、及离子掺杂非晶硅层，对所述第二金属层、及离子掺杂非晶硅层进行图案化处理，由所述第二金属层得到间隔的源极和漏极，由所述离子掺杂非晶硅层得到位于所述源极和漏极上的欧姆接触层，所述欧姆接触层的尺寸小于所述源极和漏极的尺寸而露出所述漏极的部分上表面；
步骤S3、在经过步骤S2的衬底基板上沉积透明导电膜，对所述透明导电膜进行图案化处理，得到像素电极，所述像素电极位于所述漏极、及隔离层上，与所述欧姆接触层露出的漏极相接触；
步骤S4、在经过步骤S3的衬底基板上沉积非晶硅层，对所述非晶硅层进行图案化处理，得到半导体层，所述半导体层位于所述欧姆接触层、及隔离层上，与所述欧姆接触层共同构成有源层；
步骤S5、在经过步骤S4的衬底基板上依次沉积栅极绝缘层、第一金属层，对所述第一金属层进行图案化处理，得到对应位于所述有源层上方的栅极；
步骤S6、在所述栅极绝缘层、及栅上沉积钝化层；
步骤S7、在所述钝化层上形成彩色滤光膜层。
所述步骤S2中对所述第二金属层、及离子掺杂非晶硅层采用一道光罩进行图案化处理，其具体过程为：在所述离子掺杂非晶硅层上涂布光阻材料，使用所述光罩对该光阻材料进行曝光显影后，得到光阻层，以该光阻层为遮蔽层，首先对所述离子掺杂非晶硅层进行干法蚀刻，得到欧姆接触层，然后对所述第二金属层进行湿法蚀刻，得到源极和漏极。
所述离子掺杂非晶硅层与所述非晶硅层均采用化学气相沉积法制备；
所述离子掺杂非晶硅层与所述非晶硅层在制备方法上的区别为：沉积所述离子掺杂非晶硅层时在化学气相沉积过程中通入硼烷气体。
所述隔离层、栅极绝缘层、及钝化层均采用化学气相沉积法制备；
所述隔离层、栅极绝缘层、及钝化层均为氮化硅层、氧化硅层、或氮化硅层与氧化硅层的堆栈组合。
所述第二金属层与所述第一金属层均采用物理气相沉积法制备；
所述第二金属层与所述第一金属层的材料均为钼、铝、铜、钛中的一种或多种。
本发明还提供一种阵列基板，包括衬底基板、设于所述衬底基板上的黑色矩阵、设于所述黑色矩阵、及衬底基板上的隔离层、设于所述隔离层上的源极和漏极、设于所述源极和漏极上的欧姆接触层、设于所述漏极、及隔离层上的像素电极、设于所述欧姆接触层、及隔离层上的半导体层、设于所述像素电极、半导体层、及隔离层上的栅极绝缘层、设于所述栅极绝缘层上的栅极、设于所述栅极绝缘层、及栅极上的钝化层、以及设于所述钝化层上的彩色滤光膜层；
其中，所述欧姆接触层的尺寸小于所述源极和漏极的尺寸而露出所述漏极的部分上表面；所述像素电极与所述欧姆接触层露出的漏极相接触；所述半导体层与所述欧姆接触层分别通过非晶硅材料层和离子掺杂非晶硅材料层形成，所述半导体层与所述欧姆接触层共同构成有源层。
所述欧姆接触层与所述源极和漏极通过一道光罩经图案化处理形成，其中所述欧姆接触层通过干法蚀刻形成，所述源极和漏极通过湿法蚀刻形成。
所述欧姆接触层与所述半导体层均采用化学气相沉积法制备；
所述欧姆接触层与所述半导体层在制备方法上的区别为：制备所述欧姆接触层时在化学气相沉积过程中通入硼烷气体。
所述隔离层、栅极绝缘层、及钝化层均采用化学气相沉积法制备；
所述隔离层、栅极绝缘层、及钝化层均为氮化硅层、氧化硅层、或氮化硅层与氧化硅层的堆栈组合。
所述源极、漏极、及栅极均采用物理气相沉积法制备；
所述源极、漏极、及栅极的材料均为钼、铝、铜、钛中的一种或多种。
本发明的有益效果：本发明的阵列基板的制作方法，先在衬底基板上制作黑色矩阵，再在黑色矩阵上方制作顶栅型的TFT器件，最后在TFT器件上方制作彩色滤光层，其中，像素电极直接设于漏极上与漏极相接触，而不用通过在绝缘层上设置过孔而进行连接，这也省略了彩色滤光层上开口的设置，可以有效减小COA型阵列基板上气泡的产生，再者，黑色矩阵可以作为遮光层用于防止显示面板中背光模组的光线对有源层的照射，从而提高器件的稳定性，再者，最上层的彩色滤光层可以将整个阵列基板的表面平坦化，这样便于显示面板中盒厚(cell gap)的控制，也不会导致液晶倒向变乱的情况出现，从而提升了显示面板的品质，再者，构成有源层的欧姆接触层与源极和漏极共同采用一道光罩图案化形成，而半导体层通过另一道光罩图案化形成，从而不需要采用高阶光罩来制作有源层上的沟道区，相当于利用一道普通光罩工序即完成了有源层的制作，达到缩短生产周期、节约成本的目的，并且这也不会存在因蚀刻形成沟道区而需加厚半导体层的问题，进而可以制作出较薄的半导体层，从而提高TFT器件的电学性能。本发明的阵列基板，制作方法简单，TFT器件电学性能好、性能稳定，可提升显示面板的品质。
附图说明
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其他有益效果显而易见。
附图中，
图1为现有一种底栅型TFT阵列基板的结构示意图；
图2为本发明的阵列基板的制作方法的流程示意图；
图3-4为本发明的阵列基板的制作方法的步骤S1的示意图；
图5-6为本发明的阵列基板的制作方法的步骤S2的示意图；
图7为本发明的阵列基板的制作方法的步骤S3的示意图；
图8-9为本发明的阵列基板的制作方法的步骤S4的示意图；
图10-11为本发明的阵列基板的制作方法的步骤S5的示意图；
图12为本发明的阵列基板的制作方法的步骤S6的示意图；
图13为本发明的阵列基板的制作方法的步骤S7的示意图暨本发明的阵列基板的结构示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图2，本发明提供一种阵列基板的制作方法，包括如下步骤：
步骤S1、如图3-4所示，提供一衬底基板10，在所述衬底基板10上涂布一层黑色光阻材料，经曝光显影后，得到黑色矩阵20；然后在黑色矩阵20、及衬底基板10上沉积形成隔离层30。
具体地，所述隔离层30用于隔离黑色矩阵20的光阻材料对后续制成的TFT器件的污染，需要注意的是由于黑色矩阵20为光阻材料，在后续制程中应尽量采用低温制程，避免因光阻热稳定性差而造成的边缘效应(side effect)。
具体地，所述隔离层30采用采用化学气相沉积法(Chemical Vapor Deposition，CVD)制备；所述隔离层30为氮化硅(SiNx)层、氧化硅(SiO2)层、或氮化硅层与氧化硅层的堆栈组合，本实施例中优选为氮化硅层。
步骤S2、如图5-6所示，在所述隔离层30上依次沉积第二金属层40’、及离子掺杂非晶硅层51’，对所述第二金属层40’、及离子掺杂非晶硅层51’进行图案化处理，由所述第二金属层40’得到间隔的源极41和漏极42，由所述离子掺杂非晶硅层51’得到位于所述源极41和漏极42上的欧姆接触层51，所述欧姆接触层51的尺寸小于所述源极41和漏极42的尺寸而露出所述漏极42的部分上表面。
具体地，所述第二金属层40’采用物理气相沉积法(Physical Vapor Deposition，PVD)制备；所述第二金属层40’的材料为钼(Mo)、铝(Al)、铜(Cu)、钛(Ti)中的一种或多种。
具体地，所述步骤S2中对所述第二金属层40’、及离子掺杂非晶硅层51’采用一道光罩进行图案化处理，其具体过程为：在所述离子掺杂非晶硅层51’上涂布光阻材料，使用该光罩对该光阻材料进行曝光显影后，得到光阻层，以该光阻层为遮蔽层，首先对所述离子掺杂非晶硅层51’进行干法蚀刻，得到欧姆接触层51，然后对所述第二金属层40’进行湿法蚀刻，得到源极41和漏极42；由于干法蚀刻相对于湿法蚀刻在横向上蚀刻的程度较大，因此，通过干法蚀刻得到的欧姆接触层51比通过湿法蚀刻得到的源极41和漏极42，在尺寸上要小一些，从而能够漏出漏极42的上表面的一部分，以利于后续所述漏极42与像素电极进行连接。
步骤S3、如图7所示，在经过步骤S2的衬底基板10上沉积透明导电膜，对所述透明导电膜进行图案化处理，得到像素电极60，所述像素电极60位于所述漏极42、及隔离层30上，与所述欧姆接触层51露出的漏极42相接触。
具体地，所述透明导电膜采用物理气相沉积法制备；所述透明导电膜的材料为氧化铟锡(ITO)。
步骤S4、如图8-9所示，在经过步骤S3的衬底基板10上沉积非晶硅层52’，对所述非晶硅层52’进行图案化处理，得到半导体层52，所述半导体层52位于所述欧姆接触层51、及隔离层30上，与所述欧姆接触层51共同构成有源层50。
具体地，所述步骤S2中形成的离子掺杂非晶硅层51’与所述步骤S4中形成非晶硅层52’均采用化学气相沉积法制备。
具体地，所述离子掺杂非晶硅层51’与所述非晶硅层52’在制备方法上的区别为：沉积所述离子掺杂非晶硅层51’时在化学气相沉积过程中通入硼烷气体，其中，所述硼烷气体具体为乙硼烷气体，所述欧姆接触层51为N型欧姆接触层。
步骤S5、如图10-11所示，在经过步骤S4的衬底基板10上依次沉积栅极绝缘层70、第一金属层80’，对所述第一金属层80’进行图案化处理，得到对应位于所述有源层50上方的栅极80。
具体地，所述栅极绝缘层70采用化学气相沉积法制备。
具体地，所述栅极绝缘层70为氮化硅层、氧化硅层、或氮化硅层与氧化硅层的堆栈组合。
具体地，所述第一金属层80’采用物理气相沉积法制备；所述第一金属层80’的材料为钼、铝、铜、钛中的一种或多种。
步骤S6、如图12所示，在所述栅极绝缘层70、及栅极80上沉积钝化层90。
具体地，所述钝化层90采用化学气相沉积法制备；所述钝化层90为氮化硅层、氧化硅层、或氮化硅层与氧化硅层的堆栈组合。
步骤S7、如图13所示，在所述钝化层90上形成彩色滤光膜层95。
具体地，所述彩色滤光膜层95包括红色色阻单元、绿色色阻单元、及蓝色色阻单元，所述彩色滤光膜层95通过光阻涂布、曝光、及显影工艺所形成。
本发明的阵列基板的制作方法，像素电极60直接形成于漏极42上与漏极42相接触，而不用通过在栅极绝缘层70等绝缘层上设置过孔而进行连接，这也省略了彩色滤光层95上开口的设置，可以有效减小COA型阵列基板上气泡的产生，再者，黑色矩阵20可以作为遮光层用于防止显示面板中背光模组的光线对有源层50的照射，从而提高器件的稳定性，再者，最上层的彩色滤光层95可以将整个阵列基板的表面平坦化，这样便于显示面板中盒厚的控制，也不会导致液晶倒向变乱的情况出现，从而提升了显示面板的品质，再者，构成有源层50的欧姆接触层51与源极41和漏极42共同采用一道光罩图案化形成，而半导体层52通过另一道光罩图案化形成，从而不需要采用高阶光罩来制作有源层50上的沟道区，相当于利用一道普通光罩工序即完成了有源层50的制作，从而达到了缩短生产周期、节约成本的目的，并且这也不会存在因蚀刻形成沟道区而需加厚半导体层52的问题，进而可以制作出较薄的半导体层52，从而提高TFT器件的电学性能。
基于上述的阵列基板的制作方法，请参阅图13，本发明还提供一种阵列基板，包括衬底基板10、设于所述衬底基板10上的黑色矩阵20、设于所述黑色矩阵20、及衬底基板10上的隔离层30、设于所述隔离层30上的间隔的源极41和漏极42、设于所述源极41和漏极42上的欧姆接触层51、设于所述漏极42、及隔离层30上的像素电极60、设于所述欧姆接触层51、及隔离层30上的半导体层52、设于所述像素电极60、半导体层52、及隔离层30上的栅极绝缘层70、设于所述栅极绝缘层70上的栅极80、设于所述栅极绝缘层70、及栅极80上的钝化层90、以及设于所述钝化层90上的彩色滤光膜层95；
其中，所述欧姆接触层51的尺寸小于所述源极41和漏极42的尺寸而露出所述漏极42的部分上表面；所述像素电极60与所述欧姆接触层51露出的漏极42相接触；所述半导体层52与所述欧姆接触层51分别通过非晶硅材料层和离子掺杂非晶硅材料层形成，所述半导体层52与所述欧姆接触层51共同构成有源层50。
具体地，所述欧姆接触层51与所述源极41和漏极42通过一道光罩经图案化处理形成，其中所述欧姆接触层51通过干法蚀刻形成，所述源极41和漏极42通过湿法蚀刻形成。
具体地，所述欧姆接触层51与所述半导体层52均采用化学气相沉积法制备；所述欧姆接触层51与所述半导体层52在制备方法上的区别为：制备所述欧姆接触层51时在化学气相沉积过程中通入硼烷气体，具体为乙硼烷气体。
具体地，所述隔离层30、栅极绝缘层70、及钝化层90均采用化学气相沉积法制备；所述隔离层30、栅极绝缘层70、及钝化层90均为氮化硅层、氧化硅层、或氮化硅层与氧化硅层的堆栈组合。
具体地，所述源极41、漏极42、及栅极80均采用物理气相沉积法制备；所述源极41、漏极42、及栅极80的材料均为钼、铝、铜、钛中的一种或多种。
具体地，所述像素电极60采用物理气相沉积法制备；所述像素电极60的材料为氧化铟锡。
综上所述，本发明的阵列基板的制作方法，先在衬底基板上制作黑色矩阵，再在黑色矩阵上方制作顶栅型的TFT器件，最后在TFT器件上方制作彩色滤光层，其中，像素电极直接设于漏极上与漏极相接触，而不用通过在绝缘层上设置过孔而进行连接，这也省略了彩色滤光层上开口的设置，可以有效减小COA型阵列基板上气泡的产生，再者，黑色矩阵可以作为遮光层用于防止显示面板中背光模组的光线对有源层的照射，从而提高器件的稳定性，再者，最上层的彩色滤光层可以将整个阵列基板的表面平坦化，这样便于显示面板中盒厚的控制，也不会导致液晶倒向变乱的情况出现，从而提升了显示面板的品质，再者，构成有源层的欧姆接触层与源极和漏极共同采用一道光罩图案化形成，而半导体层通过另一道光罩图案化形成，从而不需要采用高阶光罩来制作有源层上的沟道区，相当于利用一道普通光罩工序即完成了有源层的制作，达到缩短生产周期、节约成本的目的，并且这也不会存在因蚀刻形成沟道区而需加厚半导体层的问题，进而可以制作出较薄的半导体层，从而提高TFT器件的电学性能。本发明的阵列基板，制作方法简单，TFT器件电学性能好、性能稳定，可提升显示面板的品质。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。

Claims (10)

1.一种阵列基板的制作方法，其特征在于，包括如下步骤：
步骤S1、提供一衬底基板(10)，在所述衬底基板(10)上涂布一层黑色光阻材料，经曝光显影后，得到黑色矩阵(20)；然后在黑色矩阵(20)、及衬底基板(10)上沉积形成隔离层(30)；
步骤S2、在所述隔离层(30)上依次沉积第二金属层(40’)、及离子掺杂非晶硅层(51’)，对所述第二金属层(40’)、及离子掺杂非晶硅层(50’)进行图案化处理，由所述第二金属层(40’)得到间隔的源极(41)和漏极(42)，由所述离子掺杂非晶硅层(51’)得到位于所述源极(41)和漏极(42)上的欧姆接触层(51)，所述欧姆接触层(51)的尺寸小于所述源极(41)和漏极(42)的尺寸而露出所述漏极(42)的部分上表面；
步骤S3、在经过步骤S2的衬底基板(10)上沉积透明导电膜，对所述透明导电膜进行图案化处理，得到像素电极(60)，所述像素电极(60)位于所述漏极(42)、及隔离层(30)上，与所述欧姆接触层(51)露出的漏极(42)相接触；
步骤S4、在经过步骤S3的衬底基板(10)上沉积非晶硅层(52’)，对所述非晶硅层(52’)进行图案化处理，得到半导体层(52)，所述半导体层(52)位于所述欧姆接触层(51)、及隔离层(30)上，与所述欧姆接触层(51)共同构成有源层(50)；
步骤S5、在经过步骤S4的衬底基板(10)上依次沉积栅极绝缘层(70)、第一金属层(80’)，对所述第一金属层(80’)进行图案化处理，得到对应位于所述有源层(50)上方的栅极(80)；
步骤S6、在所述栅极绝缘层(70)、及栅极(80)上沉积钝化层(90)；
步骤S7、在所述钝化层(90)上形成彩色滤光膜层(95)。
2.如权利要求1所述的阵列基板的制作方法，其特征在于，所述步骤S2中对所述第二金属层(40’)、及离子掺杂非晶硅层(51’)采用一道光罩进行图案化处理，其具体过程为：在所述离子掺杂非晶硅层(51’)上涂布光阻材料，使用所述光罩对该光阻材料进行曝光显影后，得到光阻层，以该光阻层为遮蔽层，首先对所述离子掺杂非晶硅层(51’)进行干法蚀刻，得到欧姆接触层(51)，然后对所述第二金属层(40’)进行湿法蚀刻，得到源极(41)和漏极(42)。
3.如权利要求1所述的阵列基板的制作方法，其特征在于，所述离子掺杂非晶硅层(51’)与所述非晶硅层(52’)均采用化学气相沉积法制备；
所述离子掺杂非晶硅层(51’)与所述非晶硅层(52’)在制备方法上的区别为：沉积所述离子掺杂非晶硅层(51’)时在化学气相沉积过程中通入硼烷气体。
4.如权利要求1所述的阵列基板的制作方法，其特征在于，所述隔离层(30)、栅极绝缘层(70)、及钝化层(90)均采用化学气相沉积法制备；
所述隔离层(30)、栅极绝缘层(70)、及钝化层(90)均为氮化硅层、氧化硅层、或氮化硅层与氧化硅层的堆栈组合。
5.如权利要求1所述的阵列基板的制作方法，其特征在于，所述第二金属层(40’)与所述第一金属层(80’)均采用物理气相沉积法制备；
所述第二金属层(40’)与所述第一金属层(80’)的材料均为钼、铝、铜、钛中的一种或多种。
6.一种阵列基板，其特征在于，包括衬底基板(10)、设于所述衬底基板(10)上的黑色矩阵(20)、设于所述黑色矩阵(20)、及衬底基板(10)上的隔离层(30)、设于所述隔离层(30)上的间隔的源极(41)和漏极(42)、设于所述源极(41)和漏极(42)上的欧姆接触层(51)、设于所述漏极(42)、及隔离层(30)上的像素电极(60)、设于所述欧姆接触层(51)、及隔离层(30)上的半导体层(52)、设于所述像素电极(60)、半导体层(52)、及隔离层(30)上的栅极绝缘层(70)、设于所述栅极绝缘层(70)上的栅极(80)、设于所述栅极绝缘层(70)、及栅极(80)上的钝化层(90)、以及设于所述钝化层(90)上的彩色滤光膜层(95)；
其中，所述欧姆接触层(51)的尺寸小于所述源极(41)和漏极(42)的尺寸而露出所述漏极(42)的部分上表面；所述像素电极(60)与所述欧姆接触层(51)露出的漏极(42)相接触；所述半导体层(52)与所述欧姆接触层(51)分别通过非晶硅材料层和离子掺杂非晶硅材料层形成，所述半导体层(52)与所述欧姆接触层(51)共同构成有源层(50)。
7.如权利要求6所述的阵列基板，其特征在于，所述欧姆接触层(51)与所述源极(41)和漏极(42)通过一道光罩经图案化处理形成，其中所述欧姆接触层(51)通过干法蚀刻形成，所述源极(41)和漏极(42)通过湿法蚀刻形成。
8.如权利要求6所述的阵列基板，其特征在于，所述欧姆接触层(51)与所述半导体层(52)均采用化学气相沉积法制备；
所述欧姆接触层(51)与所述半导体层(52)在制备方法上的区别为：制备所述欧姆接触层(51)时在化学气相沉积过程中通入硼烷气体。
9.如权利要求6所述的阵列基板，其特征在于，所述隔离层(30)、栅极绝缘层(70)、及钝化层(90)均采用化学气相沉积法制备；
所述隔离层(30)、栅极绝缘层(70)、及钝化层(90)均为氮化硅层、氧化硅层、或氮化硅层与氧化硅层的堆栈组合。
10.如权利要求6所述的阵列基板，其特征在于，所述源极(41)、漏极(42)、及栅极(80)均采用物理气相沉积法制备；
所述源极(41)、漏极(42)、及栅极(80)的材料均为钼、铝、铜、钛中的一种或多种。
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