CN106252362A - 一种阵列基板及其制备方法 - Google Patents

一种阵列基板及其制备方法 Download PDF

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Publication number
CN106252362A
CN106252362A CN201610799421.4A CN201610799421A CN106252362A CN 106252362 A CN106252362 A CN 106252362A CN 201610799421 A CN201610799421 A CN 201610799421A CN 106252362 A CN106252362 A CN 106252362A
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Prior art keywords
layer
active layer
grid
insulating barrier
etching barrier
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CN201610799421.4A
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CN106252362B (zh
Inventor
曾勉
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to CN201610799421.4A priority Critical patent/CN106252362B/zh
Publication of CN106252362A publication Critical patent/CN106252362A/zh
Priority to US15/500,125 priority patent/US20180211984A1/en
Priority to PCT/CN2017/071600 priority patent/WO2018040489A1/zh
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Abstract

本发明公开了一种阵列基板及其制备方法，涉及液晶显示器技术领域，该阵列基板包括一种传输门结构，所述传输门结构由下至上依次包括：位于衬底基板之上的第一栅极，位于所述第一栅极之上的且完全覆盖所述第一栅极的第一栅极绝缘层，位于所述第一栅极绝缘层之上的、与所述第一栅极相对的第一有源层，位于所述第一有源层之上的绝缘层，位于所述绝缘层之上的、通过位于所述绝缘层的过孔实现与所述第一有源层电连接的源漏极层，位于所述源漏极层之上的第二有源层，位于所述第二有源层之上的且完全覆盖所述第二有源层的第二栅极绝缘层，位于所述第二栅极绝缘层之上的、与所述第二栅极相对的第二栅极。

Description

一种阵列基板及其制备方法
技术领域
本发明涉及液晶显示器领域，尤其涉及一种阵列基板及其制备方法。
背景技术
液晶显示面板(Liquid Crystal Display，简称LCD)具有机身薄、省电、无辐射等众多优点，得到了广泛的应用。如：液晶面板、移动电话、个人数字助理
互补金属氧化物半导体(Complementary Metal Oxide Semiconductor，简称CMOS)由P型沟道金属氧化物半导体(Positive channel Metal Oxide Semiconductor，简称PMOS)和N型沟道金属氧化物半导体(Negative channel Metal Oxide Semiconductor，简称NMOS)共同构成，而CMOS电路是作为驱动集成电路(Integrated Circuit)IC的最基本电路结构。
其中，CMOS传输门由一个P沟道金氧半场效晶体管(Metal-Oxide-SemiconductorField-Effect Transistor，简称MOSFET)和一个N沟道MOSFET并联而成，除了作为传输模拟信号的开关之外，也可作为各种逻辑电路的基本单元电路。
CMOS的互补结构利用了“互补”的特性，传输高低电平时都没有阈值损耗，即输入与输出信号的一致性好；而且CMOS传输门的导通电阻较低，且基本上可近似为一常数；另外，由于其源极和漏极可以互换使用，因此，CMOS传输门具有双向性，若应用在GOA(Gate OnArray)电路里面，则可以作为面板双向扫描的控制开关。
而目前显示面板中的衬底基板大部分为玻璃、聚萘二甲酸乙二醇酯(PEN)等，在其上面形成的主动元件基本上为N型的非晶硅(a-Si)薄膜晶体管(Thin Film Transistor，简称TFT)，而无P型的TFT结构。在低温多晶硅技术(Low Temperature Poly-silicon，简称LTPS)中，通过ELA等技术可将a-Si转变成Poly Si，并且通过在沟道处使用不同类型的掺杂可以形成P型TFT和N型TFT，从而形成类似CMOS的互补薄膜晶体管(Complementary ThinFilm Transistor，简称CTFT)，但其工艺流程较为复杂，而且其制备成本也比较高。
发明内容
本发明所要解决的技术问题在于提供一种阵列基板及其制备方法，有利于简化CTFT的制备工艺，提高制备的成功率。
为解决上述技术问题，本发明采用如下技术方案：
本发明第一方面提供了一种阵列基板，
本发明提供了一种阵列基板，其包括一种传输门结构，所述传输门结构由下至上依次包括：
位于衬底基板之上的第一栅极，位于所述第一栅极之上的且完全覆盖所述第一栅极的第一栅极绝缘层，位于所述第一栅极绝缘层之上的、与所述第一栅极相对的第一有源层，位于所述第一有源层之上的绝缘层，位于所述绝缘层之上的、通过位于所述绝缘层的过孔实现与所述第一有源层电连接的源漏极层，位于所述源漏极层之上的第二有源层，位于所述第二有源层之上的且完全覆盖所述第二有源层的第二栅极绝缘层，位于所述第二栅极绝缘层之上的、与所述第二栅极相对的第二栅极。
优选的，所述第一有源层为N型有源层，所述第二有源层为P型有源层。
优选的，所述绝缘层包括刻蚀阻挡层和/或平坦层。
优选的，当所述绝缘层包括刻蚀阻挡层和平坦层时，所述刻蚀阻挡层位于所述第一有源层之上，所述平坦层位于所述刻蚀阻挡层之上。
优选的，所述刻蚀阻挡层的材质包括硅的氮化物和/或硅的氧化物。
在本发明实施例提供的阵列基板中，传输门结构包括上下两个TFT，位于下侧的TFT的有源层为第一有源层，位于上侧的TFT的有源层为第二有源层，第一有源层和第二有源层分别设置在源漏极层的两侧，共用源漏电极。这个结构与现有技术相比更简单，并且有利于简化传输门结构的制备工艺，提高制备的成功率。
本发明还提供了一种阵列基板的制备方法，其特征在于，包括如下步骤：
步骤S1、获取衬底基板；
步骤S2、在所述衬底基板之上形成第一栅极；
步骤S3、在所述第一栅极之上形成完全覆盖所述第一金属层的第一栅极绝缘层；
步骤S4、在所述第一栅极绝缘层之上形成第一有源层，所述第一有源层与所述第一栅极相对；
步骤S5、在所述第一有源层之上形成绝缘层，对所述绝缘层进行构图工艺，形成过孔；
步骤S6、在所述绝缘层之上形成源漏极层，所述源漏极层通过所述过孔实现与所述第一有源层的电连接；
步骤S7、在所述源漏极层之上形成第二有源层；
步骤S8、在所述第二有源层之上形成完全覆盖所述第二有源层的第二栅极绝缘层；
步骤S9、在所述第二栅极绝缘层之上形成与所述第二有源层相对的第二栅极。
优选的，所述第一有源层为N型有源层，所述第二有源层为P型有源层；所述第一有源层的材质为金属氧化物材料，所述第二有源层的材质为P型有机半导体材料。
优选的，所述绝缘层包括刻蚀阻挡层和/或平坦层。
优选的，当所述绝缘层包括刻蚀阻挡层和平坦层时，所述步骤S5包括：
步骤S51、在所述第一有源层之上形成覆盖所述第一有源层的刻蚀阻挡层；
步骤S52、在所述刻蚀阻挡层之上形成覆盖所述刻蚀阻挡层的平坦层；
步骤S53、对所述刻蚀阻挡层和所述平坦层进行构图工艺，形成贯穿所述平坦层和所述刻蚀阻挡层的过孔。
优选的，所述刻蚀阻挡层的材质包括硅的氮化物和/或硅的氧化物。
在本发明实施例提供的阵列基板中，传输门结构包括上下两个TFT，位于下侧的TFT的有源层为第一有源层，位于上侧的TFT的有源层为第二有源层，第一有源层和第二有源层分别设置在源漏极层的两侧，共用源漏电极。这个结构与现有技术相比更简单，并且有利于简化传输门结构的制备工艺，提高制备的成功率。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明实施例提供的第一种阵列基板的结构示意图；
图2为本发明实施例提供的第二种阵列基板的结构示意图；
图3为本发明实施例提供的第三种阵列基板的结构示意图。
附图标记说明：1—衬底基板；2—第一栅极；3—第一栅极绝缘层；4—N型有源层；5—刻蚀阻挡层；6—过孔；7—源漏极层；8—P型有源层；9—第二栅极绝缘层；10—第二栅极；11—平坦层。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
本发明实施例提供一种阵列基板，将现有技术中的CTFT传输门器件结构进行优化，使其能够充分利用现有制程集成制造在阵列基板及其他玻璃、PEN等基板上，从而使其应用更为广泛，并且可以更大程度上降低其应用产品的生产成本。
如图1所示，CTFT作为一种传输门电路结构，经过本发明的优化，其由下至上依次包括：
位于衬底基板1之上的第一栅极2，位于第一栅极2之上的且完全覆盖第一栅极2的第一栅极绝缘层3，位于第一栅极绝缘层3之上的、与第一栅极2相对的N型有源层4，位于N型有源层4之上的绝缘层(在图1所示的实施例中，绝缘层为刻蚀阻挡层5)，位于绝缘层之上的、通过位于绝缘层的过孔6实现与N型有源层4电连接的源漏极层7，位于源漏极层7之上的P型有源层8，位于P型有源层8之上的且完全覆盖P型有源层8的第二栅极绝缘层9，位于第二栅极绝缘层9之上的、与第二栅极10相对的第二栅极10。
显然，在本发明实施例提供的阵列基板中，每一个CTFT包括上下两个TFT，位于下侧的TFT的有源层为N型有源层4，因此为N型TFT；位于上侧的TFT的有源层为P型有源层8，因此为P型TFT。N型有源层4和P型有源层8分别设置在源漏极层7的两侧，共用源漏电极。这个结构与现有技术相比更简单，并且有利于简化CTFT的制备工艺，提高制备的成功率。
进一步的，为了制备上述的阵列基板，本发明实施例还提供了相应的制备方法，具体可包括如下步骤：
步骤S1、获取衬底基板1。
步骤S2、在衬底基板1之上形成第一栅极2。
步骤S3、在第一栅极2之上形成完全覆盖第一金属层的第一栅极绝缘层3。
步骤S4、在第一栅极绝缘层3之上形成N型有源层4，N型有源层4与第一栅极2相对。
步骤S5、在N型有源层4之上形成绝缘层，对绝缘层进行构图工艺，形成过孔6。
步骤S6、在绝缘层之上形成源漏极层7，源漏极层7通过过孔6实现与N型有源层4的电连接。
步骤S7、在源漏极层7之上形成P型有源层8。
步骤S8、在P型有源层8之上形成完全覆盖P型有源层8的第二栅极绝缘层9。
步骤S9、在第二栅极绝缘层9之上形成与P型有源层8相对的第二栅极10。
考虑到有机材料的不稳定性，以及容易受到环境影响等因素，因此，本专利所述的结构中，尽量把P型TFT的制程放在NTFT制程之后，并采用顶栅底接触的结构，以保证P型TFT器件中的有机半导体的特性不受其制程的影响。
本发明实施例中，绝缘层可仅为如图1所示的一层刻蚀阻挡层5，也可仅为如图3所示的一层平坦层11，还可如图2所示在刻蚀阻挡层5的上方叠加一层平坦层11。
基于绝缘层的三种情况，本发明实施例提供了三种具体的阵列基板及对应的制备方法，具体如下：
如附图1所示，为第一种阵列基板上的CTFT的结构图，其中该CTFT包含顶栅底接触结构的P型TFT和刻蚀阻挡层5结构的N型TFT，其制备方法大致如下：
首先，在衬底基板1上溅射一层栅极金属层(例如利用Mo/Al/Mo、Cu/Ti等材料)，曝光、显影、刻蚀、剥离等步骤后形成第一栅极2，作为N型氧化物TFT的栅电极。本发明实施例中的衬底基板1可利用玻璃、聚萘二甲酸乙二醇酯(PEN)等材质制得。
然后用气相沉积(Chemical Vapor Deposition，简称CVD)或者涂布的方法形成第一栅极绝缘层3。接着，形成一层铟镓锌氧化物(Indium Gallium Zinc Oxide，简称IGZO)或者其他N型金属氧化物半导体材料，并同样经过曝光、显影、刻蚀、剥离等步骤后形成N型有源层4。然后，再在其上面形成一层刻蚀阻挡层5，其材料一般可为硅的氮化物(SiNx)或硅的氧化物(SiOx)，并通过构图工艺在刻蚀阻挡层5上形成与源漏极层7连接的过孔6。
接着，溅射一层源漏电极金属层(例如可为Mo/Al/Mo、Cu/Ti等材料)，经过曝光、显影、刻蚀、剥离后形成源漏极层7，作为N型TFT与P型TFT共用的源漏电极。
然后，制备P型有源层8，即在衬底基板1上涂布一层P型有机半导体材料(例如并五苯等材料)，并通过光刻方法形成P型有源层8的图案；再用CVD或者涂布的方法形成保护层，同时可作为P型TFT的栅极绝缘层，即第二栅极绝缘层9。
最后，用光刻或者蒸镀的方法在第二栅极绝缘层9上面制备成P型TFT的顶栅电极结构，即第二栅极10。至此，图1所示的CTFT传输门结构制备完成，其中省略了后续的电连接制备以及后续的封装保护层制备等描述。
显然，图1所示的阵列基板的CTFT中的绝缘层仅为刻蚀阻挡层5一层结构，对于绝缘层包括刻蚀阻挡层5和平坦层11的结构而言，如图2所示，该CTFT同样包含顶栅底接触结构的P型TFT和刻蚀阻挡层5结构的N型TFT。
图2所示的CTFT的结构为图1的改进结构，为了在P型有源层8旋涂或者涂布时，保证其基底表面的平整性，所以在刻蚀阻挡层5形成之后，再在其表面涂布一层平坦层11，平坦层11的材料一般为有机材料，具有平坦化的作用。然后再对刻蚀阻挡层5和平坦层11一起进行构图工艺，形成供源漏极层7接触N型有源层4的过孔6。
这样，即可保证在源漏极层7形成之后，再旋涂或涂布P型有源层8时，其下表面就是比较平坦的，并且还可以增加P型有源层8与其下表面的附着性，改善其界面性能，也即可优化后续制备的P型TFT的器件性能。
显然，绝缘层还可仅采用一层平坦层11制备，如图3所示，该阵列基板的CTFT同样包含顶栅底接触结构的P型TFT和刻蚀阻挡层结构的N型TFT。图3所示的CTFT的结构为图2的改进结构，图3中的平坦层11既可以作为保护N型有源层4的刻蚀阻挡层，又可以作为改善P型有源层8旋涂或者涂布效果的平坦化层。这样可以节省一道刻蚀阻挡层的制程，节约了阵列基板的制备成本，提高了制备成功率和良品率。
需要说明的是，本申请的N型有源层与P型有源层可进行位置互换，并且也不影响各个实施例记载的技术方案。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以所述权利要求的保护范围为准。

Claims (10)

1.一种阵列基板，其特征在于，包括一种传输门结构，所述传输门结构由下至上依次包括：
位于衬底基板之上的第一栅极，位于所述第一栅极之上的且完全覆盖所述第一栅极的第一栅极绝缘层，位于所述第一栅极绝缘层之上的、与所述第一栅极相对的第一有源层，位于所述第一有源层之上的绝缘层，位于所述绝缘层之上的、通过位于所述绝缘层的过孔实现与所述第一有源层电连接的源漏极层，位于所述源漏极层之上的第二有源层，位于所述第二有源层之上的且完全覆盖所述第二有源层的第二栅极绝缘层，位于所述第二栅极绝缘层之上的、与所述第二栅极相对的第二栅极。
2.根据权利要求1所述的阵列基板，其特征在于，所述第一有源层为N型有源层，所述第二有源层为P型有源层。
3.根据权利要求1所述的阵列基板，其特征在于，
所述绝缘层包括刻蚀阻挡层和/或平坦层。
4.根据权利要求3所述的阵列基板，其特征在于，当所述绝缘层包括刻蚀阻挡层和平坦层时，所述刻蚀阻挡层位于所述第一有源层之上，所述平坦层位于所述刻蚀阻挡层之上。
5.根据权利要求3所述的阵列基板，其特征在于，所述刻蚀阻挡层的材质包括硅的氮化物和/或硅的氧化物。
6.一种阵列基板的制备方法，其特征在于，包括如下步骤：
步骤S1、获取衬底基板；
步骤S2、在所述衬底基板之上形成第一栅极；
步骤S3、在所述第一栅极之上形成完全覆盖所述第一金属层的第一栅极绝缘层；
步骤S4、在所述第一栅极绝缘层之上形成第一有源层，所述第一有源层与所述第一栅极相对；
步骤S5、在所述第一有源层之上形成绝缘层，对所述绝缘层进行构图工艺，形成过孔；
步骤S6、在所述绝缘层之上形成源漏极层，所述源漏极层通过所述过孔实现与所述第一有源层的电连接；
步骤S7、在所述源漏极层之上形成第二有源层；
步骤S8、在所述第二有源层之上形成完全覆盖所述第二有源层的第二栅极绝缘层；
步骤S9、在所述第二栅极绝缘层之上形成与所述第二有源层相对的第二栅极。
7.根据权利要求6所述的制备方法，其特征在于，所述第一有源层为N型有源层，所述第二有源层为P型有源层；
所述第一有源层的材质为金属氧化物材料，所述第二有源层的材质为P型有机半导体材料。
8.根据权利要求6所述的制备方法，其特征在于，所述绝缘层包括刻蚀阻挡层和/或平坦层。
9.根据权利要求8所述的制备方法，其特征在于，当所述绝缘层包括刻蚀阻挡层和平坦层时，所述步骤S5包括：
步骤S51、在所述第一有源层之上形成覆盖所述第一有源层的刻蚀阻挡层；
步骤S52、在所述刻蚀阻挡层之上形成覆盖所述刻蚀阻挡层的平坦层；
步骤S53、对所述刻蚀阻挡层和所述平坦层进行构图工艺，形成贯穿所述平坦层和所述刻蚀阻挡层的过孔。
10.根据权利要求8所述的制备方法，其特征在于，所述刻蚀阻挡层的材质包括硅的氮化物和/或硅的氧化物。
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